In the course of our investigations into the design of translator writing systems (compiler-compilers), it has been established [2] that a certain set of “semantic primitives” can adequately express the major portion of the semantics of programs written in any of the several common high-level languages (e.g., PL/I, ALGOL W). It was also observed that each of these semantic primitives, while representing frequently-used high-level language constructs, corresponds to predictable sequences of machine-language instructions in the object code of programs. Similarly, other authors have noted that conventional computer instruction sets are less than satisfactory as target languages for high-level language programs and have offered, as a solution to this problem, hardware or firmware processors designed specifically for programs written in a particular high-level language—the machine language and the programming language are essentially identical. The best known early example of such a processor is Helmut Weber's microprogrammed implementation of the EULER language on an IBM 360/30. [5] More recently, Burroughs Corporation has produced the B1700, a computer that has a microprogrammed language processor for each of several languages, the appropriate one of which is loaded into control memory to interpret a given program. [6,7] Such processors show significant speed increases over conventional computers of comparable basic speed in executing programs written in their particular language, but are too specialized to execute other languages efficiently. Therefore we have conjectured that, by designing a computer organization which implements a set of semantic primitives similar to Lancaster's via microprogramming, one instruction per primitive (so that the work required by a DO statement, for example, is performed in the firmware rather than in the software), we can achieve speed increases approaching those of the single-language processors, while retaining the flexibility characteristic of conventional computer organizations. This paper describes those primitives which we have chosen for initial implementation, and presents some preliminary results on the speedups obtained.