GPGPU Research Articles

Development of a finite-discrete element method with finite-strain elasto-plasticity and cohesive zone models for simulating the dynamic fracture of rocks

This paper implements a finite-strain-based Mohr-Coulomb (MC) elasto-plastic model into the combined finite-discrete element method (FDEM) with the intrinsic cohesive zone model (ICZM). The formulation of elasto-plastic continuum elements based on the concept of unrotated configuration as the frame of reference is firstly incorporated into an in-house FDEM code, which is parallelized by general-purpose graphic processing units. The developed FDEM code can not only handle the finite elasto-plastic deformation, the large displacement, and the rotation of continuum elements but also simultaneously model the explicit rock fracturing. The split Hopkinson pressure bar (SHPB)-based dynamic tests, single-hole blasting, and model blasting experiments reported in the literature are then modeled using the FDEM with and without the MC model to elucidate the effects of the incorporation of the MC model on the dynamic rock fracturing simulation results. It is elucidated that the conventional FDEM tends to show more fractures and undesirable overestimations of local stresses and particle velocities while the proposed FDEM can reasonably avoid these issues in all the numerical simulations conducted in this study.

Clinical validation of rapid GPU-enabled DTI tractography of the brain

Diffusion tensor imaging (DTI) is a non-invasive magnetic resonance imaging (MRI) modality used to map white matter fiber tracts for a variety of clinical applications; one of which is aiding preoperative assessments for tumor patients. DTI requires numerical computations on multiple diffusion weighted images to calculate diffusion tensors at each voxel and probabilistic tracking<sup>1</sup> to construct fiber tracts, or tractography. Greater accuracy in tractography is possible with larger, more advanced imaging and reconstruction algorithms. However, larger scans and advanced reconstruction is often computationally intensive. The post-processing pipeline involves significant computational resources and time and requires up to 40 minutes of computation time on state-of-the-art hardware. Parallel GPU computations can improve time for the resource-intensive tractography. A collaborative team from DIPY, NVIDIA, and UCSF recently developed a tool, GPUStreamlines, for GPU-enabled tractography<sup>2</sup> which has been expanded to support the constant solid angle (CSA) reconstruction algorithm<sup>3</sup>. This GPU-enabled tractography was applied to MRIs of brains with and without presence of lesions, with substantial increases in processing speed. We demonstrate that CSA GPU-enabled tractography in normal controls and patients are comparable to the existing gold standard tractography currently in place at UCSF.

Taking Back Control in an Intermediate Representation for GPU Computing

We describe our experiences successfully applying lightweight formal methods to substantially improve and reformulate an important part of Standard Portable Intermediate Representation SPIRV, an industry-standard language for GPU computing. The formal model that we present has allowed us to (1) identify several ambiguities and needless complexities in the way that structured control flow was defined in the SPIRV specification; (2) interact with the authors of the SPIRV specification to rectify these problems; (3) validate the developer tools and conformance test suites that support the SPIRV language by cross-checking them against our formal model, improving the tools, test suites, and our models in the process; and (4) develop a novel method for fuzzing SPIRV compilers to detect miscompilation bugs that leverages our formal model. The latest release of the SPIRV specification incorporates the revised set of control-flow definitions that have arisen from our work. Furthermore, our novel compiler-fuzzing technique has led to the discovery of twenty distinct, previously unknown bugs in SPIRV compilers from Google, the Khronos Group, Intel, and Mozilla. Our work showcases the practical impact that formal modelling and analysis techniques can have on the design and implementation of industry-standard programming languages.

ChemFlow─From 2D Chemical Libraries to Protein-Ligand Binding Free Energies.

The accurate prediction of protein-ligand binding affinities is a fundamental problem for the rational design of new drug entities. Current computational approaches are either too expensive or inaccurate to be effectively used in virtual high-throughput screening campaigns. In addition, the most sophisticated methods, e.g., those based on configurational sampling by molecular dynamics, require significant pre- and postprocessing to provide a final ranking, which hinders straightforward applications by nonexpert users. We present a novel computational platform named ChemFlow to bridge the gap between 2D chemical libraries and estimated protein-ligand binding affinities. The software is designed to prepare a library of compounds provided in SMILES or SDF format, dock them into the protein binding site, and rescore the poses by simplified free energy calculations. Using a data set of 626 protein-ligand complexes and GPU computing, we demonstrate that ChemFlow provides relative binding free energies with an RMSE < 2 kcal/mol at a rate of 1000 ligands per day on a midsize computer cluster. The software is publicly available at https://github.com/IFMlab/ChemFlow.

Acceleration of Particle Swarm Optimization with AVX Instructions

Parallel implementations of algorithms are usually compared with single-core CPU performance. The advantage of multicore vector processors decreases the performance gap between GPU and CPU computation, as shown in many recent pieces of research. With the AVX-512 instruction set, there will be another performance boost for CPU computations. The availability of parallel code running on CPUs made them much easier and more accessible than GPUs. This article compares the performances of parallel implementations of the particle swarm optimization algorithm. The code was written in C++, and we used various techniques to obtain parallel execution through Advanced Vector Extensions. We present the performance on various benchmark functions and different problem configurations. The article describes and compares the performance boost gained from parallel execution on CPU, along with advantages and disadvantages of parallelization techniques.

Joint Sparse Representation-based Single Image Super-Resolution for Remote Sensing Applications

Sparse representation-based single image super-resolution (SISR) methods use a coupled overcomplete dictionary trained from high-resolution (HR) images/ image patches. Since, remote sensing (RS) satellites capture images of large areas, these images usually have poor spatial resolution and obtaining an effective dictionary as such would be very challenging. Moreover, traditional patch-based sparse representation (PSR) models for reconstruction tend to give unstable sparse solution and produce visual artefact in the recovered images. To mitigate these problems, in this paper, we have proposed an adaptive joint sparse representation (JSR)-based SISR method that is dependent only on the input low-resolution (LR) image for dictionary training and sparse reconstruction. The new model combines patch-based local sparsity and group sparse representation (GSR)-based non-local sparsity in a single framework, which helps in stabilizing the sparse solution and improve the SISR results. Experimental results are evaluated both visually and quantitatively for several RGB and multispectral RS datasets, where the proposed method shows improvements in PSNR by 1–4 dB and 2–3 dB over the state-of-the-art sparse representation- and deep learning-based SR methods, respectively. Land cover classification applied on the super-resolved images further validate the advantages of the proposed method. Finally, for practical RS applications, we have performed parallel implementation in general purpose graphics processing units (GPGPU) and achieved significant speed-ups (30-40×) in the execution time.

An Investigation of Heterogeneous Embedded CPU and GPU Architectures

Edge detection using the Canny method is popular. The Canny method’s calculation is too complex for traditional embedded systems, preventing real-time edge recognition. High-end embedded CPUs with GPGPUs can process more data (General Purpose Graphics Processing Units). This research proposes a distributed computing-friendly parallel canny technique.

Jungfraujoch: hardware-accelerated data-acquisition system for kilohertz pixel-array X-ray detectors.

The JUNGFRAU 4-megapixel (4M) charge-integrating pixel-array detector, when operated at a full 2 kHz frame rate, streams data at a rate of 17 GB s-1. To operate this detector for macromolecular crystallography beamlines, a data-acquisition system called Jungfraujoch was developed. The system, running on a single server with field-programmable gate arrays and general-purpose graphics processing units, is capable of handling data produced by the JUNGFRAU 4M detector, including conversion of raw pixel readout to photon counts, compression and on-the-fly spot finding. It was also demonstrated that 30 GB s-1 can be handled in performance tests, indicating that the operation of even larger and faster detectors will be achievable in the future. The source code is available from a public repository.

Technology Prospects for Data-Intensive Computing

For many decades, progress in computing hardware has been closely associated with CMOS logic density, performance, and cost. As such, slowdown in 2-D scaling, frequency saturation in CPUs, and increased cost of design and chip fabrication for advanced technology nodes since the early 2000s have led to concerns about how semiconductor technology may evolve in the future. However, the last two decades have also witnessed a parallel development in the application landscape: the advent of big data and consequent rise of data-intensive computing, using techniques such as machine learning. In this article, we advance the idea that data-intensive computing would further cement semiconductor technology as a foundational technology with multidimensional pathways for growth. Continued progress of semiconductor technology in this new context would require the adoption of a system-centric perspective to holistically harness logic, memory, and packaging resources. After examining the performance metrics for data-intensive computing, we present the historical trends for general-purpose graphics processing unit (GPGPU) as a representative data-intensive computing hardware. Thereon, we estimate the values of the key data-intensive computing parameters for the next decade, and our projections may serve as a precursor for a dedicated technology roadmap. By analyzing the compiled data, we identify and discuss specific opportunities and challenges for data-intensive computing hardware technology.

TomocuPy - efficient GPU-based tomographic reconstruction with asynchronous data processing.

Fast 3D data analysis and steering of a tomographic experiment by changing environmental conditions or acquisition parameters require fast, close to real-time, 3D reconstruction of large data volumes. Here a performance-optimized TomocuPy package is presented as a GPU alternative to the commonly used central processing unit (CPU) based TomoPy package for tomographic reconstruction. TomocuPy utilizes modern hardware capabilities to organize a 3D asynchronous reconstruction involving parallel read/write operations with storage drives, CPU-GPU data transfers, and GPU computations. In the asynchronous reconstruction, all the operations are timely overlapped to almost fully hide all data management time. Since most cameras work with less than 16-bit digital output, the memory usage and processing speed are furthermore optimized by using 16-bit floating-point arithmetic. As a result, 3D reconstruction with TomocuPy became 20-30 times faster than its multi-threaded CPU equivalent. Full reconstruction (including read/write operations and methods initialization) of a 20483 tomographic volume takes less than 7 s on a single Nvidia Tesla A100 and PCIe 4.0 NVMe SSD, and scales almost linearly increasing the data size. To simplify operation at synchrotron beamlines, TomocuPy provides an easy-to-use command-line interface. Efficacy of the package was demonstrated during a tomographic experiment on gas-hydrate formation in porous samples, where a steering option was implemented as a lens-changing mechanism for zooming to regions of interest.

Improving the Scalability of GPU Synchronization Primitives

General-purpose GPU applications increasingly use synchronization to enforce ordering between many threads accessing shared data. Accordingly, recently there has been a push to establish a common set of GPU synchronization primitives. However, the expressiveness of existing GPU synchronization primitives is limited. In particular the expensive GPU atomics often used to implement fine-grained synchronization make it challenging to implement efficient algorithms. Consequently, as GPU algorithms scale to millions or billions of threads, existing GPU synchronization primitives either scale poorly or suffer from livelock or deadlock issues because of heavy contention between threads accessing shared synchronization objects. We seek to overcome these inefficiencies by designing more efficient, scalable GPU barriers and semaphores. In particular, we show how multi-level sense reversing barriers and priority mechanisms for semaphores can be designed with the GPUs unique processing model in mind to improve performance and scalability of GPU synchronization primitives. Our results show that the proposed designs significantly improve performance compared to state-of-the-art solutions like CUDA Cooperative Groups and optimized CPU-style synchronization algorithms at medium and high contention levels, scale to an order of magnitude more threads, and avoid livelock in these situations unlike prior open source algorithms. Overall, across three modern GPUs the proposed barrier algorithm improves performance by an average of 33% over a GPU tree barrier algorithm and improves performance by an average of 34% over CUDA Cooperative Groups for five full-sized benchmarks at high contention levels; the new semaphore algorithm improves performance by an average of 83% compared to prior GPU semaphores.

Path Planning over Visibility Maps

This paper examines the generation of visibility maps for the purposes of robotic path planning. The paper proposes a map construction technique that extends a version of the viewshed problem to calculate the rays to and from all discrete points on the map efficiently. The introduced form is parallelizable, making it suitable for fast GPU computation necessary for realtime calculation during path planning. New algorithms are introduced to generate worst- and best-case visibility maps by bounding precision uncertainties in the discretized map. Visibility theory is then applied to quantify the detectability of each viewpoint in the space based on atmospheric visibility models. Path planning is executed on the generated cost map illustrating its usability for visibility path planning.

DeepEdgeSoC: End-to-end deep learning framework for edge IoT devices

The acceleration of deep neural networks (DNNs) on edge devices is gaining significant importance in various application domains. General purpose graphics processing units (GPGPUs) are typically used to explore, train and evaluate DNNs because they offer higher processing and computational capability compared to CPUs. However, this comes at the cost of increased power consumption required by these devices for operation, which prevents efficient deployment of networks on edge devices. In the Internet of Things (IoT) domain, Field programmable gate arrays (FPGAs) are considered a powerful alternative since their flexible architecture can run the DNNs with much less energy. The enormous amount of effort and time required for the entire end-to-end edge-aware deployment urged us to develop DeepEdgeSoc, an integrated framework for deep learning (DL) design and acceleration. DeepEdgeSoc is an overarching framework under which DNNs can be built. DeepGUI, a visual drag-and-drop DNN design environment, plays an important role in accelerating the network design phase. In DeepEdgeSoc, the networks can be quantized and compressed to suite the underlying edge devices in terms of size and energy. DeepEdgeSoc goes beyond the software level by converting the networks to appropriate FPGA implementations that can be directly synthesized and integrated within a System-on-Chip (SoC).

A High-Throughput, Resource-Efficient Implementation of the RoCEv2 Remote DMA Protocol and its Application

The use of application-specific accelerators in data centers has been the state of the art for at least a decade, starting with the availability of General Purpose GPUs achieving higher performance either overall or per watt. In most cases, these accelerators are coupled via PCIe interfaces to the corresponding hosts, which leads to disadvantages in interoperability, scalability and power consumption. As a viable alternative to PCIe-attached FPGA accelerators this paper proposes standalone FPGAs as Network-attached Accelerators (NAAs) . To enable reliable communication for decoupled FPGAs we present an RDMA over Converged Ethernet v2 (RoCEv2) communication stack for high-speed and low-latency data transfer integrated into a hardware framework. For NAAs to be used instead of PCIe coupled FPGAs the framework must provide similar throughput and latency with low resource usage. We show that our RoCEv2 stack is capable of achieving 100 Gb/s throughput with latencies of less than 4μs while using about 10% of the available resources on a mid-range FPGA. To evaluate the energy efficiency of our NAA architecture, we built a demonstrator with 8 NAAs for machine learning based image classification. Based on our measurements, network-attached FPGAs are a great alternative to the more energy-demanding PCIe-attached FPGA accelerators.

Developments in SRW Code and Sirepo Framework Supporting Simulation of Time-Dependent Coherent X-ray Scattering Experiments

Physical optics simulations for beamlines and experiments are essential for the effective use of synchrotron light source facilities such as NSLS-II at BNL. The SRW software package supports such source-to-detector simulations for coherent X-ray scattering and imaging experiments through its Python interface and Sirepo browser-based graphical user interface. This allows one to define custom sample models, assess the feasibility of an experiment, and estimate most appropriate beamline settings before using valuable beamtime. We discuss the recent use of general-purpose GPU resources and coherent mode decomposition algorithms in SRW to accelerate physical optics simulations with partially coherent X-rays. To illustrate these new capabilities, we describe simulations of typical time series of partially coherent scattering images used in X-ray Photon Correlation Spectroscopy (XPCS) experiments; aiming to characterize the nanoscale dynamics of a disordered sample, representing a solution of nanoparticles undergoing Brownian diffusion.

Accelerating Spherical Harmonic Transforms for a Large Number of Sky Maps

The spherical harmonic transform is a powerful tool in the analysis of spherical data sets, such as cosmic microwave background data. In this work, we present a new scheme for spherical harmonic transforms that supports both CPU and GPU computations, which is especially efficient on a large number of sky maps. By comparing our implementation with the standard Libsharp-HEALPix program, we demonstrate a 2–10 times speedup for the CPU implementation, and an up to 30 times speedup when a state-of-the-art GPU is employed. This new scheme’s software package is available via an open-source GitHub repository.

Sensor-Based Technologies in Effective Solid Waste Sorting: Successful Applications, Sensor Combination, and Future Directions.

The increase in global population and improvement of living standards have stirred up a continuous increase in solid waste generation, while simple incineration and landfilling bring about serious environmental and health concerns. In order to improve resource recovery and mitigate pollution, noncontacting and nondestructive sensor-based waste sorting systems are applied to enhance solid waste classification. In recent years, in addition to the rapid development of computer hardware, especially improvements of GPU computing capacity, complicated and efficient classification algorithms have emerged and been widely used in industrial sectors. These advances allow computers to process signals from sensors more quickly and accurately and to classify matters automatically. This article introduces widely applied sensor-based technologies in solid waste sorting and analyzes applicable conditions for each specific method. The latest developed algorithms are critically compared with competitive counterparts. Successful practices are described, and findings are highlighted. Though spectroscopic-based and vision-based waste classifications have achieved high performance in accuracy and detection speed, challenges and future directions can still provide wide development opportunities. Concretely, these opportunities generally comprise classification of indistinct plastics, application of the latest object detection algorithms, appropriate data set formulating, and sensor combination for multiple sorting tasks within a single system.

HPIC2: A hardware-accelerated, hybrid particle-in-cell code for dynamic plasma-material interactions

The exascale era of high performance computing promises to bring the field of computational plasma physics ever closer to the goal of accurate multiscale modeling. Such computers will rely on hardware acceleration to offload work to dedicated components, notably general-purpose graphics processing units (GPUs). However, devices from different manufacturers require software to be written with different parallel programming models, greatly increasing the code maintenance burden of applications designed to perform on more than one such device. hPIC2 is a hybrid plasma simulation code developed with the Kokkos performance portability framework to target the architectures that will drive exascale computing for the foreseeable future. As a hybrid simulation code, hPIC2 investigates the simultaneous use of various plasma models on the same domain, at the same time. hPIC2 also optionally couples to RustBCA, which accurately models ion-material interactions using the binary collision approximation (BCA) method [1]. hPIC2 therefore achieves scalable performance on a variety of computing architectures when simulating complex and diverse plasmas, particularly near plasma-material interfaces.

GeNVoM: Read Mapping Near Non-Volatile Memory.

DNA sequencing is the physical/biochemical process of identifying the location of the four bases (Adenine, Guanine, Cytosine, Thymine) in a DNA strand. As semiconductor technology revolutionized computing, modern DNA sequencing technology (termed Next Generation Sequencing, NGS) revolutionized genomic research. As a result, modern NGS platforms can sequence hundreds of millions of short DNA fragments in parallel. The sequenced DNA fragments, representing the output of NGS platforms, are termed reads. Besides genomic variations, NGS imperfections induce noise in reads. Mapping each read to (the most similar portion of) a reference genome of the same species, i.e., read mapping, is a common critical first step in a diverse set of emerging bioinformatics applications. Mapping represents a search-heavy memory-intensive similarity matching problem, therefore, can greatly benefit from near-memory processing. Intuition suggests using fast associative search enabled by Ternary Content Addressable Memory (TCAM) by construction. However, the excessive energy consumption and lack of support for similarity matching (under NGS and genomic variation induced noise) renders direct application of TCAM infeasible, irrespective of volatility, where only non-volatile TCAM can accommodate the large memory footprint in an area-efficient way. This paper introduces GeNVoM, a scalable, energy-efficient and high-throughput solution. Instead of optimizing an algorithm developed for general-purpose computers or GPUs, GeNVoM rethinks the algorithm and non-volatile TCAM-based accelerator design together from the ground up. Thereby GeNVoM can improve the throughput by up to 3.67×; the energy consumption, by up to 1.36×, when compared to an ASIC baseline, which represents one of the highest-throughput implementations known.

Variation aware power management for GPU memories

In the midst of progressively shrinking silicon technologies, enhancements in performance and area requirements come at the cost of some side effects. One such cost is the deviation of nominal parameters of process, voltage, and temperature. Considered a manufacturing defect, variations limit the maximum achievable performance. These affected areas possess lower reliability and consume more power than their theoretical counterpart.In this paper, we study and mitigate variations observed in GDDRx based GPU memories. GPU devices are exploited primarily for their massive parallelism and applications with both regular and irregular memory accesses see significant performance benefits. We also find that these consume a significant portion of the total GPU power. We propose a variation mitigating and power-saving technique for GPU memories. This accounts for a power savings of up to 44.61% (20.3% on average). Simultaneously, we also maintain the device data which prevents page faults and re-computation costs. This, however, leads to some performance overheads, which are limited to 4%. Mitigation of process variation combined with state preservation leads to more reliable GPU computations. Additionally, our model lowers access latencies by 15.7% in comparison to a variation affected baseline GPU, which ultimately helps to improve the throughput of the device.