Gate Width Research Articles

Two-dimensional laser-induced incandescence for soot volume fraction measurements: issues in quantification due to laser beam focusing

Two-dimensional laser-induced incandescence (LII) measurements usually involve the use of a cylindrical lens to illuminate the planar region of interest. This creates a varying laser fluence and sheet width in the imaged flame region which could lead to large uncertainties in the quantification of the 2D LII signals into soot volume fraction distributions. To investigate these effects, 2D LII measurements using a wide range of laser pulse energies were performed on a premixed flat ethylene–air flame while employing a cylindrical lens to focus the laser sheet. Using shorter focal length of the focusing lens resulted in larger variation of the LII signal profiles across the flame. A heat – and – mass – transfer - based LII model was also used to simulate the measurements and good agreement was found. The ratio between focal length (FL) and image length (IL) was introduced as a useful parameter for estimating the bias in estimated soot volume fractions across the flame. The general recommendation is to maximize this FL/IL ratio in an experiment, which in practice means the use of a long focal length lens. Furthermore, the best choices of laser fluence and detection gate width are discussed based on results from these simulations.

Lateral variation doped wide bottom trench gate IGBT for reduced on-resistance with improved gate charge

In this paper, novel concept of lateral variation doping profile in the drift region for IGBT is presented. The variation profile divides the drift region in four sections in such a way that highly doped p+ and n+ pillars are present at the center, while pillars with lesser concentration are situated at the drift region boundary. Higher concentration below the channel region, enables the presence of more free charges in the conduction path thereby reducing the specific resistance (Ron.A) in the conduction path. The p- and n- section reduces the critical electric field at the corner and maintains the similar breakdown voltage in comparison with the conventional design despite of higher concentration doping profile at the middle. Proposed structure offers 19% improvement in current density and 16% reduction in Ron.A. Lateral variation doped structure also able to reduce on-state voltage drop (Von) by 15.38%. Along with the lateral doping concept, Proposed structure utilizes the broad oxide at the gate region in order to improve the switching performance. The increment in the oxide thickness reduces the gate to collector capacitance (CGC) and leads to reduces the gate to collector charge (QGC) by 30%. Reduction in gate charge also improve the switching performance of the devices and reduces the energy losses during the turn-off period. The 20% improvement in turn-off losses at same on-state voltage drop is observed. Additionally, 5% improvement in the on-state voltage drop is also achieved. Additionally, various figure of merit (FOM) is also evaluated. The Baliga's FOM and industrial FOM is improved by 19% and 55% respectively as compared to conventional design.

Monte Carlo Comparison of n-Type and p-Type Nanosheets With FinFETs: Effect of the Number of Sheets

Analytic doping profiles and contact resistivities are adjusted to reproduce measured transfer characteristics of state-of-the-art n-type and p-type FinFETs by Monte Carlo device simulation. The results are used to compare the performance of nanosheets (NSs) and FinFETs at advanced-node device dimensions. It is found that the ON-current normalized by the effective gate width reduces for a higher number of sheets due to a higher access resistance of the lower-lying sheets. In order to reach the same absolute current level of FinFETs with a fin height of 55 nm, more than two sheets for n-type and about four sheets for the p-type NSs with a NS width of 16 nm are needed, respectively. This technology computer-aided design (TCAD) approach can serve as input for design-technology cooptimization (DTCO) of advanced devices.

Geometric Modeling of Thermal Resistance in GaN HEMTs on Silicon

In this article, pulsed measurements of thermal resistance in GaN-based high-electron mobility transistors (HEMTs) on silicon, with different gate geometries and gate-to-drain extensions, are analyzed and modeled. Simple expressions for the thermal resistance of silicon-on-insulator (SOI) MOSFETs, which take into account the gate width and channel length, can be adapted to model the thermal resistance of these GaN-based HEMTs. Narrow width effects and the increase in the heat flow through the gate as the channel length increases were correctly reproduced. In addition, numerical simulations were performed to explain the reduction obtained in thermal resistance as the gate-to-drain extension increases. Our approach can also be applied easily to other well-established models using circuit simulators.

Fabrication and Modeling-Based Performance Analysis of Circular GaN MOSHEMT-Based Electrochemical Sensors

C-MOSHEMT (Circular-Metal Oxide Semiconductor High Electron Mobility Transistor) has been modeled, fabricated and sensitivity analysis has been done for pH detection application for the first time. Prototype model of the sensor has been developed considering a ring gate structure. The perimeter of the gate inner ring is taken as the gate length and a gate width of 100 μm has been used to plot normalized device characteristics. Advantage of C-MOSHEMT over L-MOSHEMT (linear MOSHEMT) is that the area available for sensing increases and process cost and complexity involved remains low from the fabrication point of view. The overall fabrication cost and process overheads reduce with elimination of the mesa isolation etch. ALD (Atomic Layer Deposition) deposited Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> used as the gate oxide and passivation scheme in the device design ensures higher sensitivities along with current collapse free device operation. Analytical model along with experimental analysis have been done using 3 standard buffer pH samples, pH=4, 7, and 9.2. The devices fabricated showcase a maximum sensitivity of 1.74 mA/pH and 1.86 mA/pH when gate lengths (L <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</sub> ) of 3 μm and 5μm are considered. Further, the model and the physical detection results are compared and contrasted to study the strengths and weaknesses of the model developed. It has been observed that as sensing area is doubled, the sensitivity increases by 41% which can be attributed to the discreteness of charge distribution on the sensing surface.

Robot-assisted non-destructive testing of automotive resistance spot welds

A commercially available matrix phased array (MPA) ultrasonic imaging system was successfully integrated into a robot-assisted automated non-destructive testing (NDT) method for resistance spot weld applications. The NDT system utilizes a dual-time gate feature, where optimized time gate positions and widths were determined for near-normal incidence inspections of spot welds in thin materials. The effects of probe contact pressure and ultrasonic beam incident angle were also studied using the robot arm. Based on the current robot-assisted automated NDT results, an optimized contact pressure of 0.5 lb, and an incidence angle of ± 0.5o relative to the normal direction were determined. Under these optimum probe contact conditions, it was found that a measurement uncertainty of less than 5% can be achieved when the gate position is set to be between one-half and two-third positions of the total part thickness, along with a gate width equals to one-third of the total stack thickness.

Simulation and prediction of discharge coefficient of combined weir–gate structure

Combined weir–gate structures are important structures for controlling the water level, measuring discharge and avoiding sediment deposition behind a weir. They can be used, for example, in irrigation channels and waste water systems. Using three-dimensional numerical software (Flow-3D) and experimental data from the literature, four combined systems of a triangular weir and a rectangular gate with different geometries were simulated. Dimensional analyses were then performed to determine the dimensionless parameters that affect the discharge coefficient of such structures. Four different intelligent system models were used to estimate the discharge coefficient and their results were compared. It was found that Flow-3D is highly capable of simulating the flow over a combined structure. Goodness of fit criteria also showed that the numerical solver estimated the water head and discharge coefficient very well. The results of all the models showed that the discharge coefficient had an inverse relation with the dimensionless parameters h/b, h/d and h/y (h being the water head over the weir, b the gate width, d the gate height and y the distance between the bottom of the weir and above the gate); the discharge coefficients were 0·3–0·9. Accuracy analyses of six intelligent system models showed that the multi-layer perceptron model was the superior model, followed by the M5P model, the regression equation, the radial basis function and the generalised regression neural network model.

Analisis Dan Evaluasi Sistem Drainase (Studi Kasus: Ruas Jl. Coklat, Kel. Bongkaran Kec. Pabean Cantikan, Kota Surabaya)

The city of Surabaya is one of the big cities in Indonesia. Like other cities, Surabaya also has problems, especially problems regarding flooding. The problem of flooding in the city of Surabaya can be classified into 2 (two). Namely, drainage problems due to natural factors and man-made. One of the roads that are still regularly flooded in Surabaya when it rains is Jalan Coklat. In this study the authors analyzed using secondary data from related agencies from field observations. These data include rainfall data, inundation data, tide data and dimensions of existing canals and other complementary structures. From these data, it can be obtained that the average rainfall value is 97.54 mm / day, the rain intensity is 214.88 mm / hour for the 10th period, while the Flood Debit Q Planning is 0.95 m3 / sec, and the discharge in the existing channel can be 0, 849 m3 / second. From the Tide Data, it is obtained that the peak of the tide is 150 cm high on December 13, 2016 and the lowest low tide is 130 cm on January 25, 2016. From the calculation and analysis results in the area that affects the occurrence of inundation is the channel dimension with Width: 50 x Height: 80 cm From the analysis of the calculation of the redesign using the box culvert, the dimensions of each box are obtained, namely the width of the box culvert: 80 x height: 100 x length: 120 cm for the 10th period with a capacity of 2.227 m3 / second. If the rainfall is high in the area and the water level in the Kalimas river is overflowing, the results of the analysis need to install a floodgate with the dimensions of the sluice gate Width: 60 x Height: 180 x Thickness: 1 cm so that when there is back water in the jl area . Brown floodgates function and when the rainfall is also high, the floodgates are already operating, so to reduce water puddles, it is necessary to use the help of a pump. From the analysis results, the pump capacity is 2.5 m3 / second.

Variation resilient reliable design of trigger pulse generator

This study presents a robust design of a trigger pulse generator that produces trigger pulses of variable widths/durations that are tuned using an external control as per the requirements. The proposed design comprises two elementary modules: a delay element and an XOR circuit. The proposed circuit is implemented using a 16 nm CMOS technology node and simulation results have been verified using the SPICE simulator. Various performance parameters such as power consumption, power delay-product, energy-delay product and impact of key circuit parameters [supply voltage (V DD), channel length (Lg), gate width (Wg), channel doping concentration (N A), oxide thickness (T OX), threshold voltage (V T) and carrier mobility (µ o)] on the duration of trigger pulses have been studied in-depth and performance parameters are compared with circuits already available in the literature. The proposed circuit produces trigger pulses of a minimum width of 191.3 ps at a nominal supply of 1.0 V with an average power consumption of 160 nW. The width of the trigger pulses can be varied from 191.3 to 457.2 ps using an external control from 1.0 to 0.7 V, respectively, at 16 nm technology node.

Vertical GaN MISFET for chip‐on‐chip high speed laser driving applications

In this work, the authors developed vertical gallium nitride metal-insulator-semiconductor field-effect transistors (GaN MISFETs) for direct chip-on-chip assembly with gallium arsenide-based broad area distributed Bragg reflector diode laser. The intention of this work had been to provide a high-speed driver solution having extremely small parasitic inductive loops. It is shown that devices manufactured on ammonothermal substrates have large conduction current density above 1.7 kA/cm2, specific on-state resistance as low as 2.1 mΩ·cm2 and on-state sheet resistance of 18.6 Ω·mm. It is further shown that scaling these devices to large gate periphery chips is possible. Finally, a low inductance vertical GaN MISFET on laser diode integration assembly is realised on an AlN ceramic board using a transistor chip with 142 mm gate width and 305 mΩ on-state resistance. The arrangement enables 3.6 ns laser pulses at an emission wavelength at 904 nm and a peak optical power of 4 W.

Scalability of Multifinger HEMT Performance

This letter aims at investigating the impact of the gate width on the microwave field effect transistor (FET) performance, focusing on the GaAs high-electron-mobility transistor (HEMT) technology as a case study. To accomplish this complex task, the small-signal equivalent-circuit elements together with the major RF figures of merit are thoroughly analyzed for seven HEMTs based on an interdigitated layout. The gate-width impact on the device performance is quantitatively and exhaustively estimated using a mathematical and systematical approach.

Experimental study on free and submerged multi-jets

The flow characteristics of the hydraulic jump due to parallel jets are different from the classical jump emerging from a single gate. Due to the highly complex flow field at the downstream pool, deciding about the tailwater measuring location is a challenging issue affecting the flow measuring accuracy. Experiments are conducted herein, on different parallel jets’ configurations for both free and submerged flow conditions. To quantify the flow uniformity, for any downstream cross section, the associated momentum correction factors, β2, were estimated for the free-flow condition. It is found that β2-values depend significantly on the measuring location, and consequently the available conjugated depths relationship results in poor estimation when measuring location moves downstream. Employing Buckingham analysis, a general formula is proposed to calculate the momentum correction factors associated with the free hydraulic jump at different downstream measuring locations. The experimental results of this study indicated that such a formula enhances distinguishing between free and submerged flow conditions of the gates installed in parallel. Finally, a dimensionless stage-discharge formula is presented to predict the submerged flow rate through parallel gates of different gate openings and widths.

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Dispersion effects in on‐state resistance of lateral Ga 2 O 3 MOSFETs at 300 V switching

Static characterisation and fast switching processes of lateral β-Ga2O3 metal oxide semiconductor field-effect transistors (MOSFETs) are presented. The investigated transistors with 10 mm gate width and 6 µm gate drain distance achieve on-state resistances of 5 Ω and saturation currents above 2.4 A. Hard switching in a double pulse test setup with an inductive load results in voltage slopes up to 65 V/ns at 300 V input voltage. After longer blocking times and higher DC voltages, a strong dynamic increase in on-state resistance occurs. Switching with an ohmic load and different load currents reveals only minor influence of the hot electron mechanism during the hard turn on. However, a clear influence of the turn-on gate drive voltage on the dynamic increase is observed, indicating a shift of the transfer characteristic due to charge trapping in the gate region.

Discharge coefficient in the combined weir-gate structure

The present study investigated the flow discharge coefficient (Cdt) in the combined rectangular broad crested weir-gate structure. To this end, the effect of the following dimensionless parameters on the Cdt were investigated: the width ratio of the central weir to the width of the total structure (B/Bo), the height ratio of the central weir to the height of the central weir floor (Z/P), the ratio of the gate width to the width of the total structure (b/Bo), the ratio of the gate opening height to the height of the central weir floor (d/P), and the ratio of the head on central weir to the total head behind the structure (h1/H). The Flow-3D numerical model, artificial intelligence models such as linear multilayer perceptron (MLP), Canfis network (CNN), recurrent network (RNN), modular neural network (MNN), and regression equation, were used to estimate the Cdt. The results indicated that increasing d/P and b/Bo ratios led to a decline in this coefficient. In the case of h1/H ≤ 0.4, an increase in B/Bo ratio resulted in decreasing the turbulence intensity and Cdt while the impact of enhancing the size of B/Bo was not significant if h1/H > 0.4. Besides, increasing Z/P ratio caused an increase in resistance against the flow and thus a decline in Cdt. Further, the results of artificial intelligence models and regression equation demonstrated that the MNN model with an RMSE and R2 of 0.03 and 0.97, respectively, could have an accurate estimate of the Cdt values.

Modeling of TID-induced leakage current in ultra-deep submicron SOI NMOSFETs

In order to study the total ionizing dose effects (TID)-induced degradation mechanism of 130 ​nm partially depleted (PD) silicon-on-insulator (SOI) NMOSFETs, a SPICE model including the TID effects was established with Verilog-A.The total ionizing dose effects will lead to the threshold-voltage shift and the leakage current increase of SOI NMOSFETs. The increase of leakage current in the STI region is the main factor leading to degradation of characteristics of devices, which will form a parasitic transistor. Based on the standard BSIM SOI process model, the SPICE model of leakage current of the STI parasitic transistor is added, and the variation of equivalent gate width and gate oxide thickness caused by radiation-induced trapped charges are considered.The devices with different width-length-ratios and different bias conditions are considered in our experiments, and the model can effectively reflect the variation of current characteristics before and after radiation, and provide a reference to develop a radiation-hardening technology.

Study of third-order intercepts and nonlinear distortion level for S-H GaAs HEMTs

Third-order intercept (TOI) and nonlinear distortion level (NDL) are studied for two GaAs based single heterostructure HEMTs of different gate width such as (200 μm × 0.5 μm) and (150 μm × 0.5 μm). The TOI being a specific figure of merit is a biasing, input power, frequency-dependent term which is related to the third-order intermodulation distortion (IMD3) component and the study extended from low to high temperatures. The main findings are that the output referenced TOI decreased while the input referenced TOI increased with frequency. Within the measured temperature range, the TOI and NDL change significantly following the behaviour of the IMD3 component. This data would offer assistance in a way that enhances insight of the performance of the GaAs based device working at high frequency and temperature to evaluate the impacts of device nonlinearity on the affectability of the radio and to identify a distortion-free operation.

Optimizing Extreme Learning Machines Using Chains of Salps for Efficient Android Ransomware Detection

Nowadays, smartphones are an essential part of people’s lives and a sign of a contemporary world. Even that smartphones bring numerous facilities, but they form a wide gate into personal and financial information. In recent years, a substantial increasing rate of malicious efforts to attack smartphone vulnerabilities has been noticed. A serious common threat is the ransomware attack, which locks the system or users’ data and demands a ransom for the purpose of decrypting or unlocking them. In this article, a framework based on metaheuristic and machine learning is proposed for the detection of Android ransomware. Raw sequences of the applications API calls and permissions were extracted to capture the ransomware pattern of behaviors and build the detection framework. Then, a hybrid of the Salp Swarm Algorithm (SSA) and Kernel Extreme Learning Machine (KELM) is modeled, where the SSA is used to search for the best subset of features and optimize the KELM hyperparameters. Meanwhile, the KELM algorithm is utilized for the identification and classification of the apps into benign or ransomware. The performance of the proposed (SSA-KELM) exhibits noteworthy advantages based on several evaluation measures, including accuracy, recall, true negative rate, precision, g-mean, and area under the curve of a value of 98%, and a ratio of 2% of false positive rate. In addition, it has a competitive convergence ability. Hence, the proposed SSA-KELM algorithm represents a promising approach for efficient ransomware detection.

Large-Area Lateral AlGaN/GaN-on-Si Field-Effect Rectifier With Low Turn-On Voltage

In this letter, we report a large-area lateral AlGaN/GaN-on-Si power rectifier as diode with low turn-on voltage. The lateral field-effect rectifier (LFER) is based on a normally-off HEMT in reverse conduction with very low threshold-voltage and shorted gate-source terminal. A p-GaN gate module was used to realize the normally-off HEMT. The large-area LFER achieves a turn-on voltage of down to 0.2 V, a specific on-resistance of 10.8 $\text{m}\Omega \times {\mathrm {cm}}^{2}$ , a maximum current of above 9 A with a gate width of 87 mm, and a leakage current of $57~\mu \text{A}$ /mm at a blocking voltage of 500 V. Test structures exhibit a breakdown voltage of 676 V. The effect of different depletion zone lengths, temperature influences and distribution on the turn-on voltage are investigated. Finally, this work shows that this approach of a p-GaN LFER has a great potential for rectifiers for next-generation power electronics.

Testing of Folding Wingtip for Gust Load Alleviation of Flexible High-Aspect-Ratio Wing

Folding wingtips have begun to feature on recent aircraft designs, as a solution for compliance with existing airport gate width regulations while enabling high-aspect-ratio wings for lower induced drag and better overall fuel efficiency. Recent studies have suggested that by allowing folding of the wingtip during flight, additional gust load alleviation can be achieved. This paper describes the first experimental study of the folding wingtip concept, when applied to a highly flexible, high-aspect-ratio wing. Using a low-speed wind tunnel with a vertical gust generator, the experiment examined the load alleviation performance through a range of one-minus-cosine gust inputs and found up to 11% reduction in peak wing-root bending moment. In addition, a movable secondary aerodynamic surface was fitted to the folding wingtip, which demonstrated that such a device was able to control the orientation of the folding wingtip effectively in steady aerodynamic conditions, as well as achieving further reduction in peak wing-root bending moment during gust encounters through active control.