Abstract
In order to study the total ionizing dose effects (TID)-induced degradation mechanism of 130 nm partially depleted (PD) silicon-on-insulator (SOI) NMOSFETs, a SPICE model including the TID effects was established with Verilog-A.The total ionizing dose effects will lead to the threshold-voltage shift and the leakage current increase of SOI NMOSFETs. The increase of leakage current in the STI region is the main factor leading to degradation of characteristics of devices, which will form a parasitic transistor. Based on the standard BSIM SOI process model, the SPICE model of leakage current of the STI parasitic transistor is added, and the variation of equivalent gate width and gate oxide thickness caused by radiation-induced trapped charges are considered.The devices with different width-length-ratios and different bias conditions are considered in our experiments, and the model can effectively reflect the variation of current characteristics before and after radiation, and provide a reference to develop a radiation-hardening technology.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
