Gate Polarity Research Articles

Persistent polarization effects and memory properties in ionic-liquid gated InAs nanowire transistors

Iontronics exploits mobile ions within electrolytes to control the electronic properties of materials and devices' electrical and optical response. In this frame, ionic liquids are widely exploited for the gating of semiconducting nanostructure devices, offering superior performance compared to conventional dielectric gating. In this work, we engineer ionic liquid gated InAs nanowire-based field effect transistors and adopt the set-and-freeze dual gate device operation to probe the nanowires in several ionic gate regimes. We exploit standard back-gating at 150 K, when the ionic liquid is frozen and any crosstalk between the ionic gate and the back gate is ruled out. We demonstrate that the liquid gate polarization has a persistent effect on the nanowire properties. This effect can be conveniently exploited to fine-tune the properties of the nanowires and enable new device functionalities. Specifically, we correlate the modification of the ionic environment around the nanowire to the transistor threshold voltage and hysteresis, on/off ratio and current level retention times. Based on this, we demonstrate memory operations of the nanowire field effect transistors. Our work shines a new light on the interaction between electrolytes and semiconducting nanostructures, providing useful insights for future applications of nanodevice iontronics.

Mole Fraction-Based Approach for Sensitivity Analysis of Dual Material Control Gate Polarity Controlled Tunnel Field Effect Transistor for Applications in Biomedical Engineering

The fabrication complexity and cost associated with nanoscale devices are major concerns. Therefore, to address these challenges, we have introduced a mole fraction-based approach for the sensitivity analysis of a dual material control gate cavity on a source electrically doped polarity-controlled tunnel field effect transistor (DMCG-CS-ED-PC-TFET)-based biosensor for label-free detection of biomolecule species. For this purpose, a polarity bias (electrically doped) of PG-[Formula: see text][Formula: see text]V and PG-[Formula: see text][Formula: see text]V is applied for the formation of n+ drain and p+ source regions, respectively, over the thin silicon body. The proposed device structure overcomes the random dopant fluctuation issues, thereby avoiding thermal budget and fabrication complexity as compared to the conventional TFET. Moreover, the nanogap cavity is created by etching the appropriate portion at the source side oxide layer. Furthermore, we have applied a dual metal work function (M1 and M2) at the gate electrode along with hetero material [Formula: see text] at the source side region to improve the sensitivity of the device by varying the mole fraction value (X). The performance of the proposed device has been evaluated in terms of variations in carrier concentration profile, electric field variation, energy band diagram, transfer ([Formula: see text]) characteristics and the sensitivity in terms of drain current (I[Formula: see text]), ON-state current (I[Formula: see text]) and switching ratio (I[Formula: see text]/I[Formula: see text]). Furthermore, the sensitivity of the proposed device biosensor has been investigated by considering nanocavity dimensions, practical challenges such as various fill factors, and various step profiles generated from steric hindrance. For this purpose, different neutral biomolecules such as Biotin ([Formula: see text]), APTES ([Formula: see text]), Keratin ([Formula: see text]), Ferrocytochrome C ([Formula: see text]) and Gelatin ([Formula: see text]) have been considered in the etched nanocavity region. Additionally, charged biomolecules with positive (negative) charge densities at the oxide semiconductor interface below the nanocavity region have been incorporated to assess the performance of the proposed device using the Silvaco ATLAS device simulator. In this analysis, the proposed biosensor achieves a drain current sensitivity of [Formula: see text] for neutral biomolecules ([Formula: see text]), [Formula: see text] for [Formula: see text] = [Formula: see text] cm[Formula: see text] with [Formula: see text] and [Formula: see text] for [Formula: see text] = [Formula: see text] cm[Formula: see text] and [Formula: see text]. Finally, the performance of the proposed biosensor, DMCG-CS-ED-PC-TFET, exhibits higher sensitivity compared to various existing TFET-based biosensors. Hence, the proposed biosensor exhibits the potential candidate for the development of future sensing bio-equipment.

Dynamic FET-based memristor with relaxor antiferroelectric HfO2 gate dielectric for fast reservoir computing

Reservoir computing (RC), as a framework for artificial intelligence (AI) computation, is derived from recurrent neural networks, but with higher efficiency benefits from its much simpler training process. A hardware-based physical RC employs a reservoir that is a fixed non-linear system, and in a simple RC structure, the reservoir is ideally a short-term dynamic field effect transistor-based memristor. In this work, we demonstrate that reservoir computing employing a polarization-modulated transistor as a physical reservoir with a relaxor antiferroelectric back gate significantly reduces parameters, power consumption, and calculation steps of the neural network. Here, relaxor antiferroelectricity is realized in an Al-doped Hf0.5Zr0.5O2 (Al:HZO) thin film, and with the poling process-sensitive modulation of the Al:HZO gate dielectric, a dynamic and polarization field-modulated transistor is demonstrated as a short-term memristor. This short-term memory behavior is further used to encode binary images to form a reservoir for fast image processing, where the reservoir mimics small convolution operations to convert images. This reservoir computing is also applied to image classification, denoising, and similarity judgment, and very reliable results are obtained. This work provides a new approach to hardware-based physical reservoir computing.

Effect of CNT Parameter Variations on CNTFET Amplifier Performance

In this paper we propose a procedure to study the dependence of a CNTFET amplifier performance on CNT parameters that fully identify the geometrical properties of a regular CNT. In particular these parameters are the length and structural indices (n,m) of CNT. We analyse the effects on a linear common source amplifier using a N type CNTFET with a resistive gate polarization. We polarize at a fixed drain voltage and current, gradually changing the CNT parameters. As regards the indices, we present the analysis for a zig-zag CNT. However the proposed procedure can be applied to other types of CNT. We show the effect on gain, on the 3 dB cut off frequency, F3dB, on the input and output resistances, obtaining that F3dB has a clear inverse dependence on the length and that also decreases at higher structural indices for zig-zag CNT.

An Electrochemical-Electret Coupled Organic Synapse with Single-Polarity Driven Reversible Facilitation-to-Depression Switching.

Neuromorphic engineering and artificial intelligence demands hardware elements that emulates synapse algorithms. During the last decade electrolyte-gated organic conjugated materials have been explored as a platform for artificial synapses for neuromorphic computing. Unlike biological synapses, in current devices the synaptic facilitation and depression are triggered by voltages with opposite polarity. To enhance the reliability and simplify the operation of the synapse without lowering its sophisticated functionality, here, an electrochemical-electret coupled organic synapse (EECS) possessing a reversible facilitation-to-depression switch,is devised. Electret charging counterbalances channel conductance changes due to electrochemical doping, inducing depression without inverting the gate polarity. Overall, EECS functions as a threshold-controlled synaptic switch ruled by its amplitude-dependent, dual-modal operation, which can well emulate information storage and erase as in real synapses. By varying the energy level offset between the channel material and the electret, the EECS's transition threshold can be adjusted for specific applications, e.g., imparting additional light responsiveness to the device operation. The novel device architecture represents a major step forward in the development of artificial organic synapses with increased functional complexity and it opens new perspectives toward the fabrication of abiotic neural networks with higher reliability, efficiency, and endurance.

Temperature dependent charge transport in ferroelectrically gated graphene far from the Dirac point

Charge transport in ferroelectric (FE) gated graphene far from the Dirac point (DP) was studied in the temperature range 300 K < T < 350 K. A non-monotonic/monotonic/non-monotonic behavior in the conductivity [σ(T)] was observed as one moved away from the DP. As the gate polarization increased, additional impurity charges were compensated, which reduced charge scattering. The uncompensated charges doped graphene and σ(T) switched to a monotonic increase with increasing T. However, far from the DP, the polarization reached saturation, which resulted in still lower impurity charge scattering. The carrier concentration increased, and a non-monotonic response in σ(T) reappeared, which was attributed to phonon scattering. A theoretical model is presented that combined impurity charge and phonon scattering conduction mechanisms. The top gate polarizable FE provided a novel approach to investigate charge transport in graphene via controlled compensation of impurity charges, and in the process revealed non-monotonic behavior in σ(T) not previously seen in SiO2 back gated graphene devices.

Gate-controlled polarization-resolving mid-infrared detection at metal–graphene junctions

The ability to resolve the polarization of light with on-chip devices represents an urgent problem in optoelectronics. The detectors with polarization resolution demonstrated so far mostly require multiple oriented detectors or movable external polarizers. Here, we experimentally demonstrate the feasibility to resolve the polarization of mid-infrared light with a single chemical-vapor-deposited graphene-channel device with dissimilar metal contacts. This possibility stems from an unusual dependence of photoresponse at graphene–metal junctions on gate voltage and polarization angle. Namely, there exist certain gate voltages providing the polarization-insensitive signal; operation at these voltages can be used for power calibration of the detector. At other gate voltages, the detector features very strong polarization sensitivity, with the ratio of signals for two orthogonal polarizations reaching ∼10. Operation at these voltages can provide information about polarization angles, after the power calibration. We show that such unusual gate- and polarization-dependence of photosignal can appear upon competition of isotropic and anisotropic photovoltage generation pathways and discuss the possible physical candidates.

Fading of pMOS dosimeters over a long period of time

The fading of radiation-sensitive p-channel metal-oxide-semiconductor field-effect transistors (known as RADFETs or pMOS dosimeters) over a long time period of 10 years after irradiation has been investigated. Fading is, in addition to sensitivity, another characteristic of pMOS radiation dosimeters. It is considered as the recovery of threshold voltage of irradiated pMOS dosimeters during ambient annealing without gate polarization. Usually, there are the fading data for few months after irradiation only. Although fading is a very important dosimetric characteristic, here it is given for the first time in the literature in such a long period of time. Two types of pMOS dosimeters with oxide thicknesses of 400 and 1000 nm are used. They are irradiated without and with a 5 V polarization on the gate. For the first time, the authors came to a very significant result that the key role in fading has the voltage applied during irradiation, but not the thickness of the oxide, and that the pMOS dosimeters irradiated with gate voltage of 5 V have greater fading than pMOS dosimeters irradiated without a gate voltage. Fitting of threshold voltage shift and fading, performed using the radiation-induced Eγ and Es traps, shows very good agreement with the experimental values.

Commercial P-Channel Power VDMOSFET as X-ray Dosimeter

The possibility of using commercial p-channel power vertical double-diffused metal-oxide-semiconductor field-effect transistors (VDMOSFETs) as X-ray sensors is investigated in this case study. In this aspect, the dependence of sensitivity on both the gate voltage and the mean energy for three X-ray beams is examined. The eight gate voltages from 0 to 21 V are applied, and the dependence of the sensitivity on the gate voltage is well fitted using the proposed equation. Regarding X-ray energy, the sensitivity first increases and then decreases as a consequence of the behavior of the mass energy-absorption coefficients and is the largest for RQR8 beam. As the mass energy-absorption coefficients of SiO2 are not found in the literature, the mass energy-absorption coefficients of silicon are used. The behavior of irradiated transistors during annealing at room temperature without gate polarization is also considered.

Nonlinear intensity dependence of edge photocurrents in graphene induced by terahertz radiation

We report on the observation of terahertz radiation induced edge photogalvanic currents in graphene, which are nonlinear in intensity. The increase of the radiation intensities up to MW/cm$^2$ results in a complex nonlinear intensity dependence of the photocurrent. The nonlinearity is controlled by the back gate voltage, temperature and radiation frequency. A microscopic theory of the nonlinear edge photocurrent is developed. Comparison of the experimental data and theory demonstrates that the nonlinearity of the photocurrent is caused by the interplay of two mechanisms, i.e. by direct inter-band optical transitions and Drude-like absorption. Both photocurrents saturate at high intensities, but have different intensity dependencies and saturation intensities. The total photocurrent shows a complex sign-alternating intensity dependence. The functional behaviour of the saturation intensities and amplitudes of both kinds of photogalvanic currents depending on gate voltages, temperature, radiation frequency and polarization is in a good agreement with the developed theory.

Dispersive Transport of Hydrogen in MOS Structures after Exposure to Ionizing Radiation

It is shown that the description of the dispersive transport of H+ ions, based on the multi-trapping model, allows quantitative description of the kinetics of surface-state formation in metal-oxide-semiconductor (MOS) structures after exposure to ionizing radiation. The time dependences of the density of surface states on the gate dielectric thickness, electric-field strength and polarity are simulated. It is shown that the kinetics of surface-state formation is controlled by the levels of localized states of hydrogen ions in the range from 0.76 to 0.98 eV, the trap concentrations in both the bulk and SiO2 region adjacent to the substrate, and depends on the initial distribution of H+ ions.

(Invited) Utilizing the Properties of Transition Metal Dichalcogenides and Black Phosphorus for Novel Device and Circuit Applications

Many novel low-dimensional materials have been explored over the course of the past two decades, and it has widely been acknowledged that one-dimensional (1D) materials like nanotubes and nanowires and two-dimensional (2D) materials like transition metal dichalcogenides (TMDs) and black phosphorus (BP) offer unique opportunities and challenges when it comes to electronic applications. One aspect of 1D and 2D materials that makes them unique is the opportunity to build three-terminal transistor devices from them that show excellent response to the gate terminal due to the ultra-thin body of these materials. This tight gate control allows in particular achieving so-called ambipolar device characteristics that enable electron or hole currents to flow through the channel, depending on the chosen gate voltage polarity. However, in general, having both current polarities being present in the same device is not desirable for complementary metal-oxide semiconductor (CMOS) type circuits. In my presentation I will discuss how a properly designed device structure enables suppression of one type of carrier without losing the ability of generating n-type or p-type field-effect transistors (FETs) at will from the same channel material in the same gate geometry. Moreover, I will discuss how this concept translates into an opportunity to camouflage the circuit performance through the formation of devices that are only revealing their n-type or p-type nature through application of the correct gate and drain voltage polarity. Moreover, I will discuss in the context of the device performance the importance of gated contacts and will elucidate how in the past wrong mobility values were extracted by ignoring a particular feature of contacts to ultra-thin body FETs.

A compact model of transconductance and drain conductance for DMG-GC-DOT cylindrical gate MOSFET

A compact model for dual-material gate graded-channel and dual-oxide<br />thickness with two dielectric constant different cylindrical gate (DMG-GC-<br />DOTTDCD) MOSFET was investigated in terms of transconductance, drain<br />conductance and capacitance. Short channel effects are modeled with simple<br />expressions, and incorporated into the core of the model (at the drain<br />current). The design effectiveness of DMG-GC-DOTTDCD was monitored<br />in comparing with the DMG-GC-DOT transistor, the effect of variations of<br />technology parameters, was presented in terms of gate polarization and drain<br />polarization. The results indicate that the DMG-GC-DOTTDCD devices<br />have characteristics higher than the DMG-GC-DOT MOSFET. To validate<br />the proposed model, we used the results obtained from the simulation of the<br />device with the SILVACO-ATLAS-TCAD software.

Reconfigurable horizontal–vertical carrier transport in graphene/HfZrO field-effect transistors

We have fabricated at wafer level field-effect-transistors (FETs) having as channel graphene monolayers transferred on a HfZrO ferroelectric, grown by atomic layer deposition on a doped Si (100) substrate. These FETs display either horizontal or vertical carrier transport behavior, depending on the applied gate polarity. In one polarity, the FETs behave as a graphene FET where the transport is horizontal between two contacts (drain and grounded source) and is modulated by a back-gate. Changing the polarity, the transport is vertical between the drain and the back-gate and, irrespective of the metallic contact type, Ti/Au or Cr/Au, the source–drain bias modulates the height of the potential barrier between HfZrO and the doped Si substrate, the carrier transport being described by a Schottky mechanism at high gate voltages and by a space-charge limited mechanism at low gate voltages. Vertical transport is required by three-dimensional integration technologies to increase the density of transistors on chip.

Temperature dependent lateral and vertical conduction mechanisms in AlGaN/GaN HEMT on thinned silicon substrate

This paper presents the influence of Si substrate thinning by grinding and dicing on the mechanical and electrical properties of AlGaN/GaN HEMT grown on 6-inch Si substrate. By experimentally removing 96% of the Si substrate, an increase in the lateral breakdown voltage by 13% is achieved for a wide temperature range. A decreasing vertical breakdown voltage with substrate thinning shows the necessity of substrate replacement to maintain the vertical isolation. Poole-Frenkel and space charge limited conduction mechanisms are identified for the vertical leakage in forward and reverse bias down to thicknesses of 200 μm, respectively. The increase in chip bow and the resulting increase in tensile strain in the epitaxial layers resulting from the substrate removal are correlated to a 40% decrease in 2DEG charge carrier concentration along with a 27% increase in threshold voltage. These findings are explained by strain-induced gate barrier and polarization charge variations.

Effect of the Built-in Surface Potential on the I–V Characteristics of Silicon MIS Structures

The regularities of the modification of I–V characteristics of MIS structures via forming built-in surface potentials induced during the fabrication of an atomically pure silicon crystal surface using microwave plasma micromachining in different chemically active gaseous media are investigated. The effect of surface potentials on the slope of the I–V characteristics of the MIS devices and the value of their asymmetry at the reversal of the gate polarity are established. The increase in the slope of the I–V characteristics is attributed to the weakening of the diffuse scattering of electrons during the formation of negatively charged surface trap states at the interface and an increase in their mobility in the space charge layer at the semiconductor surface.

Role of gate current and polarization switching in sub-60 mV/decade steep subthreshold slope in metal–ferroelectric HfZrO2–metal–insulator–Si FET

We experimentally observed a sub-60 mV/decade steep subthreshold slope (SS) in metal–ferroelectric HfZrO2 (FE:HZO)–metal–insulator–Si (MFMIS)-FET. We investigated its physical mechanism by monitoring gate leakage current, which enabled us to trace polarization switching. We fabricated MFMIS-FET by integrating an FE:HZO capacitor on a conventional MISFET. In our MFMIS-FET fabricated on MISFET with a leaky gate insulator, sub-60 mV/decade SS was observed along 2 decades of drain current, and the minimum SS was 21 mV/decade. The observed steep SS can be explained with a novel physical model by combining the charge injection to the internal gate and the polarization switching in FE:HZO. The characterization and analysis in this work will help provide insights into the physical mechanism of the steep SS phenomenon observed in MFMIS-FET.

Electronic circuit design for RF energy harvesting using 28 nm FD‐SOI technology

AbstractIn this article, a voltage doubler circuit designed using 28 nm FD‐SOI technology has been studied for electromagnetic energy harvesting. NLVT transistor type is chosen and used as a diode for the realization of a Dickson voltage doubler circuit. Moreover, the impact of back gate polarization on circuit performance has been analyzed. The optimization of the circuit along with the measurement results has been presented (1.19 V for 1 stage at −26.3 dBm @ 2.45 GHz).

On Developing Field-Effect-Tunable Nanofluidic Ion Diodes with Bipolar, Induced-Charge Electrokinetics.

We introduce herein the induced-charge electrokinetic phenomenon to nanometer fluidic systems; the design of the nanofluidic ion diode for field-effect ionic current control of the nanometer dimension is developed by enhancing internal ion concentration polarization through electrochemical transport of inhomogeneous inducing-counterions resulting from double gate terminals mounted on top of a thin dielectric layer, which covers the nanochannel connected to microfluidic reservoirs on both sides. A mathematical model based on the fully-coupled Poisson-Nernst-Plank-Navier-Stokes equations is developed to study the feasibility of this structural configuration causing effective ionic current rectification. The effect of various physiochemical and geometrical parameters, such as the native surface charge density on the nanochannel sidewalls, the number of gate electrodes (GE), the gate voltage magnitude, and the solution conductivity, permittivity, and thickness of the dielectric coating, as well as the size and position of the GE pair of opposite gate polarity, on the resulted rectification performance of the presented nanoscale ionic device is numerically analyzed by using a commercial software package, COMSOL Multiphysics (version 5.2). Three types of electrohydrodynamic flow, including electroosmosis of 1st kind, induced-charge electroosmosis, and electroosmosis of 2nd kind that were originated by the Coulomb force within three distinct charge layers coexist in the micro/nanofluidic hybrid network and are shown to simultaneously influence the output current flux in a complex manner. The rectification factor of a contrast between the ‘on’ and ‘off’ working states can even exceed one thousand-fold in the case of choosing a suitable combination of several key parameters. Our demonstration of field-effect-tunable nanofluidic ion diodes of double external gate electrodes proves invaluable for the construction of a flexible electrokinetic platform for ionic current control and may help transform the field of smart, on-chip, integrated circuits.

Nanoionics-Based Three-Terminal Synaptic Device Using Zinc Oxide.

Artificial synaptic thin film transistors (TFTs) capable of simultaneously manifesting signal transmission and self-learning are demonstrated using transparent zinc oxide (ZnO) in combination with high κ tantalum oxide as gate insulator. The devices exhibit pronounced memory retention with a memory window in excess of 4 V realized using an operating voltage less than 6 V. Gate polarity induced motion of oxygen vacancies in the gate insulator is proposed to play a vital role in emulating synaptic behavior, directly measured as the transmission of a signal between the source and drain (S/D) terminals, but with the added benefit of independent control of synaptic weight. Unlike in two terminal memristor/resistive switching devices, multistate memory levels are demonstrated using the gate terminal without hampering the signal transmission across the S/D electrodes. Synaptic functions in the devices can be emulated using a low programming voltage of 200 mV, an order of magnitude smaller than in conventional resistive random access memory and other field effect transistor based synaptic technologies. Robust synaptic properties demonstrated using fully transparent, ecofriendly inorganic materials chosen here show greater promise in realizing scalable synaptic devices compared to organic synaptic and other liquid electrolyte gated device technologies. Most importantly, the strong coupling between the in-plane gate and semiconductor channel through ionic charge in the gate insulator shown by these devices, can lead to an artificial neural network with multiple presynaptic terminals for complex synaptic learning processes. This provides opportunities to alleviate the extreme requirements of component and interconnect density in realizing brainlike systems.