Quiescent power supply current (I/sub DDQ/) measurement is a very effective technique for detecting in CMOS integrated circuits (ICs). This technique uniquely detects certain CMOS IC defects such as gate oxide shorts, defective p-n junctions, and parasitic transistor leakage. In addition, I/sub DDQ/ monitoring will detect all stuck-at faults with the advantage of using a node toggling test set that has fewer test vectors than a stuck-at test set. Individual CMOS ICs from three different fabrication sites had a unique pattern or fingerprint of elevated I/sub DDQ/ states for a given test set. When I/sub DDQ/ testing was added to conventional functional test sets, the percentage increase in failures ranged from 60% to 182% for a sample of microprocessor, RAM, and ROM CMOS ICs. >