GaN Schottky Diodes Research Articles

Thermal Analysis of THz Schottky Diode Chips with Single and Double-Row Anode Arrangement.

GaN Schottky diodes show great potential in high-power terahertz frequency multipliers. The thermal characteristics of GaN Schottky diodes with single and double-row anode arrangements are described in this paper. The temperature distribution inside the Schottky diode is discussed in detail under the coupling condition of Joule heat and solid heat transfer. The effects of different substrates and substrate geometric parameters on the thermal characteristics of the Schottky diode chips with single and double-row anode arrangements are systematically analyzed. Compared with that of the chip with single-row anode arrangement, the maximum temperature of the chip with double-row anode arrangement can be reduced by 40 K at the same conditions. For chips with different substrates, chips with diamond substrates can withstand greater power dissipation when reaching the same temperature. The simulation results are instructive for the design and optimization of Schottky diodes in the terahertz field.

Optimisation of Negative Fixed Charge Based Edge Termination for Vertical GaN Schottky Devices.

This study focuses on the impact of negative fixed charge, achieved through fluorine (F) implantation, on breakdown voltage (BV) enhancement in vertical GaN Schottky diodes. Several device and implant-related parameters are examined using Synopsys Sentaurus TCAD simulations in order to determine the optimum fixed negative charge concentration required to achieve the highest BV. The simulated structure consisted of a Schottky diode with a box consisting of negative fixed charges to achieve the edge termination of the Schottky device. An empirical equation is proposed to determine the optimum fixed charge concentration for the highest BV based on depth. The simulation also considered implantation profiles derived from SIMS data from an actual device implanted with multi-energy and multi-dose F. It is demonstrated that the BV has a similar dependence on the key parameters like in the box profile. In summary, this work provides valuable insights into optimizing edge termination techniques using negative fixed charge for improved BV in vertical GaN power devices.

Reducing leakage current in GaN-Schottky diodes by suppressing hollow core nanopipes

The nanopipes in GaN films grown on sapphire substrates using metal-organic chemical vapor deposition were identified as leakage-related defects through investigations by PeakForce tunneling atomic force microscopy. An insertion layer of n-Al0.03Ga0.97N can prevent nanopipes from extending, thereby reducing the leakage current of Schottky diodes. By analyzing the element’s distribution in and out of nanopipes on epitaxial wafers, it is inferred that segregation of Ga around nanopipes may be responsible for the leakage.

Micro-Raman Spectroscopy Study of Vertical GaN Schottky Diode

In this work, the physical and the electrical properties of vertical GaN Schottky diodes were investigated. Cathodo-luminescence (CL), micro-Raman spectroscopy, SIMS, and current-voltage (I-V) measurements were performed to better understand the effects of physical parameters, for example structural defects and doping level inhomogeneity, on the diode electrical performances. Evidence of dislocations in the diode epilayer was spotted thanks to the CL measurements. Then, using 2D mappings of the E2h and A1 (LO) Raman modes, dislocations and other peculiar structural defects were observed. The I-V measurements of the diodes revealed a significant increase in the leakage current with applied reverse bias up to 200 V. The combination of physical and electrical characterization methods indicated that the electrical leakage in the reverse biased diodes seems more correlated with short range non-uniformities of the effective doping than with strain fluctuation induced by dislocations.

Investigation of the Reverse Leakage Behavior and Substrate Defects in Vertical GaN Schottky and PIN Diodes

In this work, the effects of the substrate defect density and distribution on the reverse leakage behavior of GaN vertical Schottky diodes and p–i–n diodes are investigated. A direct connection between the reverse leakage behavior of GaN based vertical devices and the dislocation density of the underlying material was determined. The difference in the leakage current for devices on different locations of the wafer can be as high as 6 orders of magnitude (for p–i–n diodes) at −200V, for HVPE substrate with inhomogeneous but predictable defect distributions (GaN substrates with dot-core inversion domain features). For comparison, using HVPE substrates with uniform defect distribution (but with no cores), the p–i–n diodes show much more uniform leakage behavior, varying within only an order of magnitude, and that range fell within the much greater range of that for the inhomogeneous substrates. The substrates with inhomogeneous defect distribution proved to be useful to show the direct correlation. The topography measurements confirmed that the wafers with inhomogeneous defect distribution possess periodically patterned core-centers with higher defect density and larger lattice distortions surrounded by other regions, which have very low defect concentrations. Devices located away from the defective core-centers result in a reduction of the reverse bias leakage by over two orders of magnitude at −10 V for Schottky diodes. Similar trends are also observed in the p–i–n diodes; the devices close to the core centers show the highest reverse leakage (>0.01 A cm−2 at −200V). Devices further away from the core-centers (lower dislocation density) show lower reverse leakage current. Moreover, the p–i–n diodes on regions more than 300 μm away from the core-centers show the best leakage behavior (<10−7 A cm−2 at −200V) of all the devices, outperforming the devices on the substrates with uniform defect distribution (∼10−6 A cm−2 at −200V). The results from this study show that the substrate defect density and distribution play important roles in the device leakage current. X-ray topography is extremely effective for studying defect characteristics underneath individual devices. The use of the wafers with inhomogeneous, but predictable defect density clearly demonstrated the importance of low defect densities for high device performance.

Demonstration and modeling of frequency tripler based on GaN Schottky diode pair

Based on GaN Schottky barrier diode (SBD), frequency triplers using anti-parallel diode pair (APDP) are demonstrated and modeled at an output frequency of 3.6 GHz. In addition, two connection schemes, namely series APDP tripler and shunt APDP tripler are explicitly studied and compared. Compared to shunt APDP tripler, series APDP tripler achieved higher output power of −0.14 dBm and smaller minimum conversion loss of 26.9 dB. Precise compact models for both types of triplers were proposed to verify the generation of output power and performance of triplers. In the compact models, nonlinear SPICE parameters of SBD and parasitic parameters of the diode pair were extracted from I–V characteristic and broad band small signal S-parameters. Input and output networks of tripler were de-embedded so that accuracy of harmonic simulations were ensured. The outstanding performance of APDP as a frequency tripler and corresponding models provide a practical option in designing RF multipliers.

GaN Schottky diode on sapphire substrate for THz frequency multiplier applications

Gallium Nitride, because of its high breakdown field, and peak and saturated electron drift velocity, high chemical stability and high thermal conductivity, is a very promising material as candidate for Schottky varactor diodes for next-generation high-power frequency multipliers. Similarly to the huge interest in the field of HEMT for high frequency and power application, GaN Schottky diodes is of a high interest for the next technological step for frequency multipliers for THz generations, replacing GaAs Schottky diodes. Due to a lack of research focused on GaN Schottky diodes for frequency multiplication, the design and fabrication of GaN frequency multipliers remains a technological challenge. In this paper, we present GaN Schottky diodes fabricated on a heteroepitaxial GaN on sapphire. The barrier height obtained is around 0.53 ​eV, and it increases up to 0.73 ​eV after Schottky contact annealing; and the ideality factor is equal to 1.1 before annealing and 1.2 after annealing. The resulting series resistance is very low, 7Ω and 1Ω, before and after annealing, respectively.

Current transport properties of Pt/n-GaN Schottky diodes with ZnO interlayers

In this work, atomic layer deposition (ALD) was used to grow 20-nm thick ZnO interlayers (IL) on a GaN substrate at 150 and 200 °C and the current transport mechanisms of vertical Pt/ZnO/n-GaN Schottky diodes were investigated. A high density of surface state was observed for the ZnO layer grown at 200 °C. An analysis of the forward current–voltage (I–V) data considering various transport mechanisms demonstrated that the thermionic emission and the tunneling components attributed to the total current for the ZnO layer grown at 150 °C. In contrast, it was observed that the tunneling component mainly caused the current conduction in the ZnO layer grown at 200 °C. Additionally, an analysis of the reverse I–V characteristics exhibited a high density of surface defects on the ZnO layer grown at 200 °C. This study demonstrated that the ALD growth temperature of ZnO IL significantly affects the I–V characteristics of GaN Schottky diodes.

Modeling of Schottky diode characteristic by machine learning techniques based on experimental data with wide temperature range

In this study, 4 common machine learning methods have been used to model the I–V characteristic of the Au/Ni/n-GaN/undoped GaN Schottky diode . The current values of previously produced Au/Ni/n-GaN/undoped GaN Schottky diode against the voltages applied to the diode terminal starting from the temperature of 40K up to 400K with 20K steps were measured. Models were created using Adaptive Neuro Fuzzy System, Artificial Neural Network , Support Vector Regression, and Gaussian Process Regression techniques using experimental data containing 5192 samples in total. After determining the combinations and specifications for each one that provide the lowest model error of each model, the performances of the obtained models were compared with each other concerning the various performance indices. The performance of the ANFIS model was found to be much better than the others in both the learning and test phases with RMSE model errors as 6.231e-06 and 6.806e-06, respectively. Therefore, it was proposed as a powerful tool for modeling I–V characteristics at all temperature values between 40K and 400K. • Temperature-dependent I–V characterization of Au/Ni/n-GaN/undoped GaN Schottky diode. • Experimentally obtained data set within the 40K-400K temperature range with 20K steps. • Modeling of I–V characterization Schottky diode with ANFIS, ANN, SVR, and GPR. • Assessment of modeling performances with 20K temperature steps.

The Influence of Design on Electrical Performance of AlGaN/GaN Lateral Schottky Barrier Diodes for Energy-Efficient Power Applications

In this paper, lateral AlGaN/GaN Schottky barrier diodes are investigated in terms of anode construction and diode structure. An original GaN Schottky diode manufacturing-process flow was developed. A set of experiments was carried out to verify dependences between electrical parameters of the diode, such as reverse and forward currents, ON-state voltage, forward voltage and capacitance, anode-to-cathode distance, length of field plate, anode length, Schottky contact material, subanode recess depth, and epitaxial structure type. It was found that diodes of SiN/Al0.23Ga0.77N/GaN epi structure with Ni-based anodes demonstrated two orders of magnitude lower reverse currents than diodes with GaN/Al0.25Ga0.75N/GaN epitaxial structure. Diodes with Ni-based anodes demonstrated lower VON and higher IF compared with diodes with Pt-based anodes. As a result of these investigations, an optimal set of parameters was selected, providing the following electrical characteristics: VON = 0.6 (at IF = 1 mA/mm), forward voltage of the diode VF = 1.6 V (at IF = 100 mA/mm), maximum reverse voltage VR = 300 V, reverse leakage current IR = 0.04 μA/mm (at VR = −200 V), and total capacitance C = 3.6 pF/mm (at f = 1 MHz and 0 V DC bias). Obtained electrical characteristics of the lateral Schottky barrier diode demonstrate great potential for use in energy-efficient power applications, such as 5G multiband and multistandard wireless base stations.

(Invited) Processes and Characteristics of 10-Kv-Class GaN Super-Heterojunction Diodes

GaN power switches have demonstrated proven performance benefits in below 1200V applications. Scaling the GaN power devices to higher voltage will bring the performances benefits to high power systems, such as the electric grid. One technical challenging in upscaling the voltage is the E-field nonuniformity in GaN devices. The author's group has attempted to achieve uniform E-field and to upscale the breakdown voltage of GaN devices, using a charge-balanced super-heterojunction structure. GaN Schottky diodes with over 10 kV breakdown voltage have been demonstrated. These devices showed no degradation of dynamic on-resistance up to 3 kV off-state bias stress. This talk will report design, processes, and characteristics of the GaN super-heterojunction devices.

Proton Energy Loss in GaN

The proton energy loss in GaN in an energy range between 0 and 65 MeV is investigated. The energy of protons generated by a cyclotron at about 65 MeV is varied by inserting an energy‐absorbing medium of varying thickness. The precise modeling of the GaN Schottky diode response as a function of the absorbing medium thickness allows us to demonstrate that the energy absorption loss in GaN precisely follows the Bethe theory. In addition, the region of the detector contributing to its response to a proton beam, which is of prime importance for proton detector optimization, can be identified.

On the characteristics of N-polar GaN Schottky barrier contacts with LPCVD SiN interlayers

We study the behavior of N-polar GaN Schottky diodes with low-pressure chemical vapor deposited (LPCVD) SiN interlayers and unveil the important role of an amphoteric miniband formed in this interlayer due to a previously identified and dominating Si dangling bond defect. Through analysis of temperature-dependent current–voltage (I–V–T), capacitance–voltage (C–V), and x-ray photoelectron spectroscopy measurements, we observe that when nickel is deposited on LPCVD SiN pretreated with hydrofluoric acid, the SiN/GaN interface is responsible for determining the overall system's barrier height. By contrast, contact formation on oxidized LPCVD SiN leads to a metal/SiN-dominant barrier. We, consequently, propose band diagrams that account for an amphoteric miniband in LPCVD SiN, leading to a new understanding of LPCVD SiN as a lossy dielectric with surface barrier-dependent behavior.

GaN surface sputter damage investigated using deep level transient spectroscopy

For nominally identical GaN Schottky diodes prepared by resistive thermal evaporation and plasma sputter deposition, diodes prepared by sputter deposition were found to exhibit a clear increase in the reverse leakage current, which is about two orders of magnitude higher than diodes prepared using thermal evaporation. Defects in n-type GaN Schottky diodes fabricated by plasma sputtering of gold were investigated using deep-level transient spectroscopy and compared with those in similar structures fabricated by resistive thermal evaporation. From deep level transient spectroscopy two defects were identified in the sputtered diode with the activation energies for charge carrier emission of 0.26±0.01eV relative to the conduction band edge and 0.62±0.04eV relative to the valence band edge. Defect concentration profiles of sputtered diodes show the defect density reduces from the surface to deeper in the structure, indicating that they are introduced through sputtering. Since the sputter deposition technique is widely used in device fabrication, attention should be paid to the adverse effects due to the additional defect introduction such as the charge trapping in HEMTs and the non-radiative recombination in LEDs.

Forward current transport and noise behavior of GaN Schottky diodes

In this work, we first measure the forward temperature-dependent current-voltage (&lt;i&gt;T&lt;/i&gt;-&lt;i&gt;I&lt;/i&gt;-&lt;i&gt;V&lt;/i&gt;) characteristics of the GaN-based Schottky diodes grown on the bulk GaN substrates, and then study the transport mechanisms of the forward current and the low-frequency current noise behaviors under various injection levels. The results are obtained below. 1) In a forward high-bias region the thermionic emission current dominates, and the extracted barrier height is about 1.25 eV at &lt;i&gt;T&lt;/i&gt; = 300 K, which is close to the value measured by capacitance-voltage sweeping. 2) In a forward low-bias region (&lt;i&gt;V&lt;/i&gt; &lt; 0.8 V) the current is governed by the trap assist tunneling process, having an ideality factor much larger than 1, and the derived barrier height is about 0.92 eV at &lt;i&gt;T&lt;/i&gt; = 300 K, which indicates that the conductive dislocation should be mainly responsible for the excessive leakage current, having a reduced barrier around the core of dislocations. 3) The Lorentzian noise appears only at very small current (&lt;i&gt;I&lt;/i&gt; &lt; 1 μA) and low frequency (&lt;i&gt;f&lt;/i&gt; &lt; 10 Hz), whose typical time constant is extracted to be about 30 ms, depending on the multiple capture and release process of electrons via defects. 4) At a higher frequency and current, the low-frequency 1/&lt;i&gt;f&lt;/i&gt; noise becomes important and the corresponding coefficient is determined to be about 1.1, where the transport is affected by the random fluctuation of the Schottky barrier height.

Gallium Nitride and Silicon Transistors on 300 mm Silicon Wafers Enabled by 3-D Monolithic Heterogeneous Integration

We demonstrate industry’s first 300 mm GaN transistor technology and 3-D monolithic heterogeneous integration with Si transistors, enabled by 300 mm GaN metal–organic chemical vapor deposition (MOCVD) epitaxy and 300 mm 3-D layer transfer. The 300 mm GaN technology is a high- ${k}$ dielectric enhancement-mode GaN nMOS transistor technology on Si(111) substrate. It is capable of excellent characteristics and figure-of-merits (FOM) for realizing energy-efficient, compact power-delivery and RF front-end components such as power-amplifiers, low-noise amplifiers, and RF-switches. Our GaN nMOS transistors show e-mode operation with: 1) high ${I}_{\text {D,max}} =1.5$ mA/ $\mu \text{m}$ ; 2) low ${R}_{ \mathrm{\scriptscriptstyle ON}}$ of $610\,\,\Omega -\mu \text{m}$ ( ${L}_{\text {G}} =50$ nm); 3) low ${I}_{ \mathrm{\scriptscriptstyle OFF}}$ of 100 pA/ $\mu \text{m}$ ( ${L}_{\text {G}} \,\,=180$ nm), which are significant improvements over GaN HEMT; 4) excellent RF performance: ${f}_{\text {T}} =190$ GHz, ${f}_{\text {MAX}} =300$ GHz, power-added efficiency (PAE) = 56% ( ${L}_{\text {G}} \,\,=50$ nm) at mmwave frequency 28 GHz, and PAE = 77% at 5 GHz ( ${L}_{\text {G}} =180$ nm), significantly better than industry-standard GaAs and Si RF transistors; 5) good RF-switch FOM, ${R}_{ \mathrm{\scriptscriptstyle ON}}{C}_{ \mathrm{\scriptscriptstyle OFF}} =110$ fs; and 6) low noise figure, NF $_{\text {min}} \,\,=1.36$ dB ( ${f} =28$ GHz) and 0.4 dB ( ${f} =5$ GHz), all at SoC-compatible voltages. We further demonstrate GaN transistor innovations all integrated on 300 mm Si(111) wafer, including depletion-mode GaN nMOS transistor with high ${I}_{\text {D}} =1.8$ mA/ $\mu \text{m}$ ; GaN Schottky gate transistor producing high saturated power of 20 dBm ( $80\mu \text{m}$ width) with peak PAE = 57% at 28 GHz; low leakage compact cascode and multigate GaN transistors; and GaN Schottky diodes with ultralow ${C}_{ \mathrm{\scriptscriptstyle OFF}}$ for electrostatic discharge (ESD) protection. The layer-transferred Si transistors, monolithically stacked on top of the GaN transistors by 300 mm 3-D layer transfer, show high drive current performance: 1.0 mA/ $\mu \text{m}$ (Si nMOS) and 0.5 mA/ $\mu \text{m}$ (Si pMOS). Such a monolithic 3-D Monolithic integration of GaN and Si transistors enables full integration of energy-efficient, truly compact power delivery and RF solutions with CMOS digital signal processing, logic computation and control, memory, and analog circuitries.

Ru/N-Polar GaN Schottky Diode With Less Than 2 μA/cm² Reverse Current

In this letter, we report the Schottky barrier diode investigation of ruthenium (Ru) deposited by atomic layer deposition on N-polar GaN. The Schottky diodes showed near-ideal thermionic current behavior under forward bias and reverse bias at various temperatures. The barrier height values extracted from both regions agreed well at each temperature and the barrier was extracted to be 0.77 eV at room temperature. The combination of the 0.77 eV barrier and thermionic current characteristic resulted in <; 2 μA/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> reverse current at -5 V, which is a record-low value for N-polar GaN Schottky diodes. As a comparison, the Ru on Ga-polar GaN Schottky barrier diode, which has a barrier height of 1.0 eV, exhibited a ~ two-order of magnitude higher leakage than Ru on N-polar GaN at -5 V due to other parasitic leakage mechanisms.

Polarization-Charge Inversion at Al2O3/GaN Interfaces through Post-Deposition Annealing

The effects of post-deposition annealing (PDA) on the formation of polarization-charge inversion at ultrathin Al2O3/Ga-polar GaN interfaces are assessed by the analysis of energy band bending and measurement of electrical conduction. The PDA-induced positive interface charges form downward energy band bending at the Al2O3/GaN interfaces with polarization-charge inversion, which is analyzed using X-ray photoelectron spectroscopy. Net charge and interface charge densities at the Al2O3/GaN interfaces are estimated after PDA at 500 °C, 700 °C, and 900 °C. The PDA temperatures affect the formation of charge densities. That is, the charge density increases up to 700 °C and then decreases at 900 °C. Electrical characteristics of GaN Schottky diodes with ultrathin Al2O3 layers exhibit the passivation ability of the Al2O3 surface layer and the effects of polarization-charge inversion through PDA. This result can be applied to improvement in GaN-based electronic devices where surface states and process temperature work important role in device performance.

Change of high-voltage conduction mechanism in vertical GaN–on–GaN Schottky diodes at elevated temperatures

Current-voltage-temperature characteristics (0 °C to 150 °C) of SBDs on highly compensated 15 μm and 30 μm n-type GaN drift layer were measured for voltages up to −300 V and up to −800 V, respectively. When the temperature is between 75 °C and 100 °C, both SBDs exhibited a similar change in conduction mechanism from thermionic field emission (TFE) to thermionic emission (TE) due to the activation of N-vacancies (VN) (Ea = −1.67 ± 0.02 eV). However, at high voltages when the temperature is >100 °C, the conduction mechanism changes from TE to TFE due to the de-trapping of electrons from activated carbon-traps (Ea = +0.69 eV) in the grown drift layers.

Compact electrothermal model of laboratory made GaN Schottky diodes

PurposeThe purpose of this paper is to propose a simple electrothermal model of GaN Schottky diodes, and its usefulness for circuit-level electrothermal simulation of laboratory-made devices is proved.Design/methodology/approachThe compact electrothermal model of this device has the form of a subcircuit for simulation program with integrated circuit emphasis. This model takes into account influence of a change in ambient temperature in a wide range as well as influence of self-heating phenomena on dc characteristics of laboratory-made GaN Schottky diodes. The method of model parameters estimation is described.FindingsIt is shown that temperature influences fewer characteristics of GaN Schottky diodes than classical silicon diodes. The discussed model accurately describes properties of laboratory made GaN Schottky diodes. Additionally, the measured and computed characteristics of these diodes are shown and discussed.Research limitations/implicationsThe presented model together with the results of measurements and computations is dedicated only to laboratory-made GaN Schottky diodes.Originality/valueThe presented investigations show that characteristics of laboratory-made GaN Schottky diodes visibly change with temperature. These changes can be correctly estimated using the compact electrothermal model proposed in this paper. The correctness of this model is proved for four structures of such diodes characterised by different values of structure area and a different assembly process.