GaN HEMT Transistor Research Articles

Investigation of the Influence of the Buffer Layer Design in a GaN HEMT Transistor on the Breakdown Characteristics

Investigation of the Influence of the Buffer Layer Design in a GaN HEMT Transistor on the Breakdown Characteristics

Power Receiving Unit for High-Power Resonant Wireless Power Transfer

A new power receiving unit (PRU) is proposed in this paper for resonant wireless power transfer (WPT), which is characterized by the capability of attracting high power from the power transmitting unit (PTU). The resonant WPT is designed for delivering the electrical power to the PRU attached on an electrical vehicle (EV) chassis 50 cm away from a PTU installed on the ground. The proposed PRU uses only the passive elements such as inductors, diodes, and capacitors, which need no initial power from the EV. It is then applicable for charging a battery to several hundred volts for even a first-time charging battery. For a resonant WPT at a switching frequency of 4 MHz, the proposed PRU behaves as a negative impedance converter (NIC) itself in the subharmonics of 4 MHz. The NIC effect plus the subharmonic oscillation causes an instability current charging the battery connected to the PRU. In this paper, we simulated the PRU and performed the experiment. The experiment demonstrated a battery charging of 150 W from 50 cm away using three D-mode GaN HEMT transistors via the instability current ramp. The power transfer efficiency (PTE) improved as the power delivered to the load (PDL) increased. The peak PTE was 65% in the present findings. The simulation analysis showed that the circuit allowed itself be used to much higher power transfer when it is implemented with more GaN HEMT transistors connected in parallel. The theoretical derivation of the PRU circuit is also used to support both the experimental and simulation results.

Design of dual-band power amplifier using bandstop filter and dual-mode bias circuit for multistandard transceiver systems

This paper presents a dual-band power amplifier (PA) using a meandered line bandstop filter (BSF). An important challenge addressed in this design is to achieve proper isolation between the operational bands of the amplifier. The proposed BSF provides isolation and efficiency, effectively separating the output power and power gain between the two operational bands. Additionally, a dual-mode bias circuit is designed to serve as an inductor choke and control the second harmonics for both operating frequencies simultaneously. Two dual-band PAs, utilizing LDMOS and GaN HEMT transistors, have been designed using the proposed output matching circuit, which incorporates the BSF, bias circuit, and compensation circuit. The results obtained from both PAs, employing different transistors, are identical. Based on the presented concepts, a dual-band PA with an LDMOS transistor has been fabricated and measured. The measurements reveal an efficiency of 79.23%, an output power of 39.85 dBm, and a power gain of 14.85 dB at a frequency of 0.7 GHz. Similarly, at a frequency of 1.9 GHz, the efficiency is 77.24%, the output power is 38.22 dBm, and the power gain is 13.22 dB.

A Highly-Efficient Doherty Power Amplifier With Generalized Parallel-Circuit Class-EF Mode

In this letter, a highly-efficient Doherty power amplifier (DPA) architecture with generalized parallel-circuit class-EF mode is proposed. With this topology, the ideal harmonic impedance conditions at the deep power back-off (PBO) region and saturation region can remain the same. Based on it, by adding a single harmonic control network (HCN) and an offset line, the carrier PA can be operated at the ideal high-efficiency conditions within the above two regions. In this case, the overall efficiency of the DPA can be improved simultaneously. As an example, a high-efficiency DPA working at 2.6 GHz is designed and fabricated based on a Wolfspeed CGH40010F GaN HEMT transistor. The measured results of the proposed structure demonstrated that a drain efficiency (DE) of 76.7% with the peak outpower of 45.2 dBm, as well as DE of 74.8 % at the 6dB power back off region.

A Novel Impedance Matching Network Suitable for Designing High-Efficiency Power Amplifiers

In this paper, a novel impedance matching network (IMN) for designing high-efficiency power amplifiers (PAs) is presented. With this method, the fundamental matching network (FMN) and the harmonic control network (HCN) are incorporated into a single network, which is composed of a λ/8 (λ is wavelength) transmission-line (TL) and a λ/4 TL. Based on it, the design procedure is more straightforward. Besides, the forbidden regions and feasible regions of the proposed network at the first three harmonics are also analyzed. The results show that the forbidden regions are very small. Finally, as an example, a harmonic tuned (HT) PA is designed and implemented using a GaN HEMT transistor. The measured results demonstrated that the fabricated HT PA working at 3.0 GHz delivers a power-added efficiency (PAE) of 79.2%, a gain of 11.6 dB and an output power (Pout) of 41.0 dBm.

Design of Class F Power Amplifier for Sub 6 GHz

Class F power amplifiers increasingly have widespread use cases in the modern portable mobile communications and higher efficiency operation due to base station. This paper focuses on the design of sub 6 GHz class-F Power Amplifiers (PA) to ensure maximum output power and gain using Gallium nitride– High Electron Mobility Transistor (GaN HEMT). The work also aims to analyze stability and Power Added Efficiency (PAE) using Advanced Design System (ADS) software. Simulations for DC characteristics of the GaN HEMT transistor are performed, stability circles are simulated, and stability factor values have been noted, using ADS software. Stability analysis involves measurements to examine the conditions that may lead to unstable behavior of the PA. The load pull analysis followed by impedance matching is done to transfer maximum power from amplifier stage to load. The input and output network has been designed using transmission lines and incorporated in the final circuit of the PA design. Using the LineCalc tool, the values of electrical parameters are used in the respective MLIN and TLIN circuits, and the respective matching networks are designed at the input side and output side. The amplifier stability factor is 2.276 and the maximum PAE is 65.75%. The maximum output is 39.83 dBm. The layout for the PA network using ADS software has been obtained.

Study of short-circuit robustness of p-GaN and cascode transistors

Short-circuit (SC) robustness is necessary for GaN adoption in industrial applications but continued efforts are needed to make them ready for real-world use. This work presents the results of >160 destructive tests performed on commercially available 600 V and 650 V GaN HEMT transistors from four different manufacturers with different structures (p-GaN and cascode). Under a DC-bus voltage of 400 V, the robustness is strongly dispersed: the Time To Failure (TTF) varies from hundreds of nanoseconds to hundreds of microseconds. But at a lower voltage (270 V), the TTF is generally in the millisecond range.

Novel Design Space of Broadband High-Efficiency Parallel-Circuit Class-EF Power Amplifiers

This article proposes a broadband high-efficiency parallel-circuit (PC) class-EF power amplifier (PA) along with a quarter-wavelength stub for the first time. By adding a reactive element <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${X}$ </tex-math></inline-formula> , the design space is expanded so that the impedance terminations of the fundamental and harmonics are no longer fixed points. Based on the broadband capability of the proposed structure, using a GaN HEMT transistor, a proof-of-concept circuit implemented with the Chebyshev impedance transformation network is designed and fabricated. Experimental results demonstrate a high-efficiency broadband PA operating from 2.6-3.9 GHz, with the average efficiency of 71.5%, the measured output power ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${P}_{\textit {out}}$ </tex-math></inline-formula> ) of 38.8-40.9 dBm and the power gain of 8.5-10.6 dB.

Designing of 8-Gate Fingered GaN HEMT based Frequency Mixer with Enhanced Gain for Wide Band Communication Systems

The reconfigurable mixer plays an important role in both transmitter as well as receiver section in the present wireless and digital communication systems. Also such mixer requires lot of power for up-converting and down-converting the signal without any noise. This paper deals about such type of designing of reconfigurable mixer for wide band communication applications with Gallium Nitride High Electron Mobility Transistor (GaN HEMT). This GaN HEMT transistor solves the requirement of huge power over wide range without any noise. The mixer is designed in the present paper for variable gain conversion along with power consumption trade-off for a wide range of frequency (2–8 GHz) with reconfigurable concept. Applied Wave Research (AWR) simulator was used to design the reconfigurable mixer. The gain is controlled by changing the trans-conductance of the input RF stage, and the current steering in trans-impedance stage. A broadband down-converter mixer is designed that provide different conversion gain, ranging from 25–33.5 dB with two different modes. The large bandwidth of the mixer is achieved by shunting the trans-conductance stage and with various switching stages. The results also show that there is good isolation along with conversion gain of designed reconfigurable mixer, for wide range in various communication applications.

Multi-Tone Harmonic Balance Optimization for High-Power Amplifiers through Coarse and Fine Models Based on X-Parameters.

In this study, we focus on automated optimization design methodologies to concurrently trade off between power gain, output power, efficiency, and linearity specifications in radio frequency (RF) high-power amplifiers (HPAs) through deep neural networks (DNNs). The RF HPAs are highly nonlinear circuits where characterizing an accurate and desired amplitude and phase responses to improve the overall performance is not a straightforward process. For this case, we propose a coarse and fine modeling approach based on firstly modeling the involved transistor and then selecting the best configuration of HAP along with optimizing the involved input and output termination networks through DNNs. In the fine phase, we firstly construct the equivalent modeling of the GaN HEMT transistor by using X-parameters. Then in the coarse phase, we utilize hidden layers of the modeled transistor and replace the HPA’s DNN to model the behavior of the selected HPA by using S-parameters. If the suitable accuracy of HPA modeling is not achieved, the hyperparameters of the fine model are improved and re-evaluated in the HPA model. We call the optimization process coarse and fine modeling since the evaluation process is performed from S-parameters to X-parameters. This stage of optimization can ensure modeling the nonlinear HPA design that includes a high number of parameters in an effective way. Furthermore, for accelerating the optimization process, we use the classification DNN for selecting the best topology of HPA for modeling the most suitable configuration at the coarse phase. The proposed modeling strategy results in relatively highly accurate HPA designs that generate post-layouts automatically, where multi-tone harmonic balance specifications are optimized once together without any human interruptions. To validate the modeling approach and optimization process, a 10 W HPA is simulated and measured in the operational frequency band of 1.8 GHz to 2.2 GHz, i.e., the L-band. The measurement results demonstrate a drain efficiency higher than 54% and linear gain performance more than 12.5 dB, with better than 50 dBc adjacent channel power ratio (ACPR) after DPD.

Adaptive Charge-Compensation-Based Variable On-Time Control to Improve Input Current Distortion for CRM Boost PFC Converter

For boost power factor correction (PFC) converters operating in critical conduction mode (CRM), charge compensation strategies are utilized to improve input current distortion. However, since massive calculations are required under complex working conditions, it is difficult to achieve accurate charge compensation with limited real-time computing resources. To solve this issue, this paper proposes an adaptive charge-compensation-based variable on-time (ACVOT) control strategy. The ACVOT controller calculates the required switching on-time by adding a fundamental value and an extended on-time. The fundamental value is adjusted by the loop compensator in each half-line cycle to provide a basic bias. The extended on-time is calculated based on partial charge compensation equation in each switching cycle to reduce the distortion. Compared with conventional digital variable on-time (VOT) control, the proposed strategy improves the input current total harmonics distortion (THD) and reduces the LUT/register resources by 54%/43% in FPGA realization. To verify the effectiveness of the proposed strategy, a 200 W prototype is built using the GaN HEMT transistor, where the THD is reduced to 1.4% at full load.

An estimation of 2DEG density for GaN HEMT using analytical equation considering the charge conservation low

An analytical physics-based model for 2DEG density estimation in the GaN HEMT transistor is presented. The suggested model can predict the sheet electron concentration within the transistor channel over the whole voltage operation range. Compared to the existing models, the new model is closed-form analytical that has no discontinuity, which is highly important for the current model convergence. The model satisfies the charge conservation law and present smooth translation from quantization and Fermi statistics to the classical Boltzmann statistics in the flatten band condition. The model is in excellent agreement with the numerical data, 2D TCAD simulation at flatten band conditions and compatible with the SPICE program. The results' analysis confirms the model stability at different temperatures.

GaN Based HEMT Power Amplifier Design with 44.5dBm Output Power Operating at 5-7GHz

The next-generation wireless communication systems including satellite, radar, and mobile communications need application-specific power amplifiers that can operate at very high frequencies and high power with the overall minimum power consumption from the system. To meet such stringent requirements there is a rising interest in amplifier designs based on GaN transistors. This paper presents an improved design of a high power amplifier based on GaN HEMT transistor operating at the frequency band 5GHz – 7GHz with optimized output power level. The presented design is based on a 12 Watt Discrete Power GaN on SiC HEMT from TriQuint. In this manuscript, we have considered the stability of the amplifier for the whole operating frequency band, its input and output matching impedance, gain, and maximum output power. The design of the Radio Frequency (RF) power amplifier and its overall performance are carried out using an advanced design system (ADS). The simulation results of the device stability and the output power level achieved provides a good comparison with the parameters and specifications of the device used. For better correlations in the simulation results and measurements, the accuracy of passive element designs are also considered. The simulation and experiment results show that the designed high power amplifier has achieved an output power level of 44.5 dBm at 1 dB compression point.

Peak-Current-Ratio-Enhanced Compact Symmetrical Doherty Amplifier Design by Using Active Harmonic Control

This article proposes a new and compact symmetrical Doherty power amplifier (DPA) configuration that provides extended output-back-off (OBO) and enhanced load modulation. The concept of active harmonic control (AHC) is introduced to remedy the reduced-conduction-angle operation of the class-C auxiliary device, providing enhanced auxiliary current and power capability. Semianalytical study based on generalized load-modulation theory and large-signal simulation reveal that an optimal AHC can offer increased peak current ratio, improved load modulation, boosted output power, and power utilization factor (PUF). Besides, a new output combiner, with the inclusion of parasitic effect, is devised for ultracompactness and simplicity. For verification, a 11-dB-OBO 2-GHz symmetrical DPA based on GaN HEMT transistors is designed, fabricated, and measured. Excellent performance with drain efficiency of 74% (52%) is obtained at saturation (back-off of 11 dB). Moreover, a saturation power of 42.98 dBm is achieved, corresponding to an uplifted PUF of 1.25 (compared with conventional symmetrical DPA design). Under 20-MHz modulated signal (peak-to-average power ratio of 11 dB) excitation, the prototype exhibits average efficiency of 53.2% at an average output power of 32 dBm. The adjacent channel leakage power ratio (ACLR) is found to be −27.5 and −50.9 dBc before and after digital predistortion, respectively.

Dual Input Digitally Controlled Broadband Three-Stage Doherty Power Amplifier With Back-Off Reconfigurability

This article presents a design strategy to improve the bandwidth of the three-stage Doherty Power Amplifier (DPA) by controlling the phase difference between the dual RF inputs digitally. The theory also proposes multiple back-off reconfigurability without using tuning elements and extra circuitry. The proposed theory is validated by demonstration of a dual-input three-stage DPA which is designed and implemented using Wolfspeed’s GaN HEMT transistors. The measured results show a drain efficiency of 50.4 – 58% and 46.1 – 65.4% at 12 dB and 6 dB back-off respectively, over the frequency range of 550-900 MHz. Over this 350 MHz band, the drain efficiency is between 53.97% and 71.5% at saturation, corresponding to 48.3% fractional bandwidth. The measurement results also show that both the back-offs are reconfigurable by changing the drain bias of main and first auxiliary power amplifier. The modulated measurements are carried with a 10 MHz LTE signal with a PAPR of 11.75 dB. The high average efficiency of 51.6%, 54.9%, and 52.6% is reported at 600, 700, and 800 MHz, respectively, at an average power of around 30 dBm. The measurement results validate the theory proposed making the presented DPA as a potential candidate for future wireless transmitters.

A High-Temperature Model for GaN-HEMT Transistors and its Application to Resistive Mixer Design

This article presents a high temperature model for gallium nitride (GaN) high electron mobility transistor (HEMT) on silicon carbide (SiC). The proposed model for the channel resistance $\text {R}_{\text {ds}}$ is based on an empirical nonlinear model. The model is applied to design a resistive mixer of a high temperature transceiver for downhole communications through a systematic approach and estimate the performance of the mixer. The proposed model matches well with measurement results of the mixer and accurately estimates its performance at temperatures up to 250 °C. The model is also applied to obtain the optimal gate bias voltage of the mixer for a given temperature. The optimal bias voltage scheme reduces the conversion loss of the mixer by a factor of 8.4 dB at 250 °C under the local oscillator power of −10 dBm.

Design of high‐efficiency continuous resistive‐reactive class‐J power amplifier

AbstractThis paper presents an ultra‐wideband, high‐efficiency continuous resistive‐reactive class‐J power amplifier. The design space is extended by controlling the second harmonic with impedance component and multiple harmonics of a continuous class‐J PA, enabling it to achieve efficient output in multiple octave bandwidths. Based on this theory, a GaN HEMT transistor CGH40010F is used to achieve a 0.6 to 3.2 GHz, average efficiency of 65%, ultra‐wideband PA with output power greater than 40 dBm. The simulation results are consistence with the measurement results and respond to the expectations.

Increasing efficiency of GaN HEMT transistors in equipment for radiometry using numerical simulation

The numerical impact modeling of some external effects on devices based on AlGaN/GaN heterostructures (HEMT) was carried out. The mathematical model was created that allowed to predict the behavior of the drain current depending on condition changes in the heterostructure in the buffer region and to start the process of directed construction optimization of the devices based on AlGaN/GaN HEMT with the aim of improving their performances.

Wafer-Level-Packaged $X$ -Band Internally Matched Power Amplifier Using Silicon Interposer Technology

In this letter, we propose a wafer-level-packaged (WLP) X-band internally matched power amplifier (IMPA) using silicon interposer technology. The proposed WLP IMPA consists of a fully embedded commercial GaN HEMT transistor (TR) embedded in the silicon wafer and matching networks. The proposed IMPA enhanced the output power and efficiency compared with the conventional quasi-monolithic microwave integrated circuit (MMIC) high power amplifiers (HPAs) due to removal of bonding wires between matching networks and TR. Further, it provided a high level of integration and reduces the manufacturing cost associated with the silicon interposer technique. For experimental validation, the proposed WLP IMPA was designed and fabricated at 10.2 GHz for military radar application. The results show that the output power and drain efficiency at saturation point were 48.54 dBm (71.45 W) and 50.29%, respectively, based on the pulse signal test (100-μs pulsewidth and 10% duty). The dimensions of the fabricated WLP IMPA were 7.5 mm × 5.8 mm × 0.12 mm.

GALLIUM NITRIDE POWER ELECTRONICS FOR AEROSPACE - MODELLING AND SIMULATION

Modelling and simulation of power GaN HEMT transistors and GaN devices are presented. Comparison and parameters for different GaN products are shown.