GaN Gate Injection Transistors Research Articles

Gate Drive Circuit Suitable for a GaN Gate Injection Transistor

A GaN gate injection transistor (GIT) has great potential as a power semiconductor device. However, a GaN GIT has a diode characteristic at the gate-source, and a corresponding gate drive circuit is thus required. Several studies in the literature have proposed the gate drive circuits with the speed-up capacitors, but adding these capacitors complicates the gate drive circuit, and increases both the drive and reverse conduction losses. Moreover, driving a GaN GIT with such gate drive circuits becomes more susceptible to the false turn-on. In this paper, a gate drive circuit suitable for a GaN GIT without a speed-up capacitor is proposed. This type can provide the high-speed switching, and exhibit the low gate drive loss and reverse conduction loss. The proposed circuit also has high immunity against the false turn-on and stable gate-source voltage before and after startup. The drive loss of the proposed type is calculated and its validity is confirmed experimentally. Furthermore, the drive loss of the proposed type is compared with the conventional circuits. The result shows that the drive loss of the proposed type is improved by up to 50 %, compared with the conventional type. Finally, the proposed type is experimentally tested to drive a buck converter at the switching frequency of 150 kHz. The entire loss of the converter can be reduced by up to 9.2% at 250 W, compared with the conventional type.

Method to Distinguish Between Buffer and Surface Trapping in Stressed Normally-ON GaN GITs Using the Gate-Voltage Dependence of Recovery Time Constants

Drain current recovery transients are analyzed in normally-ON (NON) gate injection transistors (GITs) subjected to different kinds of stress. The recovery is measured as a function of forward gate bias, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {G}}$ </tex-math></inline-formula> , which controls the number of holes injected from the gate and speeds up the recovery. Unlike conventional normally-OFF GITs, the newly designed NON GIT test structures allow simple characterization of buffer trapping during back-gating. By comparing the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {G}}$ </tex-math></inline-formula> -dependence of recovery time constants for OFF-state and semi- ON state stress with those obtained from back-gating experiments we are able to distinguish between buffer and surface trapping. Our approach is simple and does not require time-consuming temperature-dependent measurements. It is found that OFF-state stress causes negative charge accumulation in the buffer, while semi- ON state stress leads to accumulation in both, buffer and surface. The use of NON GITs enables to measure the recovery time constants related to the buffer over a wide span of six orders of magnitude ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$10^{-{4}}$ </tex-math></inline-formula> –100 s).

Modeling of Enhancement-Mode GaN-GIT for High-Power and High-Temperature Application

This article presents an analytical model for enhancement-mode GaN devices for high-power application. The model is developed specifically for a GaN gate injection transistor (GIT) device in which a positive threshold voltage is achieved by inserting a p-type GaN layer underneath the gate electrode that is incorporated in the analytical model presented in this article. In addition, the operation of enhancement-mode GaN transistors for high-power application is significantly impacted by carrier spill-over at higher gate bias. Therefore, this model also includes the impact of carrier spill-over by considering parallel conduction in the barrier layer adjacent to the two-dimensional electron gas (2DEG) channel of the transistor and the degradation of mobility and charge density on device operation. In addition, due to high power dissipation and low thermal conductivity of GaN material, the device performance degrades at high temperature. In this article, high-temperature operation of the device is modeled by taking into account the temperature exponents of the device parameters that vary with temperature. At high current density, the device shows significant self-heating effect, which is also modeled using a similar approach. The overall model is compared with the experimentally measured data that shows an excellent match.

A compact model and TCAD simulation for GaN-gate injection transistor (GIT)

Wide bandgap (WBG) semiconductor devices represent an attractive developing technology for power applications that is recently gaining commercial ground. GaN has advantages as one of the top contenders with high bandgap, high mobility, high saturation velocity, and high breakdown voltage. GaN enhancement-mode devices are favored over depletion-mode devices for power electronics applications and are only recently becoming commercially available. The enhancement-mode device investigated in this work is a GaN-gate injection transistor (GIT) in which the normally-off operation is achieved with an additional p-doped gate. This paper presents current-voltage (I-V) characteristics of GaN-GIT device using a physics based compact model as well as TCAD (Technology Computer-Aided Design) numerical simulation to predict and model the device behavior of the GIT. This paper presents a comparison of the TCAD simulation results with a compact model intended for low frequency applications in power electronics in the KHz to MHz range.

A SPICE Model for GaN-Gate Injection Transistor (GIT) at Room Temperature

In this paper, an equivalent circuit model is developed for a commercial Gallium Nitride (GaN) gate injection transistor (GIT) device at room temperature. The I-V and C-V characteristics are extracted from the commercial device datasheet and fitted in MATLAB. The fitted equations are realized as a combination of behavioral circuit components to be carried out in SPICE simulation. The equivalent circuit model is tested in a simple configuration for I-V curve simulation through varying of parameters and then in a simple boost configuration typical for power electronics applications to check for convergence and expected results.

Evolution of C-V and I-V characteristics for a commercial 600 V GaN GIT power device under repetitive short-circuit tests

In this article, a repetitive and non-destructive short-circuit aging test is developed to characterize the electrical parameters evolutions of a 600 V GaN Gate Injection Transistor (GIT). The evolutions of C-V and I-V characteristics during the repetitive short-circuit tests with a relatively low bias voltage and long pulse duration are presented and summarized. The capacitance CGD at on-state mode and the gate current at relative high gate voltage show significant degradations before and after test.

Drain current enhancement induced by hole injection from gate of 600-V-class normally off gate injection transistor under high temperature conditions up to 200 °C

In this paper, the current–voltage (I–V) characteristics of a 600-V-class normally off GaN gate injection transistor (GIT) from 25 to 200 °C are analyzed, and it is revealed that the drain current of the GIT increases during high-temperature operation. It is found that the maximum drain current (Idmax) of the GIT is 86% higher than that of a conventional 600-V-class normally off GaN metal insulator semiconductor hetero-FET (MIS-HFET) at 150 °C, whereas the GIT obtains 56% Idmax even at 200 °C. Moreover, the mechanism of the drain current increase of the GIT is clarified by examining the relationship between the temperature dependence of the I–V characteristics of the GIT and the gate hole injection effect determined from the shift of the second transconductance (gm) peak of the gm–Vg characteristic. From the above, the GIT is a promising device with enough drivability for future power switching applications even under high-temperature conditions.

Recovery current characteristics of diode mode operation in GaN gate injection transistor bi‐directional switch

The recovery current characteristics of the GIT bi‐directional switches in the diode mode are investigated. The recovery current waveforms are only dependent on the gate bias condition of the switching transistor, and not dependent on the gate bias of the GIT bi‐directional switch. The products of the recovery current peak and the recovery time estimated by the switching waveforms are almost constant in spite of changing the turn‐on voltage, and these values agree well with the charge at the diode shown by the integral of the diode capacitance and S2‐S1 voltage of the GIT bi‐directional switch. From these results, it is found that the independence of the gate bias of the GIT bi‐directional means that the influence of the hole injection is slight, and the diode operation of the GaN GIT bi‐directional switch is likely to be operated as schottky barrier diode.

Development of GaN-Based Gate-Injection Transistors and its Power Switching Application

This paper reviews the state-of-the-art technologies of the normally-off GaN Gate Injection Transistor (GIT) and its applications such as inverter for motor drive and Power Factor Collection (PFC). Fundamental performances such as the current-collapse-free operation and the excellent switching performance are reviewed.

A 3-Phase AC–AC Matrix Converter GaN Chipset With Drive-by-Microwave Technology

This paper describes an ultracompact GaN 3 × 3 matrix power converter with drive-by-microwave (DBM) technology, which comprises a radio frequency (RF)-triggered GaN-gate injection transistor (GIT) bidirectional power switches integration chip with co-integrated RF rectifiers, novel isolated dividing couplers in a printed circuit board to reduce complicated gate lines, and low-consumption GaN/Si DBM gate driver on a chip that controls nine bi-directional power switches. The proposed 4.0-kW GaN 3 × 3 matrix power converter is extremely compact, measuring only 18 × 25 mm due to the use of GaN-GIT power device integration technology and DBM technology that provides isolated gate signals by microwave wireless power transmission and eliminates the need for photo-couplers and isolated power supplies. The GaN/Si DBM driver realizes low power consumption of only 2.0 W as a result of gate power sharing with three RF oscillators. The sequential switching operation by the fabricated GaN 3 × 3 matrix converter was successfully achieved.

Equivalent Circuit Model for a GaN Gate Injection Transistor Bidirectional Switch

The switching waveforms and losses of a GaN gate injection transistor (GIT) bidirectional switch, a type of four-terminal device, were analyzed for the first time using an equivalent circuit model. By applying a three-terminal model to the equivalent circuit model of the GIT bidirectional switch and by using the waveforms of the chopper circuit, the parameters were derived with high accuracy. Furthermore, gate resistance dependence was added to the input capacitance component connected to the gate terminal in order to contain the influence of the gate structure of the GIT. It was confirmed that the calculated switching waveforms and losses agree well with those of the experimental values with over 90% accuracy, even in cases where circuit conditions for circuit voltage, load current, and gate resistance were varied.