Gallium Arsenide Process Research Articles

Compact high attenuation wide rejection bandwidth 5-pole Butterworth LPF using transmission zeros in GaAs process

In this work, a systematic design method for a compact 5-pole Butterworth transverse resonance low pass filter (TR-LPF), in 0.15 μm Gallium Arsenide process, with wide rejection bandwidth (RBW), is presented. The circuit model of TR-LPF and closed-form expressions are provided to appreciate the design process. The fabricated TR-LPF has a cut-off frequency of 10.5 GHz, an insertion loss of 0.4 dB, and the return loss is better than 20 dB. The 20 dB, 30 dB, and 40 dB deep rejection bandwidths (RBWs), across 50 GHz, 45.5 GHz, and 17 GHz respectively, are obtained. The novel use of stubs and spur resonators, within stubs; provides the deep and wide RBW. The compactness of the TR-LPF is realized by the ‘C’-and ‘Z’-shaped folding of stubs. The dimension of the filter is approximately 0.11λg×0.079λg.

High Selectivity Millimeter-Wave On-Chip Band-Pass Filter With Semi-Lumped Dual-Mode Resonator by Using GaAs Technology

In this paper, a high selectivity millimeter-wave on-chip bandpass filter is presented. In contrast with the conventional filter with multi-order resonators, the semi-lumped dual-mode resonator with minimal order can be employed to achieve three transmission zeros (TZs), which can maintain high selectivity and compact size. Furthermore, another two TZs are introduced to improve the attenuation level of the upper stopband by two capacitive loading stubs. A chip sample is fabricated with Gallium Arsenide processing with a size of 0.75×0.43 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The measurement results show that the center frequency is 33.5 GHz, the fractional bandwidth is 62.7%, and the insertion loss is 1.06 dB. Good agreements are observed between the simulated and measured S-parameters.

Miniaturized, Ultra-Wideband and High Isolation Single Pole Double Throw Switch by Using π-Type Topology in GaAs pHEMT Technology

In this brief, a compact ultra-wideband monolithic microwave integrated circuit single pole double throw (SPDT) switch with high isolation level and low insertion loss is presented. A ${\pi }$ -type topology, consisted of a transmission line with an electrical length of less than 90° and two parallel grounded metal-insulator-metal capacitors, is employed to replace the conventional $\lambda $ /4 transmission line between the adjacent parallel field effect transistors of the serial parallel SPDT switch. In comparison with the traditional method, an ultra-wideband high isolation behavior and the reduced dimension is achieved simultaneously with the proposed SPDT switch. Furthermore, the equivalent circuit model is built to interpret the mechanism of the improved technique. A chip sample is fabricated with Gallium Arsenide processing with a size of $1.25\times 1.05$ mm2. The measured insertion loss is less than 1.9 dB and the isolation is better than 36 dB from DC to 30 GHz. Good agreements are observed between the simulated and measured results.

The Design of Terahertz Monolithic Integrated Frequency Multipliers Based on Gallium Arsenide Material.

A global design method for a terahertz monolithic integrated frequency multiplier is proposed. Compared with a traditional independent design, the method in this paper adopts overall optimization and combines the device with the circuit design. The advantage is that it provides a customized design for frequency multipliers according to specifications. On the basis of the gallium arsenide process of the Institute of Microelectronics, Chinese Academy of Sciences, two types of Schottky diodes have been developed to meet the needs of different designs. On the one hand, a Schottky diode with a 3 μm junction’s diameter was used in the design of the 200 GHz balanced doubler and, on the other hand, a diode with a 5 μm diameter was used in the 215 GHz unbalanced tripler. The measured results indicated that the output power of the doubler was more than 250 μW at 180~218 GHz, and the maximum was 950 μW at 198 GHz when driven with 12.3 mW, whereas that of the tripler was above 5 mW at 210~218 GHz and the maximum exceeded 10 mW. Such frequency multiplier sources could be widely used in terahertz imaging, radiometers, and so on.

Gallium-arsenide process evaluation based on a RISC microprocessor example

The authors evaluate the features of a gallium-arsenide E/D MESFET process in which a 32-b RISC microprocessor was implemented. The design methodology and architecture of this prototype CPU are described. The performance sensitivities of the microprocessor and other large circuit blocks to different process parameters are analyzed, and recommendations for future process features, circuit approaches, and layout styles are made. These recommendations are reflected in the design of a second microprocessor using a more advanced process that achieves much higher density and performance. >

Modeling the epitaxial growth of gallium arsenide

Journal of Electronics ManufacturingVol. 01, No. 01, pp. 51-56 (1991) PapersNo AccessModeling the epitaxial growth of gallium arsenideA.K. MACPHERSON, D. BEHBOUDI, J.C.M. HWANG, and G. MICEKA.K. MACPHERSONPackard Laboratory 19, Lehigh University, Bethlehem, PA 18015, USA Search for more papers by this author , D. BEHBOUDIPackard Laboratory 19, Lehigh University, Bethlehem, PA 18015, USA Search for more papers by this author , J.C.M. HWANGPackard Laboratory 19, Lehigh University, Bethlehem, PA 18015, USA Search for more papers by this author , and G. MICEKPackard Laboratory 19, Lehigh University, Bethlehem, PA 18015, USA Search for more papers by this author https://doi.org/10.1142/S0960313191000072Cited by:1 PreviousNext AboutSectionsPDF/EPUB ToolsAdd to favoritesDownload CitationsTrack CitationsRecommend to Library ShareShare onFacebookTwitterLinked InRedditEmail AbstractA molecular dynamics model of the epitaxial growth of gallium arsenide has been written. The results from the model will be used to obtain parametric growth data including layer thickness and doping concentration. Initially it was necessary to check the potential, which was developed for bulk gallium arsenide, for its applicability to surface growth. The resultant continuum model, when integrated with Stanford University’s SUPREM 3.5 code, will simulate gallium arsenide processing based on epitaxial material.Keywords:Gallium arsenidemolecule dynamicsepitaxial growth FiguresReferencesRelatedDetailsCited By 1Some aspects of the physics of man-made semiconductor heterosystems: superlattice electronic structure and related topicsPierre Masri1 Nov 1993 | Surface Science Reports, Vol. 19, No. 1-2 Recommended Vol. 01, No. 01 Metrics History Received 1 May 1991 Accepted 1 June 1991 KeywordsGallium arsenidemolecule dynamicsepitaxial growthPDF download

Architecture and design of a 500-MHz gallium-arsenide processing element for a parallel supercomputer

The design of the processing element of GASP, a GaAs supercomputer with a 500-MHz instruction issue rate and 1-GHz subsystem clocks, is presented. The novel, functionally modular, block data flow architecture of GASP is described. The architecture and design of a GASP processing element is then presented. The processing element (PE) is implemented in a hybrid semiconductor module with 152 custom GaAs ICs of eight different types. The effects of the implementation technology on both the system-level architecture and the PE design are discussed. SPICE simulations indicate that parts of the PE are capable of being clocked at 1 GHz, while the rest of the PE uses a 500-MHz clock. The architecture utilizes data flow techniques at a program block level, which allows efficient execution of parallel programs while maintaining reasonably good performance on sequential programs. A simulation study of the architecture indicates that an instruction execution rate of over 30,000 MIPS can be attained with 65 PEs. >

Gallium arsenide processing—state of the manufacturing art

Gallium arsenide processing—state of the manufacturing art