Gain Ripple Research Articles

Memristor‐Based Reconfigurable True Time Delay Circuit

ABSTRACTA memristor‐controlled CMOS reconfigurable true time delay circuit is introduced in this paper. The delay circuit includes three stages of ‐C all‐pass filter delay elements connected in cascade and memristor‐based tunable DC voltage sources. The memristor value variation changes the DC bias voltage inputs of the delay elements and thus controls the delay time indirectly: The memristor resistance changes in analogue from 10 to 17 k, changing the tunable DC voltage source output from 584‐ to 711‐mV DC voltage and the delay from 269 to 632 ps. The delay circuit can work in a frequency range from 50 MHz to 1.6 GHz with gain ripple smaller than 3 dB. The resolvable delay time step across the delay range is < 8.7 ps, troughing at as low as 0.4 ps. A delay circuit working in the MHz region is also designed to compare the performance with the GHz circuit, and a memristor‐programming circuit is built to change the resistance levels of memristors.

Small-signal model for inhomogeneous helix traveling-wave tubes using transfer matrices

We introduce a practical method for modeling the small-signal behavior of frequency-dispersive and inhomogeneous helix-type traveling-wave tube (TWT) amplifiers based on a generalization of the one-dimensional (1D) Pierce model. Our model is applicable to both single-stage and multi-stage TWTs. Like the Pierce model, we assume that electrons flow linearly in one direction, parallel and in proximity to a slow-wave structure (SWS) that guides a single dominant electromagnetic mode. Realistic helix TWTs are modeled with position-dependent and frequency-dependent SWS characteristics, such as loss, phase velocity, plasma frequency reduction factor, interaction impedance, and the coupling factor that relates the SWS modal characteristic impedance to the interaction impedance. For the multi-stage helix TWTs, we provide a simple lumped element circuit model for combining the stages separated by a sever, or gap, which attenuates the guided circuit mode while allowing the space-charge wave on the beam to pass freely to the next stage. The dispersive SWS characteristics are accounted for using full-wave eigenmode simulations for a realistic helix SWS supported by dielectric rods in a metal barrel, all of which contribute to the distributed circuit loss. We compare our computed gain vs frequency, computed using transfer matrices, to results found through particle-in-cell simulations and the 1D TWT code LATTE to demonstrate the accuracy of our model. Furthermore, we demonstrate the ability of our model to reproduce gain ripple due to mismatches at the input and output ports of the TWT.

A highly survivable X‐band low noise amplifier based on GaN HEMT technology and impact of pulse width on recovery time

AbstractGaN high electron mobility transistor (HEMT)‐based low noise amplifiers (LNAs) are an integral part of microwave receiver systems to enhance signal‐to‐noise ratio (SNR). The noise of LNA itself becomes critical for systems requiring high SNR, such as imaging and satellite communication systems. This paper discusses the design of a three‐stage LNA operating at the X‐band in the frequency range of 8.0–12.0 GHz. The amplifier's design and small signal, noise, and linearity characterizations are discussed. Stagewise analysis for gain, noise figure (NF), and matching network losses at the design stage results in achieving promising results. The proposed LNA provides a gain of 23.2 dB with dB gain ripple. Its NF is below 1.5 dB, output power at 1 dB gain compression is 16.4 dBm, and third‐order intercept point is 24.7 dBm at 10 GHz. LNA's survivability is validated to input stress as high as 42 dBm. This LNA is the best reported NF and survivability combination in the 8.0–12.0‐GHz frequency range. The reverse recovery time of LNA is measured under two different pulse conditions, and it has been shown that LNA has better recovery times for lower pulse width signals. This LNA finds its applications in radars and satellite communication systems.

A 28-47.5 GHz broadband power amplifier using improved MCR technique in 40-nm CMOS

This paper presents a broadband power amplifier (PA) implemented in 40-nm CMOS process for low power application. The PA cascades two stages of common-source differential transistors and adopts symmetrical magnetically coupled resonators (MCRs) for impedance matching and single-ended differential conversion. Theoretical analysis elucidates the effect of the resonator Q on the frequency response of the transformer, thus giving the distribution of the poles and their precise locations, and revealing the quantitative relationship between bandwidth and gain ripple. A method for efficiently balancing gain ripple and bandwidth in k, Q space under low-power conditions when the intrinsic Q of the source impedance is high is described in detail. Measurement results demonstrate a 51.6% 3-dB bandwidth from 28 to 47.5 GHz. The PA achieve 10.7 dBm Psat, 8.5 dBm OP1db and 23% peak PAE at 31 GHz.

Intelligent MPPT for High Gain Zeta Converter for Standalone PV Application with Galvanic Isolation

In this paper, Standalone PV system is designed to operate without the need of electric utility grid which are commonly designed to supply specific DC electric loads. These type of PV system are generally powered using photovoltaic array and consist of solar charging modules, controllers and regulators. The objective of this work is to implement the Radial Basis Function Neural Network (RBFNN) based Maximum Power Point Tracking (MPPT) technique to attain constant DC link voltage of the ZETA converter. This method utilizes a ZETA converter to achieve better voltage gain and lower ripple in the output current and voltage. Using an Artificial Neural Network (ANN) controller to operate a high frequency converter, which improves power conversion efficiency. To ensure safety and prevent electrical faults, an isolation transformer provides galvanic isolation between the high frequency converter and the PV system. Galvanic isolation avoids electrical faults from being transmitted and safeguards connected loads. The rectifier is used to supply the Direct Current (DC) load with the output from the isolation transformer. The rectifier changes the transformer’s Alternating Current (AC) output into DC current to power DC loads. An intelligent MPPT is employed to stabilize the converter’s output voltage and address the intermittent characteristics of PV, and also assists in sustaining the DC link voltage without alterations and ripples from the converter. The efficiency of this work is authenticated via MATLAB simulation 2021a.

Circuit topology aware GNN-based multi-variable model for DC-DC converters dynamics prediction in CCM and DCM

A regression model based on graph neural network, tailored for electric circuit dynamics prediction is introduced, providing converter performance predictions on converter circuit level and internal parameter variations. Regardless of the number of components or connections present in a converter circuit, the proposed model can be readily scaled to incorporate different converter circuit topologies. Moreover, the model can be used to analyse converter circuits with any number of circuit components and any control parameters variation. To enable the use of machine learning methods and applications, all physical and switching circuit properties such as converter circuits operating in continuous conduction mode or discontinuous conduction mode are accurately mapped to graph representation. Three of the most common converters (Buck, Boost, and Buck-boost) are used as example circuits applied to model and the target is to predict the gain and current ripples in inductor. The model achieves 99.51% on the R2\\documentclass[12pt]{minimal} \\usepackage{amsmath} \\usepackage{wasysym} \\usepackage{amsfonts} \\usepackage{amssymb} \\usepackage{amsbsy} \\usepackage{mathrsfs} \\usepackage{upgreek} \\setlength{\\oddsidemargin}{-69pt} \\begin{document}$$R^2$$\\end{document} measure and a mean square error of 0.0263.

A study on a low input current ripple high voltage gain cuk converter

Abstract In the realms of photovoltaic power generation and fuel cells, the application of traditional DC-DC boost converters faces significant constraints due to insufficient gain and pronounced input current ripple. This paper presents a design for a Cuk converter with low input current ripple and high voltage gain based on the conventional Cuk topology. The design incorporates a passive ripple circuit and a coat circuit. The operational principles of the converter are analyzed, followed by the construction of a simulation model in PSIM. Simulation results not only validate the theoretical analysis but also affirm the feasibility of the proposed converter.

Peripheral circuits for ideal performance of a traveling-wave parametric amplifier

We investigate the peripheral circuits required to enable ideal performance for a high-gain traveling-wave parametric amplifier (TWPA) based on three-wave mixing . By embedding the TWPA in a network of superconducting diplexers, hybrid couplers, and impedance matching networks, the amplifier can deliver a high stable gain with near-quantum-limited noise performance, with suppressed gain ripples, while eliminating the reflections of the signal, the idler and the pump as well as the transmission of all unwanted tones. We also demonstrate a configuration where the amplifier can isolate. We call this technique (WIF). The theory is supported by simulations that predict over 20 dB gain in the 4–8 GHz band with 10 dB isolation for a single amplifier and 30 dB isolation for two cascaded amplifiers. We demonstrate how the WIF-TWPAs can be used to construct controllable isolators with over 40 dB isolation over the full 4–8 GHz band. Finally, we look at nonidealities and show how certain nonidealities can be devastating for both the gain and the idler filtering, especially a cutoff imbalance or a flux imbalance, and discuss how to compensate for them. Published by the American Physical Society 2024

Comparative evaluation of Z source / quasi Z-source direct and indirect matrix converters for PMG based WECS

The present era sees the dominance of wind energy conversion systems as a leading technology in renewable energy. Various technologies have been devised to harness wind energy, with variable speed systems emerging as particularly advantageous. Consequently, these systems are designed to operate at specified speeds using power electronic interfaces, maximizing power extraction from the wind. The integration of Permanent Magnet Generators (PMGs), directly linked to the wind turbine lacking a gearbox, allows operation at minimum speeds. To stabilize the continuously fluctuating output voltage of the PMG, power electronic converters are extensively utilized in Wind Energy Conversion Systems (WECS), ensuring a consistent voltage and frequency output. The voltage gain of Traditional matrix converters (MCs) is limited to less than 0.866. In turn, the Z-source (ZS) and discontinuous QZSDMC, as well as ZS IMCs, topologies have achieved voltage gains exceeding 0.866. However, the former provides complicated commutation issues from DMC, while the latter incorporates a Z source network in the DC link, resulting in a non-all-silicon solution. A novel continuous QZSDMC and QZSIMC are suggested, wherein a qZS network incorporates the grid-side filtering function. This design eliminates the need for an additional input filter in the proposed system. Three newly introduced topologies of ZSDMC, QZSDMC and QZSIMC are thoroughly compared across various parameters including voltage gain, current and voltage ripples, inductor current and capacitor voltage stresses, filtering capabilities, input current, and output voltage Total Harmonic Distortion (THD), finally efficiency. The paper presents their control and modulation methods to achieve the desired performance levels. Experimental comparisons validate the theoretical analysis and demonstrate the potential of the proposed QZSDMC as a promising topology.

Kinetic Inductance Traveling Wave Amplifier Designs for Practical Microwave Readout Applications

A Kinetic Inductance Traveling Wave Amplifier (KIT) utilizes the nonlinear kinetic inductance of superconducting films, particularly niobium titanium nitride (NbTiN), for parametric amplification. These amplifiers achieve remarkable performance in terms of gain, bandwidth, and compression power and frequently approach the quantum limit for noise. However, most KIT demonstrations have been isolated from practical device readout systems. Using a KIT as the first amplifier in the readout chain of an unoptimized microwave SQUID multiplexer coupled to a transition-edge sensor microcalorimeter, we see an initial improvement in the flux noise [1]. One challenge in KIT integration is the considerable microwave pump power required to drive the non-linearity. To address this, we have initiated efforts to reduce the pump power by using thinner NbTiN films and an inverted microstrip transmission line design. In this article, we present the new transmission line design, fabrication procedure, and initial device characterization—including gain and added noise. These devices exhibit over 10 dB of gain with a 3 dB bandwidth of approximately 5.5–7.25 GHz, a maximum practical gain of 12 dB, and typical gain ripple under 4 dB peak to peak. We observe an appreciable impedance mismatch in the NbTiN transmission line, which is likely the source of the majority of the gain ripple. Finally, we perform an initial noise characterization and demonstrate system-added noise of three quanta or less over nearly the entire 3 dB bandwidth.

An 8-way series-parallel combiner based power amplifier for mm-wave 5G communication in 40-nm CMOS

This paper presents a power amplifier (PA) with an 8-way series–parallel power combiner for 5G communication. By theoretical analysis of the S-parameters matrix and the equivalence of the impedance network, the design of the multi-port combiner is transformed into a dual-port on-chip transformer, and the bandwidth expansion is achieved without increasing the in-band gain ripple based on the mismatch-consistent magnetically coupled resonator (MCR) technique. As a validation of the methodology, the 8-way series–parallel power combiner PA is implemented in 40-nm CMOS Bulk process. The large-signal performances of the PA at 31 GHz are 21.36 dBm, 17.1 dBm, and 25.7 % for Psat, OP1dB, and PAEmax, respectively. The proposed PA has a peak S21 of 25.1 dB and a 3-dB bandwidth of 23.5–46.4 GHz, which fully covers the 5G new radio (NR) frequency range2 (FR2) operating band, and the S21 ripple is less than 1-dB in the range of 26.0–42.3 GHz, which achieves a broadband flat frequency response and supports the feasibility of the design.

High-efficiency cladding-pumped Er/Yb co-doped alumino-phosphosilicate fiber for an extended L-band amplification.

Extending the gain bandwidth of L-band optical fiber amplifier has provoked a widespread interest. To date, achieving a high-efficiency extended L-band amplification remains a challenge. Here, we report a cladding-pumped Er/Yb co-doped alumino-phosphosilicate fiber, prepared by the modified chemical vapor deposition process. We demonstrate the efficiency of alumino-phosphosilicate glass for cladding-pumped Er/Yb co-doped fiber, with a gain per unit fiber length of 0.45 dB/m at 1625 nm and a gain ripple of ∼9.4 dB. For 0.8 W pump power, the fiber exhibits a 20 dB gain bandwidth covering 1575-1625 nm and 6.9 dB noise figure at 1625 nm. Additionally, the utilization of multi-mode laser diode enables further significant power savings and cost reduction. To the best of our knowledge, Er/Yb co-doped fiber in alumino-phosphosilicate glass is first proposed, with a cladding-pumped scheme for enhancing an extended L-band performance.

A 6 to 18 GHz flat high gain power amplifier using mismatch-consistent MCR technique in 40-nm CMOS

This paper presents a power amplifier (PA) based on the mismatch-consistent magnetically coupled resonator (MCR) technique, which employs adjustable dual-pole to achieve a wide operating frequency range. The in-band no gain ripple condition of the proposed mismatch-consistent MCR is systematically analyzed and derived. By applying this condition to the mismatch-consistent MCR technique, the in-band gain flatness in broadband is improved. An ultra-wide wiring method for the power-combining structure is proposed to further improve the in-band gain flatness by reducing parasitic effects. Meanwhile, an active broadband matching network without any on-chip inductor is used to obtain a -11 dB input return loss (S11) across the whole bandwidth. Implemented in 40-nm CMOS process, the proposed PA achieves a saturated output power of 19.2 dBm, an output 1 dB compression point of 17.8 dBm, a peak power added efficiency of 29.7 %, and only 0.5 dB in-band gain ripple at 8.2-16.2 GHz. The amplifier achieves a 3 dB bandwidth from 6 to 18 GHz while the fractional bandwidth reaches 100 %, realizing wideband and flat frequency response.

A low-cost 24 GHz single-stage amplifier using SICL based stepped impedance matching network

This paper presents a single-stage amplifier using substrate-integrated coaxial line (SICL) technology. It is implemented with a low-cost PCB technique at 23.35–24.05 GHz. The size of the proposed amplifier is 4.9λg×1.1λg where λg is the guided wavelength at the center frequency. In this circuit, a SICL-based bias-tee network is designed where the mounting pads are introduced for the integration of the components, such as transistor and capacitor. Next, with the help of de-embedding techniques, the input and output matching networks are designed in the SICL environment at 24 GHz. The proposed amplifier circuit exhibits 9.2 dB of peak gain with less than 1 dB of gain ripple and more than 10 dB of input/output return losses in the operating frequency band of 23.35–24.05 GHz. Moreover, the elementary blocks of the amplifier are presented in the circuit. Based on the appropriate modeling of the amplifier’s elementary blocks, the simulated and measured results are in good agreement.

Design and Implementation of Fuzzy sliding mode control (FSMC) approach for a Modified Negative Output Luo DC-DC Converter with its comparative analysis

Switching power converters bring a desired output magnitude using semiconductor devices. These switching converters are generally classified as voltage lift and super lift. The conventional lift converters such as buck, boost and buck–boost come under the category of voltage lift technique, in which the output voltage increases in arithmetic progression. The other lift approach that increases the output voltage in the geometric progression is the super-lift method. Nowadays super-lift converters find their role in various applications, because of their high gain and low ripple. The converter taken for analysis is a modified negative output super-lift Luo converter (MNOSLC). Current mode control (CMC) is employed to maintain a stable DC voltage at the load side. This is investigated using different types of controllers such as PI, fuzzy, sliding mode controller (SMC) and fuzzy SMC. The performance of these controllers is compared and it is found that fuzzy SMC results in better line and load regulation. A prototype is developed that validates the simulation results.

Flat-gain L-band amplifier containing AlPO4 units in aluminophosphosilicate erbium-doped fibers.

We present a flat-gain single-stage L-band erbium-doped fiber amplifier (EDFA) with a gain ripple of ±0.7 dB from 1580 to 1615 nm, by using aluminophosphosilicate erbium-doped fiber (APS-EDF) with an estimated AlPO4 composition of 13.3 mol%. A series of APS-EDFs were fabricated with increasing AlPO4 and Er concentrations, while maintaining a low background loss of 0.031 ± 0.005 dB/m and preventing Er ion clustering. The spectroscopic study shows a slightly narrowing Er cross section and flattened emission cross-section spectrum in the L-band with more AlPO4, thus favoring the L-band amplification with an improved gain flatness. Also, the gain coefficient, gain saturation, and temperature-dependent gain characteristics were reported. A better temperature tolerance was observed with increasing AlPO4.

Design of wide-band high-linearity transimpedance amplifier using standard CMOS technology

Abstract In this paper, the design methodology of a high-linearity wide-band transimpedance amplifier (TIA) for cable television (CATV) application is addressed. A simple four-stage topology is proposed to maintain a well-balanced linearity over a wide operating band. The regulated cascode (RGC) input stage is used to match an input impedance of 75 Ω, followed by a gain stage with enhanced bandwidth. The high-linearity output stage is able to drive the 75 Ω load directly with high output swing under a high supply voltage. The prototype is implemented with a standard 0.11μm CMOS process while occupying the silicon area of 0.034 mm2. The measurement results for the prototype show a peak gain of 76.6 dBΩ over a 3-dB bandwidth of 1.1 GHz with a considerably small gain ripple and an OIP 3 of 20.4 dBm. The whole test chip consumes 447 mW DC power and the measured average input-referred noise current spectral density is 7.9 pA Hz−1/2 up to 1 GHz.

Gain flattened S+C+L-band bidirectional thulium doped fiber/multi-section fiber optical parametric hybrid amplifier

This article demonstrates the achievement of optical amplification across the S, C, and L-bands. A hybrid amplifier is proposed that utilizes a combination of bidirectional thulium-doped fiber amplifier (TDFA) and multi-section fiber optical parametric amplifier. With careful selection of TDFA and parametric amplifier parameters, gain can be achieved over complementary bandwidth regions. Resultantly, better gain flatness is achieved over the whole effective bandwidth of 170 nm. The amplifier being proposed is evaluated for a system consisting of 18 wavelength division multiplexed channels, each with a capacity of 100 Gb/s, and a channel spacing of 10 nm. By setting the input power per channel to an optimal value of –30 dBm, the parameters are adjusted to attain a flat gain exceeding 23.52 dB, accompanied by a gain ripple of only 2.09 dB. These parameters are optimized over a wavelength range between 1460 nm and 1630 nm.

Focal Plane Array-Fed Shaped-Beam Transmitarray With Small-Gain Ripple and Low Sidelobe Level

A novel shaped-beam transmitarray antenna fed by a focal plane array is proposed. It features the small gain ripple and low sidelobe level. Unlike the traditional shaped-beam transmitarray designed by phase only optimization, the proposed one is put forward based on the superposition principle. An array is used as the feed. When the feed elements are excited, orthogonal beams pointing at different angles are generated. Then the expected beam can be shaped by adding up these orthogonal beams with appropriate weights. Specifically, the selection criteria for the number, the angles and the weights of these orthogonal beams are provided. Several squared-flattop beams and a flattop-cosecant squared beam are designed for validation.

Probabilistic low-margin optical-network design with multiple physical-layer parameter uncertainties

Analytical models for quality of transmission (QoT) estimation require safety design margins to account for uncertain knowledge of input parameters. We propose and evaluate a design procedure that gradually decreases these margins in the presence of multiple physical-layer uncertainties (namely, connector loss, erbium-doped fiber amplifier gain ripple, and fiber type) by leveraging monitoring data to build a probabilistic machine-learning-based QoT regressor. We evaluate the savings from margin reduction in terms of occupied spectrum and number of installed transponders in the C and C+L bands and demonstrate that 4%–12% transponder/spectrum savings can be achieved in realistic network instances by simply leveraging the SNR monitored at receivers and paying off a low increment in the lightpath disruption probability (at most 1%–4%).