GaAs MOSFET Research Articles

Planar GaAs MOSFET integrated logic

Selective and multiple ion implantations directly into a semi-insulating GaAs substrate were utilized to fabricate planar integrated circuits with deep-depletion plasma-grown native oxide gate GaAs MOSFET's. 1.2-µm gate 27-stage enhancement/depletion (E/D) type ring oscillators, with the circuit optimized to reduce parasitic capacitance, were fabricated (using conventional photolithography) to assess the speed-power performance in digital applications. A minimum propagation delay of 72 ps with a power-delay product of 139 fJ was obtained, making these devices the fastest among current GaAs and Si logic fabricated by conventional photolithography. A minimum power-delay product of 36 fJ with a propagation delay of 157 ps was obtained. The power-delay product is comparable with that of 1.2-µm gate GaAs E-MESFET logic, and the speed is more than twice as great. This paper includes a comparison of the theoretical cut off frequency of MESFET and MOSFET logic devices operating in depletion mode. Results indicate that MOSFET logic has superior potential for high-speed operation.

Status of the GaAs metal—oxide—semiconductor technology

A review of recent and current work on GaAs insulated-gate technology is presented. First, various techniques for the formation of heteromorphic and homomorphic dielectrics are outlined and some important aspects of properties of these dielectrics are reviewed. Second, MOSFET structures, fabrication procedures, and microwave performance are described. Third, the application of GaAs MOSFET's to digital integrated circuits is summarized.

GaAs MOSFET High-Speed Logic

Enhancement-mode GaAs MOSFET integrated logic shows superior potential for applications in low-power high-speed integrated circuits. The speed / power performance of this logic was investigated by using GaAs MOSFET ring oscillators, fabricated using a low-temperature plasma oxidation technique for gate insulation. With an enhancement-depletion (E/D)-type ring oscillator, a minimum propagation delay of 110 ps per gate is obtained, with a power/speed product of 2.0 pJ. With an enhancement-enhancement (E/E) type, a minimum power/speed product of 26 fJ is obtained, with a 385-ps delay. These performances are equal to or better than those of GaAs MESFET logic, after adjustments are made for gate size. With further refinements in device geometry and improvements in gate oxide, GaAs MOSFET logic will be of great use in high-speed very-large-scale integrated circuits.

Low-Power, High-Speed Integrated Logic with GaAs MOSFET

The speed/power performance of GaAs MOSFET logic is firstly demonstrated by using GaAs MOSFET ring oscillators. The gate oxide is formed by directly oxidizing GaAs with a low-temperature plasma oxidation technique. The minimum propagation delay per gate is 110 ps, with the power/speed product of 2.0 pJ. The minimum power/speed product is 26 fJ, with the delay time of 385 ps. These performances are equal to or better than those of GaAs MESFET logic in spite of that the GaAs MOSFET integration is in the first stage of developments. With further refinements of device geometries and improvements in gate oxide, GaAs MOSFET logic may be great use in a field of high-speed, very large scale integrated circuit applications.

MP-A4 GaAs MOSFET for low-power high-speed logic applications

MP-A4 GaAs MOSFET for low-power high-speed logic applications

Surface states in an n-GaAs/plasma grown native oxide — A modified deep level transient spectroscopy measurement

We recently developed a low-temperature magnetically controlled plasma oxidation technique for GaAs to make gate oxides for GaAs MOSFETs. In this report, surface states and/or traps introduced during the oxidation are investigated using a GaAs MOSFET with a modified deep level transient spectroscopy technique, Frequency dispersion of transconductance is observed and discussed. Continuously distributed surface states from 0.4 to 0.6 eV in activation energy were observed. Surface state density was around 6.5 × 10 12 cm −2 eV − in the energy region. The electron capture cross section was 4 × 10 −14 cm 2 at 0.45 eV. Frequency dispersion of the transconductance observed at an enhancement gate bias voltage of 2 V can be analyzed on the basis of the relaxation process of the surface states having 0.60 eV activation energy.

A new technique for growth of thermal oxide films on GaAs

A new technique for thermal oxidation of GaAs is proposed. The native oxide films containing a significant amount of As 2O 3 are thermally grown under controlled vapor pressure of arsenic trioxide. The breakdown strength of the films is found to be as high as (5–7) × 10 6 V cm , which is comparable with the highest value ever attained for anodic oxide films. The leakage current is also on such a low level as of the order of 10 −8 A cm 2 per 1000 Å at an applied voltage of 10 V. The surface state density at the p-GaAs-oxidc interface of MOS diodes is as low as 5 × 10 11 cm −2 eV −1 near midgap. The chemical properties evaluated in terms of etching rates for various etchants exhibit satisfactorily stable and favorable characteristics for GaAs planar process. By using the new technique, a thermal oxide gate GaAs MOSFET of deep depletion mode is fabricated.

Thermal-oxide gate GaAs MOSFET's

The first thermal-oxide gate GaAs MOSFET of the deep-depletion mode is reported. The gate oxide, which has been grown by the new GaAs oxidation technique in the As <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> O <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> vapor, is so chemically stable that it can be subjected to the fabrication process. Measurement of some dc characteristics of the device fabricated has shown a strikingly suppressed hysteresis.

Improved enhancement/depletion GaAs MOSFET using anodic oxide as the gate insulator

A GaAs MOSFET with a semi-insulating substrate is described, operating in either the enhancement or the deed depletion modes and showing the highest transconductance reported so far, and a rise time better than 1 ns. The behavior is fully explained by the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C/V</tex> characteristics of equivalent MOS capacitors.

Plasma-Grown Oxide Gate GaAs Deep Depletion MOS FET

Gate technology suitable for a GaAs MOS FET has been developed by using a new promising low temperature plasma-oxidation technique. The depletion and enhancement devices have been fabricated by using this technique. Physical and electrical properties of the oxide films have been investigated under various annealing conditions. The frequency dispersion in C-V curves of the accumulation region is observed for an n-type MOS diode. An enhancement device with a gate length of 1.5 µm has shown superior microwave characteristics. Unilateral power gain calculated from measured s-parameters is about 3 dB at 10 GHz.

MOS-gate technology on GaAs and other III–V compounds

High-quality native oxides on GaAs, InP, and other compound semiconductors have been grown by an electrolytic process involving glycol and an aqueous solution. A study of the physical processes involved enables one to give the ideal electrolyte properties required for good oxidation. Two important requirements are a reduction in the dissolution rate and the setting up of a cation saturation level near the anode for oxidation to start. Good electrical interface properties can be achieved. First GaAs MOS FET’s have been fabricated using this oxidation. The anodization process is also of value in material studies by employing the hole-concentration dependent oxidation rate for n-type materials.