GaAs Heterojunction Bipolar Transistor Research Articles

Boosting the thermal stability of paralleled GaAs HBTs through temperature-dependent ballasting resistors: A proof-of-concept study

This paper explores the efficacy of base ballasting strategies in enhancing the electrothermal (ET) stability of paralleled InGaP/GaAs heterojunction bipolar transistors (HBTs) for radiofrequency (RF) applications. More specifically, technologically-feasible temperature-dependent base ballasting resistors are proposed as a solution to shift the collapse of current gain to higher power densities. A three-cell test device fabricated through a state-of-the-art process is considered as a simple case study. Extremely accurate DC and AC ET simulations are performed with SPICE to quantify the advantages of the proposed strategy with respect to traditional approaches.

An Accurate Electro-Thermal Coupling Model of a GaAs HBT Device under Floating Heat Source Disturbances.

Taking into consideration the inaccurate temperature predictions in traditional thermal models of power devices, we undertook a study on the temperature rise characteristics of heterojunction bipolar transistors (HBTs) with a two-dimensional cross-sectional structure including a sub-collector region. We developed a current-adjusted polynomial electro-thermal coupling model based on investigating floating heat sources. This model was developed using precise simulation data acquired from SILVACO (Santa Clara, CA, USA). Additionally, we utilized COMSOL software (version 5.6) to simulate the temperature distribution within parallel power cells, examining further impacts resulting from thermal coupling. The research findings indicate that the rise in current induces modifications in the local carrier concentration, thereby prompting variations in the local electric field, including changes in the heat source's peak location and intensity. The device's peak temperature exhibits a non-linear trend regulated by the current, revealing an error margin of less than 1.5% in the proposed current-corrected model. At higher current levels, the drift of the heat source leads to an increase in the heat dissipation path and reduces the coupling strength between parallel devices. Experiments were performed on 64 GaAs (gallium arsenide) HBT-based power cells using a QFI infrared imaging system. Compared to the traditional temperature calculation model, the proposed model increased the accuracy by 6.84%, allowing for more precise predictions of transistor peak temperatures in high-power applications.

RF Characterization of GaAs HBT under Load Mismatch with Reverse Wave Injection Technique.

RF PAs need to be reliable enough to protect them from damage under load mismatch conditions. This paper investigated the characteristics of GaAs heterojunction bipolar transistors (HBTs) under load mismatch conditions using a novel reverse wave injection technique to realize large VSWR ruggedness measurement with the circle centered at 50 Ohm and optimal impedance separately to analyze the device in real applications. With a real-time waveform measurement system, the RF voltage and current waveform information can be acquired, which provide a more-accurate view of what is occurring at the current generator plane of the HBT device. Thereby, the potential failure mechanisms and load impedance can be identified to design the most-suitable PA circuits in communication systems.

Doherty power amplifier with simplified out‐of‐phase power splitter for 5G applications

AbstractThis letter presents the architecture and characterization of a Doherty power amplifier (DPA) with a simplified out‐of‐phase power splitter (SOPPS) for fifth‐generation (5G) small‐cell applications. The proposed SOPPS consists of two passive components, which is conducive to chip miniaturization. Additionally, a stable DPA architecture is employed to avoid oscillation caused by out‐of‐phase ports imbalance. A DPA based on gallium arsenide (GaAs) heterojunction bipolar transistor (HBT) technology is fabricated, achieving high gain of 32 dB over 2.5 to 2.7 GHz. Using a continuous‐wave signal, the DPA exhibits a saturation output power of 36 dBm, with a peak power‐added efficiency (PAE) of 42.3% and 37% at saturation and 6‐dB power‐back‐off, respectively, across the operating band.

A 2.2–4.2-GHz Wideband Analog Phase Shifter MMIC With Low RMS Phase/Amplitude Error

This letter presents a 2.2–4.2-GHz 360° continuous-tuned phase shifter (PS) using the Gallium arsenide (GaAs) heterojunction bipolar transistor (HBT) technology. A new method for broadband analog PS design based on a tunable low-pass network (LPN), a tunable high-pass network (HPN), and a magnetically coupled all-pass network (MCAPN) configuration is proposed to achieve uniform phase shifting and flat amplitude response at the same time for each phase-shifting state. The fabricated PS demonstrates a low average insertion loss (IL) of 4.9 dBC a low root-mean-square (rms) phase error of less than 5.5°, and a low rms amplitude error of less than 0.47 dB between 2.2 and 4.2 GHz. The proposed analog PS has the most flattened phase performance compared with previously reported pass PSs over a wide bandwidth.

High Linear and Temperature Insensitive GaAs Power Amplifier Operating at 3.3–3.6 GHz Using a Multi-Feedback Branch Bias Circuit

This letter describes a design of a 3.3–3.6-GHz GaAs heterojunction bipolar transistor (HBT) power amplifier (PA) with high linearity and temperature insensitivity for the fifth-generation (5G) of new radios (NRs). By involving a multi-feedback branches bias circuit, the voltage at the feedback node of the bias circuit can achieve dynamic self-tuning to stabilize the base voltage as the amplifier’s input power grows and stabilize the bias current as the temperature increases as well. A three-stage common source structure PA in the form of a monolithic microwave integrated circuit (MMIC) is designed using a multi-feedback branch bias circuit with a size of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1.5\times1.2$ </tex-math></inline-formula> mm. Measured with continuous wave (CW) signals, the output 1-dB compression point at 3.3–3.6 GHz is 34 dBm. The linearity of the PA is also evaluated using a 5G-NR 100-MHz 64-quadratic-amplitude modulated (QAM)-orthogonal frequency division multiplexing (OFDM) signal with a 7-dB peak-to-average-power ratio (PAPR). The proposed PA achieves an adjacent channel power ratio (ACPR) less than −49.5 dBc at an average power of 28 dBm with a power-added efficiency (PAE) of 20% without the use of digital pre-distortion (DPD). In the temperature range of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$- 40\,\,^{\circ }\text{C}$ </tex-math></inline-formula> to 120 °C, the variance of bias current, small signal gain, PAE, output power at 1-dB compression point (OP1dB), and ACPR is relatively minor. This design is ideally suited for 5G communication systems due to its high linearity and temperature insensitivity.

Repetitive High-Power Microwave Pulses Induced Failure on a GaAs HBT LNA

This study aims at studying the damage effect of gallium arsenide (GaAs) heterojunction bipolar transistor (HBT) low noise amplifier (LNA) with repetitive high-power microwave (HPM) pulses. The theoretical function for the thermal accumulation effect is derived, which depends on the pulsewidth, the pulse repetition frequency (PRF), and the input power. A simulation model is established to investigate the thermal accumulation effect of repetitive HPM pulses on the HBT. The electric field, current density, and temperature distributions in the HBT with repetitive HPM pulses are discussed first. The influence of the repetitive HPM pulse parameters on the thermal accumulation effect is studied by theoretical analyses and simulations. Results show that the thermal recovery time increases with the pulsewidth or the input power increases. In addition, it is concluded that the frequency does not affect the thermal recovery time. The simulation results agree with the theoretical results. Finally, the damage effect of repetitive HPM pulses is experimentally verified.

Multi-Band Power Amplifier Module with Back-Off Efficiency Improvement using Ultra-Compact 3D Vertical Stack Multi-Chip Package for Cellular Handsets.

A highly integrated multi-mode multi-band (MMMB) power amplifier module (PAM) using hybrid bulk complementary metal oxide semiconductor (CMOS), gallium arsenide (GaAs) heterojunction bipolar transistor (HBT), and silicon-on-insulator (SOI) technologies for low band (LB, 824-915 MHz) and high band (HB, 1710-1980 MHz) is proposed. The hybrid MMMB PAM integrates a bulk CMOS controller die, a GaAs HBT power amplifier (PA) die and a SOI switch die on a six-layer laminate. To simultaneously obtain both highly efficient and highly linear characteristics over a wide range of input power levels, a parallel dual-chain PA strategy has been adopted to provide vary bias current and gain for low-power mode (LPM) and high-power mode (HPM) operation. Additionally, a broadband two-section low-pass output matching network design based on the suppression of high-order harmonics is proposed for enhanced efficiency and linearity. In order to achieve further miniaturization, a three-dimensional (3D) die stack multi-chip module (MCM) packaging structure, where the presented CMOS controller die is stacked vertically on the GaAs HBT PA die, is implemented. The measurement results show that the fabricated MMMB PAM achieves 26.1-27 dB of power gains and 38-38.4% of PAEs at an output power (Pout) of 28 dBm in the HPM, and 20.4-20.9 dB of power gains and 12.4-13.8% of PAEs at Pout of 17 dBm in the LPM over LB. For HB, power gains of 24.3-26.7 dB while maintaining PAEs of 38.2-39.9% at Pout of 28 dBm, and power gains of 15.9-17.5 dB while maintaining PAEs of 12.3-12.8% at Pout of 17 dBm are realized in the HPM and LPM, respectively. The fabricated PAM covering five frequency bands and operating at two power modes only occupies a 5 × 3.5 mm2 area. To the best of the authors' knowledge, this work is the first demonstration of a MMMB PAM adopting an ultra-compact 3D vertical stack MCM package with favorable RF performance.

Characterization of ALD Ta2O5, Al2O3, and Ta2O5/Al2O3 Nanolaminate as Metal-Insulator-Metal Capacitor Dielectric for GaAs HBT Technology

In order to reduce die size and increase capacity, the metal-insulator-metal (MIM) capacitor area in circuit designs fabricated using GaAs hetero-junction bipolar transistor (HBT) technology has to be reduced. This can be achieved by using a capacitor dielectric material that has a high dielectric constant or high capacitance density. In GaAs HBT technology, the MIM capacitor dielectric film is typically also required to have a high breakdown voltage (>20 V) and low leakage current. Furthermore, the deposited dielectric film has to be compatible with GaAs processing and has to be deposited at a temperature of < 300oC, due to the limited process thermal budget in the HBT technology. As a result of these requirements, there are only a few materials available for MIM capacitor dielectric application in GaAs HBT technology.In this study, 60 nm tantalum pentoxide (Ta2O5), aluminum oxide (Al2O3), and Ta2O5/Al2O3 nanolaminate deposited using atomic layer deposition (ALD) have been characterized and evaluated as MIM capacitor dielectric for GaAs HBT technology. The results show that the capacitor with 60 nm of ALD Ta2O5 has the highest capacitance density (3.84x10-15 F/μm2), followed by the capacitor with 60 nm Ta2O5/Al2O3 nanolaminate, and the capacitor with 60 nm Al2O3 capacitor dielectric film with a capacitance density of 2.40x10-15 F/µm2 and 1.37x10-15 F/μm2, respectively. The calculated dielectric constant of ALD Ta2O5 and Ta2O5/Al2O3 nanolaminate is 26.1 and 16.3, respectively, while that of ALD Al2O3 is 9.3, as shown in Figure 1.Figure 2 shows the I-V characteristics of MIM capacitors with 4055 μm2 area and with 60 nm of ALD Ta2O5, Ta2O5/Al2O3 nanolaminate, and Al2O3 capacitor dielectric. As can be seen, the capacitor with Al2O3 capacitor dielectric has significantly lower leakage and higher breakdown voltage (46 V), while the capacitor with Ta2O5/Al2O3 and Ta2O5 capacitor dielectric has higher leakage current and lower breakdown voltage of 32.7 V and 22.4 V, respectively. Figure 3 shows the C-V characteristics of capacitors with the 3 ALD capacitor dielectric films. The results show that the capacitance of MIM capacitor using these three films increased marginally by 2.2% to 4.3%, when the temperature was increased from 25oC to 125oC. No significant change in capacitance density of these ALD capacitor dielectric films was observed, when the applied voltage was varied from -5 V to +5 V. Figure 1

Characterization of ALD Ta2O5, Al2O3, and Ta2O5/Al2O3 Nanolaminate as Metal-Insulator-Metal Capacitor Dielectric for GaAs HBT Technology

Tantalum pentoxide (Ta2O5), aluminum oxide (Al2O3), and Ta2O5/Al2O3 nanolaminate deposited using atomic layer deposition (ALD) have been characterized and evaluated as metal-insulator-metal (MIM) capacitor dielectric in GaAs hetero-junction bipolar transistor (HBT) technology. The results show that the capacitor with 60 nm of ALD Ta2O5 and Al2O3 capacitor dielectric films resulted in a capacitance density of 3.84x10-15 F/μm2 and 1.37x10-15 F/μm2 and a dielectric constant of 26.1 and 9.3, respectively, while the capacitor with 60 nm of ALD Ta2O5/Al2O3 nanolaminate capacitor dielectric film resulted in capacitance density of 2.40x10-15 F/μm2 and a dielectric constant of 16.3. The capacitance density of capacitor using these three films increased marginally by 2.2% to 4.3%, when the temperature was increased from 25oC to 125oC. No significant change in capacitance density of these ALD films was observed, when the applied voltage was varied from -5 V to +5 V. The leakage current density of the ALD Al2O3, Ta2O5, and Ta2O5/Al2O3 nanolaminate films at an electric field of 3 MV/cm is 2.0x10-16 A/μm2, 6.8x10-8 A/μm2, and 9.2x10-13 A/μm2, respectively. The 60 nm ALD Al2O3 film has higher breakdown voltage of 46 V, compared to the 60 nm ALD Ta2O5 film and the 60 nm Ta2O5/Al2O3 nanolaminate film, which has a breakdown voltage of 22.5 V and 32.7 V, respectively. As the temperature was increased from 25oC to 125oC, the leakage current increased and breakdown voltage decreased for all three ALD films.

A temperature‐compensated linear GaAs HBT power amplifier for small‐cell applications in −25 to 125∘C$^\circ \rm C$ lunar environment

A two-stage 920–960 MHz power amplifier (PA) in GaAs heterojunction bipolar transistor (HBT) process is demonstrated for small-cell communications in the lunar environment. To cope with the temperature fluctuations during lunar days, a novel complementary to absolute temperature (CTAT) biasing scheme is proposed for the PA to achieve an ultra-wide-range temperature compensation. Moreover, to meet the linearity requirements of the small-cell applications while producing high output power, a band-stop filter is employed in the biasing circuit of the second stage to reduce the AM– AM distortions. Over the temperature range of −25 to 125°C, the PA is capable of operating for the small-cell applications over a gain ranging from 30.2 to 32.8 dB. The proposed PA achieves 24.5 dBm linear power with −47 dBc adjacent channel leakage ratio (ACLR) and a PAE of 15%.

A Multi-Source Co-Simulation Method for the Thermal Stability of GaAs Sub-6G Power Amplifier with Adjustable Bias Current

In this paper, the thermal stability of GaAs heterojunction bipolar transistor (HBT) power amplifier (PA) in a sub-6G band has been improved by a multi-source co-simulation method. To reduce the parameter errors caused by the variations of thermal resistances, a co-simulation method for the multiple heat sources of fully-integrated PA is proposed. Specifically, an adjustable bias circuit is applied on the PA for temperature compensation using a zero-to-absolute-temperature (ZTAT) current. To verify the proposed method, a sub-6G PA is realized in the GaAs HBT process. The experimental results show that the variations in power added efficiency and output power is stabilized due to the 3.5% error ZTAT current. The errors between simulation and measurement are reduced from 6% to 1%. According to the thermal factor defined in co-simulation, the working temperature decreases 10 °C, while the area only increases 27%. The above results prove that that thermal stability and the simulation reliability can be co-designed with the minimal area cost.

A fully integrated GaAs HBT power amplifier with enhanced efficiency for 5-GHz WLAN applications

An efficiency-enhanced fully integrated power amplifier (PA) for wireless local area networks (WLANs) was implemented based on the GaAs heterojunction bipolar transistor (HBT) process. A harmonic tuning network that can absorb the parasitic inductance of the bonding wires is proposed, which reduces the chip area significantly. The network provides nearly optimum fundamental and second harmonic impedances from 5.0 to 5.5 GHz. Additionally, a novel adaptive bias circuit that corrects the AM-AM and AM-PM distortion and improve thermal stability at high input power was proposed. With a chip dimension of only 1.06 mm2, the PA achieves a gain of 31.1-31.6 dB and saturated power of 29.9-30.3 dBm with a peak power-added efficiency (PAE) of 49.3%-51.8% across 5.0-5.5 GHz. The PA also shows an output power of 22.1 dBm (EVM=-32 dB) with 18.4% PAE under an 802.11ac MCS9 VHT160 test signal. In addition, the PA delivers 17.5 dBm (EVM=-42 dB) output power when tested with the 802.11ax MCS11 VHT160 signal at 5.25 GHz.

A Compact Macromodeling Method for Characterizing Large-signal DC and AC Performance of InP and GaAs HBTs

In this paper, a compact macromodeling method for characterizing the large-signal characteristics of heterojunction bipolar transistors (HBTs) is proposed and successfully applied to describe the DC and AC performance of InP and GaAs HBT devices. Using the Symbolically-defined Device (SDD) technology, an empirical macro circuit preserving the Spice Gummel-Poon (SGP) intrinsic network and a simplified thermal network is established. The empirical current and charge functions are embedded in the SDD macro circuit network module. Compared with other large-signal models, the proposed model description and the relevant parameter extraction are relatively simpler, and at the same time, this method can maintain high fitting accuracy. To assess the validity and the accuracy of the proposed model, the compact large-signal model is constructed for 1 ㎛ InP HBT and 1 ㎛ GaAs HBT. Based on the complete extraction of the model parameters, excellent consistency is obtained between the measured and modeled results.

상호 결합된 차동인덕터를 이용한 GaAs HBT 공정 기반의 1.9 GHz~2.6 GHz 광대역 선형 전력증폭기 설계

This study presents a wideband two-stage linear power amplifier, operating from 1.9 to 2.6 GHz, using a mutually coupled differential inductor based on GaAs hetero-junction bipolar transistor (HBT). A part of the two-section inter-stage matching circuit comprises a mutually coupled differential inductor, which widens the operating band of the matching circuit and reduces the circuit size. In addition, it is optimized to linearly operate in the wide frequency band using a wideband balun at the input and output stages. The fabricated linear power amplifier exhibits a maximum output power of 22.0 dBm~24.0 dBm and efficiency of 33.0 %~39.0 % in the 1.9 GHz~2.6 GHz frequency band. An IMD3 of −30.0 dBc at two-tone signal, with high efficiency of more than 33.0 % was achieved at the linear output power of 22 dBm.

Design narrow-band frequency amplifier (1.5GHz -1.6GHz) based on InGaP Heterojunction Bipolar Transistor (HBT) and GaAs HBT

The research aims to design a narrow-band frequency drive amplifier (1.5GHz -1.6GHz), which is used to boost the transmitter amplifier's input signal or amplify the GPS, GlONASS signals at the L1 band.&#x0D; The Power Amplifier printed circuit board (PCB) prototype was designed using InGaP HBT homogeneous technology transistor and GaAs Heterojunction Bipolar Transistor (HBT) transistor. Two models have been compared; one of the models gave 16dB gain, and the other gave 23dB when using an input power signal (-15dBm). The PCB consumes 2.4W of power and has a physical dimension of 11 x 4 cm.

Displacement Damage Effects Mitigation Approach for Heterojunction Bipolar Transistor Frequency Synthesizers

This work focuses on the design issues of radio frequency (RF) bipolar integrated circuits (ICs) as a part of frequency synthesizers for extreme environmental applications. It is shown that silicon–germanium (SiGe) and gallium arsenide (GaAs) heterojunction bipolar transistors (HBTs) as well as bipolar RF ICs (including frequency dividers, voltage-controlled oscillators, and wide-band amplifiers) are highly sensitive to ambient temperature and radiation-induced displacement damage. This article also presents a design approach based on specialized HBT macromodels and hardening techniques.

A Highly Efficient Linear Multimode Multiband Class-J Power Amplifier Utilizing GaAs HBT for Handset Modules

This article presents the design techniques for a multimode multiband (MMMB) linear RF power amplifier (PA) with a high efficiency, suitable for wireless handset multichip modules. The PA operates with high efficiency at the saturated output power and maintains high linearity with an enhanced efficiency at the back-off power. It is, thus, able to operate in multimodes (saturated/linear) and covers multibands (814-915 MHz; bands: 5/8/18/19/20/26) without reconfiguration, representing a novel solution for the converged PA module architecture to reduce the number of PAs within the handset. A new technique to the handset industry, class-J, is adopted to improve the efficiency while maintaining the linearity. To the best of our knowledge, this work provides the first implementation of the class-J using the GaAs heterojunction bipolar transistor (HBT) technology in the multichip PA modules. The utilization of the GaAs HBT adds more degrees of freedom to enhance the linearity. A PA module, consisting of a GaAs HBT die mounted on a four-layer laminate, is designed. The die is fabricated using the flip-chip technology. The output matching network and the control/bias network are fabricated on the laminate using the printed inductors and the surface-mount device (SMD) capacitors. The results validate the design techniques, showing 2G power added efficiency (PAE) 62%, 2.5G error vector magnitude (EVM) ≤ 3%, and 3G adjacent channel leakage ratio (ACLR) of 5MHz ≤ -35 dBc. The design achieves a higher PAE than other reported reconfigurable and complex MMMB PAs, with comparable linearity.

A 4.2-to-5.4 GHz stacked GaAs HBT power amplifier for C-band applications

PurposePower amplifiers (PAs) play an important role in wireless communications because they dominate system performance. High-linearity broadband PAs are of great value for potential use in multi-band system implementation. The purpose of this paper is to present a cascode power amplifier architecture to achieve high power and high efficiency requirements for 4.2∼5.4 GHz applications.Design/methodology/approachA common emitter (CE) configuration with a stacked common base configuration of heterojunction bipolar transistor (HBT) is used to achieve high power. T-type matching network is used as input matching network. To increase the bandwidth, the output matching networks are implemented using the two L-networks.FindingsBy using the proposed method, the stacked PA demonstrates a maximum saturated output power of 26.2 dBm, a compact chip size of 1.17 × 0.59 mm2 and a maximum power-added efficiency of 46.3 per cent. The PA shows a wideband small signal gain with less than 3 dB variation over working frequency. The saturated output power of the proposed PA is higher than 25 dBm between 4.2 and 5.4 GHz.Originality/valueThe technology adopted for the design of the 4.2-to-5.4 GHz stacked PA is the 2-µm gallium arsenide HBT process. Based on the proposed method, a better power performance of 3 dB improvement can be achieved as compared with the conventional CE or common-source amplifier because of high output stacking impedance.

Guest Editorial for the special issue on devices and circuits for millimeter‐wave and THz applications

Guest Editorial for the special issue on devices and circuits for millimeter‐wave and THz applications