Fundamental Frequency Switching Research Articles

Real-time harmonics optimization of seven level converter for megawatt scale solar PV-utility integration

This paper presents a new single photovoltaic (PV) array fed cascaded H bridge (CHB) submodule based three-phase 10 MW solar photovoltaic (SPV) plant for medium voltage utility applications. Each submodule comprises of a single PV array, cascaded H bridge cells and line frequency transformers. A 10 MW seven level converter based solar PV plant is realised with four submodules feeding solar PV array power to 33 kV grid. In megawatt scale multilevel converters based configuration, semiconductor switches experience reduction in voltage stress and requirement of high switching frequency for gating for switches is eliminated. Moreover, an efficient single stage MPPT based decoupled controller is implemented with genetic algorithm inspired fundamental frequency switching. GA based optimization technique is used to calculate optimal switching angles in offline mode. Obtained switching angles are incorporated to achieve closed loop optimized decoupled control of SPV system. Lower order harmonics are eliminated and power is fed to grid at enhanced power quality. This large scale PV system is modelled in MATLAB-Simulink and simulated results are validated in real time.

Fundamental frequency switching strategies of a seven level hybrid cascaded H-bridge multilevel inverter

This paper presents a novel hybrid cascaded H-bridge multilevel inverter (HCHB MLI) designed to address the growing importance of multilevel inverters in the context of renewable energy sources such as solar, wind, and fuel cells. The proposed topology features eight insulated-gate bipolar transistor (IGBT) switches and utilizes two distinct input direct current (DC) sources: a battery and a capacitor, making it a hybrid system. The control strategy employed in this topology is based on fundamental switching frequency techniques. Simulation results of the proposed topology are conducted using MATLAB/Simulink software, while hardware experimentation with a single-phase H-bridge inverter is also demonstrated in the paper. For pulse generation and IGBT switch control, an Arduino UNO microcontroller is utilized. The output voltage of the single-phase H-bridge inverter is verified through experimentation using a cathode-ray oscilloscope (CRO).

Cascaded H–Bridge Multilevel Inverter: Review of Topologies and Pulse Width Modulation

Multilevel inverters (MLIs) have become more popular for medium-voltage and high-power applications. The cascaded H-bridge multilevel inverter (CHBMLI) is one of the three most popular topologies of MLIs. It was more reliable due to its fewer components per level. The number of possible output voltage levels is more than twice the number of DC sources, the most suitable topology for integration with renewable energy sources, easy to design, and has good performance with modularity. The main disadvantage of CHBMLI is the need for separate DC sources for each H-bridge. However, this can be considered as an advantage to be employed in renewable energy applications. This paper provides a review of CHBMLI topologies and pulse width modulation (PWM) techniques, including fundamental and high switching frequency techniques, such as selective harmonic elimination (SHE), space vector modulation (SVM), nearest level modulation (NLM), and Carrier-Based PWM.

Circuit simulation-based comparison of power electronics devices in a five-level converter for UAV applications

<p>In this paper, the performance of a 5-level cascaded H-bridge inverter in unmanned aerial vehicle (UAV) applications is analized to identify, at the converter design stage, the better device choice depending on different UAV operation scenarios. Considering that regardless of the specific application there are some typical operations, such as take-off, climb, land, cruise, and potential recurring climbs and descents, the results can support the choice by considering the typical working conditions of the specific application where the UAV would be used. The results have been obtained by simulating the H-bridge inverter considering the circuit models of insulated-gate bipolar transistors (IGBTs), GaN high-electron-mobility transistors (HEMTs), and Si and SiC metal-oxide-semiconductor field-effect transistors (MOSFETs) provided by manufacturers. The study has highlighted that the choice of the device depends on the UAV usage, switching frequency, and load conditions. More specifically, considering the typical devices and systems costs in the case of a selective harmonic elimination procedure operating at the fundamental switching frequency, the Si devices should be used. Moreover, the preference for using IGBTs or Si MOSFETs depends on the typical working conditions of the UAV application. In the case of phase-shift carrier modulation technique, at 4 kHz the MOSFET is the best device and the choice between Si and SiC devices depends on the UAV application's main operation scenarios. At 20 kHz the SiC MOSFET is the best device, while at higher frequencies the GaN HEMT cost should be faced to take advantage of its best performance.</p>

Testing the Advanced Single Phase Asymmetric Cascaded Multilevel Inverter Topology using RES

This paper works on developing a model of single phase asymmetrical cascaded multilevel inverter (MLI) which couples’ renewable energy sources (RES) to the electrical or electronic loads of the AC powered transport system applications (e.g., Locomotives, Vehicles). MLI is the most important device as it is the main adaptation stage between the source and the load. Researchers are now more focused on multilevel inverters because of its numerous advantages. The prime benefit of a multilevel inverter is obtaining more output voltage levels using a smaller number of DC sources. The proposed topology for this work is asymmetric and produces 31-Levels of output which consists of 12 IGBT switches and 4 isolated dc voltage supplies V dc1 , V dc2 , V dc3 and V dc4 (Ratio of 2:4:8:16). The proposed topology has been processed by using PWM (Pulse Width Modulation) technique. Fundamental switching frequency (50HZ) has been used to achieve better quality of output voltage waveform with low harmonic distortion. The proposed topology has been explicitly and thoroughly analyzed throughout the study to demonstrate its superiority over alternative MLI topologies. Power loss analysis of the chosen MLI topology is also shown. An adequate comparison is also carried out between traditional and the proposed topologies. The comparative analysis shows that the chosen existing topology is better performed than others. According to the theoretical analysis conducted, the maximum efficiency obtained is 92.91% along with THD of 4.44% and TSV of 60 V dc . The accuracy of the proposed topology is verified through simulating the entire model in MATLAB-Simulink software.

Computer and experimental analysis of a reconfigurable staircase module-based multi-level inverter with fault tolerant capability

In the conventional multilevel inverters, occurrence of a fault in one or more power switches can cause abnormal changes in the output waveforms. Besides, increasing the applied power switches results to an increase in the possibility of fault on the power switches. Accordingly, providing a comprehensive structure with high fault-tolerant capability is one of the vital requirements and critical challenges. To tackle these issues, this study first presents and explores a new basic unit and staircase module (SM) and then extends and optimizes it to yield a reconfigurable multi-level inverter (MLI) with more levels and different goals. The proposed MLI can continue to operate when open-circuit faults in switches. This advantage of the proposed structure is achieved without any redundant legs or switches. For further investigation, a comparison is made in terms of the number of power switches, drivers, dc sources, and reliability between the proposed and similar structures. To control the output voltage levels, the strategy of fundamental frequency switching triggers the configured topology. The carrier signals are reconfigured under fault conditions based on levels to be generated by bypassing the faulted switch. The validity of the established MLI with its fault-tolerant capability is certified through both computer simulations using the MATLAB/Simulink platform and laboratory prototype implementations.

BLDC Motor Driven Solar PV Array Fed Water Pumping System Employing Zeta Converter

Abstract—This paper proposes a simple, cost effective and efficient brushless DC (BLDC) motor drive for solar photovoltaic (SPV) array fed water pumping system. A zeta converter is utilized in order to extract the maximum available power from the SPV array. The proposed control algorithm eliminates phase current sensors and adapts a fundamental frequency switching of the voltage source inverter (VSI), thus avoiding the power losses INTERNATIONAL JOURNAL OF SCIENTIFIC RESEARCH IN ENGINEERING AND MANAGEMENT (IJSREM) VOLUME: 07 ISSUE: 09 | SEPTEMBER - 2023 SJIF RATING: 8.176 ISSN: 2582-3930 © 2023, IJSREM | www.ijsrem.com DOI: 10.55041/IJSREM25857 | Page 2 due to high frequency switching. No additional control or circuitry is used for speed control of the BLDC motor. The speed is controlled through a variable DC link voltage of VSI. An appropriate control of zeta converter through the incremental conductance maximum power point tracking (INC-MPPT) algorithm offers soft starting of the BLDC motor. The proposed water pumping system is designed and modeled such that the performance is not affected under dynamic conditions. The suitability of proposed system at practical operating conditions is demonstrated through simulation results using MATLAB/ Simulink followed by an experimental validation.

A Switched-Capacitor-Based 7-Level Self-Balancing High-Gain Inverter Employing a Single DC Source

This paper discloses a novel switched capacitor (SC)-based 7-level inverter with a single DC source. The proposed inverter has the ability to self-balancing the voltage of the capacitor without using a closed-loop voltage balancing circuit. Two capacitors are equally charged by the input source owing to the series-parallel charging and discharging continuously in a full cycle. The proposed 7-level SC inverter requires less number of switches, driver diodes, and capacitors and a lower number of semiconductor switches than most recently developed topologies. Furthermore, four out of the eight switches operate at the fundamental frequency, which simplifies the control scheme. A fundamental frequency switching scheme is used to control the output of the inverter. The self-balancing and voltage-boosting features of the proposed structure are validated on MATLAB/software platform and verified experimentally.

A New Active Front-End Control for Regenerative Cascaded H-Bridge Motor Drives With Filter- Less Interfacing Capability

This paper proposes a new active-front-end (AFE) control method for regenerative Cascaded H-bridge (CHB) motor drives. Conventional CHB converters have dominated the market for the medium-voltage industrial motor drives. However, conventional CHB converters cannot provide regenerative capability. To enable regeneration; diode-front-ends (DFEs) in power cells are replaced with IGBT-based PWM AFEs. Despite the appealing dynamic performance of PWM AFEs, their integration to the CHB converters is not optimal. First, they introduce more semiconductor losses due to the high frequency switching. Second, they introduce switching harmonics that are not cancelled by phase-shifting transformers. Therefore, they require additional harmonic filtering solutions to comply with grid harmonic standards. To resolve these challenges, this paper proposes a new AFE control for regenerative CHB converters based on fundamental frequency switching (FFE) to reduce switching frequency and thus power losses. The operation of FFEs at nominal and sag voltage conditions is presented, in addition to the capability of filter-less interfacing to the transformer. Finally, the performance of the proposed control is validated experimentally on a seven-level regenerative CHB drive.

A Pencil-Shaped 9- Level Multilevel Inverter

It is suggested to build a 9-level pencil-shaped (PS) inverter with a minimum of two DC supplies. Low component multilevel inverters (MLIs) employ extra conducting switches in addition to the DC supply. • This suggested MLI is more effective since it uses fewer power electronic switches. The architecture enables a higher voltage level inverter with a modular design that uses fewer DC supplies and does it appropriately without the need for an additional H-bridge circuit. Additionally, a control plan is suggested for distributing loads equally in a nine-level architecture. • The potential for equitable load distribution in higher-level designs and fundamental frequency switching of switches carrying larger voltage strains are also being looked into. Through simulations and experimental experiments, several notions are validated. The simplified formulae for the suggested inverter parameters are built to determine their optimal capabilities. • Additionally, an optimal PSMLI design is created using the expanded model of the suggested architecture to reduce the inverter's total standing voltage (TSV). Comparison studies are provided to support the proposed inverter and show its benefits over recent MLIs of comparable sorts. • Through accurate simulation and lab tests, the MLI was able to achieve a greater efficiency of 95.54%. The improved 17-level version of PSMLI, on the other hand, achieved IEEE 519 standard performance with total harmonic distortions (THD) of just 5.15%. Key Word: Multi-level inverter, power electronics, switched capacitor, voltage boost, nearest level control.

Control of Regenerative CHB Motor Drives at Fundamental Switching Frequency

To handle the high-power regeneration power in coal and mine industry applications, the regenerative version of the cascaded H-bridge (CHB) drives is made possible by replacing the diode-front-end rectifier with a three-phase IGBT-based active-front-end (AFE) rectifier in each power cell. However, the IGBT switching devices introduce extra switching losses to the system that must be properly handled due to the thermal constraints in high power medium voltage drive applications. In this article, a novel fundamental switching frequency control strategy is proposed for the AFEs in the regenerative CHB drive. With the proposed control strategy, the main harmonic contents generated by the AFEs are well-reshaped at a low-order harmonics range which can be further eliminated by the existing front-end phase-shifting transformer. This allows accomplishing the meeting of the IEEE std 519-2014 at the fundamental switching frequency <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">f</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sw</sub> = 60. Moreover, with the proposed switching pattern, IGBTs can be turned <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> at zero current and therefore it can reduce switching losses simultaneously. The feasibility of the proposed control strategy is verified by experimental results on a seven-level regenerative CHB drive, which can be extended to regenerative CHB drives with any voltage levels.

A Hybrid Five-Level Modular Multilevel Converter With High Efficiency and Small Energy Storage Requirements for HVDC Transmission

This article presents a hybrid five-level converter (H5LC) with cascaded full-bridge submodules (FBSMs) for high voltage direct current (HVdc) transmission. A five-level converter operates at a fundamental switching frequency to generate symmetric five-level square wave output voltages which are shaped into smooth sinusoidal voltages by the ac-side FBSMs. Using a proposed third-order harmonic voltage injection scheme, the FBSMs’ total blocking voltage is limited to one-eighth of the dc-side voltage, reducing the H5LC's losses, footprint, and capital costs. dc pole-to-pole fault blocking is enabled using a bypass branch consisting of bidirectional thyristor valves and fast mechanical switches to suppress the ac-side fault contribution within half a fundamental cycle. Full-scale HVdc simulation studies show the H5LC's ability to control real and reactive powers and additionally, its dc fault resilience. A lab-scale hardware implementation of an H5LC with 30 FBSMs is presented to verify its operating principle. In contrast to the half-bridge submodule based modular multilevel converter, the H5LC has improved efficiency, fewer semiconductor devices, and significantly reduced energy storage requirements.

A Stacked Multilevel Inverter With Single DC Link for Open-End Winding Induction Motor Drive With Zero-Voltage Switching and Common-Mode Voltage Elimination

A switching-state selection scheme for a five-level stacked multilevel inverter for open-end winding motor drive is presented in this article. Using the proposed scheme, converter can be operated with a single dc supply and with zero common-mode voltage. In addition, the switching transition of high-voltage switches occurs at zero-voltage conditions. The degree of freedom provided by the redundant switching-states and voltage vectors of the inverter topology is utilized to design the modulation scheme. The proposed switching-state selection leads to inherent capacitor balancing without using any extra sensors and fundamental frequency switching of the high-voltage switches of the topology. The modulation scheme uses triangular carrier comparison and, hence, avoids the complexity of subsector identification and dwell time calculation. Half-wave symmetry in output waveforms is ensured by maintaining synchronous sampling with constant samples per fundamental cycle. The inverter topology and the effectiveness of the state selection scheme are experimentally validated on an open-end winding induction motor drive, and experimental results showing steady-state and dynamic operations are presented.

A Practical Digital Implementation of Completely Decentralized Ripple Minimization in Parallel-Connected DC–DC Converters

Parallel dc–dc converters are commonplace in applications such as computing power supplies, point of load systems, and dc microgrids. The presence of multiple converters in such systems allows for switch interleaving and ripple cancellation. One class of existing ripple reduction methods depends on central controllers that require communication among the converters. These approaches compromise system scalability and reliability. When it comes to decentralized methods, the state-of-the-art is limited to uniform conditions and cannot handle mismatches in physical parameters and operating points among converters. In this article, we address these shortcomings with fully decentralized controller that robustly drives the pulsewidth modulation carriers of a collection of heterogeneous converters to the phase-shifts that give minimized ripple. More precisely, the proposed controller eliminates the dominant fundamental switching harmonic from the output current and voltage using only local voltage feedback. After outlining a comprehensive analytical model, we experimentally validate our approach on a system of five parallel-connected buck converters under a variety of parametric and operational mismatches. Measurements show ripple reduction of more than <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$4\times$</tex-math></inline-formula> in the output voltage and the fundamental switching frequency harmonic is attenuated by more than 30 dB compared to conventional symmetric interleaving.

48-Pulse Voltage-Source Converter Based on Three-Level Neutral Point Clamp Converters for Solar Photovoltaic Plant

The demand for high-power converters for use in large-scale solar photovoltaic (PV) plants increases as the plant size continues to grow. The multipulse voltage-source converter (VSC) configurations are the viable option for high-power solar PV converter applications because they improve conversion efficiency due to low switching losses and allow direct integration with a medium-voltage (MV) grid. In this article, a 48-pulse VSC based on the fundamental frequency switching (FFS) three-level neutral point clamp (NPC) converter with a start–delta transformer configuration is used for large-scale solar PV plant application. It is also used as a PV-static synchronous compensator (STATCOM) to provide the required reactive power support to the grid to regulate the voltage. The solar PV plant configuration for a 100-MW capacity is modeled in MATLAB and implemented in the real-time OPAL-RT platform to verify its design and controls. The harmonics, static, and dynamic performances are demonstrated in detail.

A Two-Stage DC/DC Isolated High-Voltage Converter with Zero-Voltage Switching and Zero-Current Switching Applied in Electronic Power Conditioners

This paper presents a two-stage DC/DC converter with high efficiency utilized in an electronic power conditioner (EPC), which is widely applicable in satellite communications, etc. The galvanically isolated converter contains two cascaded converters: a buck converter, which is a pre-regulator operating under a closed-loop condition, and a push–pull converter, which is intended to boost the input voltage, operating under an open-loop condition. In the push–pull converter, the power switches, including the main switches and the rectifier diodes, operate under zero-voltage switching (ZVS) and zero-current switching (ZCS) at both switch off and switch on, which minimizes the switching loss. Furthermore, all of the parasitic parameters, such as the parasitic capacitance, leakage inductance, and magnetizing inductance of the main transformer, are fully utilized. Therefore, the presented topology benefits from fewer semiconductors but higher efficiency. The proposed topology produces less EMI noise because of ZVS and ZCS processes whose fundamental switching frequency interference is relatively low. The presented converter achieves a wide bus voltage regulation range in a satellite because of the pre-regulation of the buck cell. The theoretical analysis is validated by a prototype and its experimental results. The maximum efficiency of the converter can be up to 94.5%, and the high-voltage output is 7000 V.

A nearest level control technique for an asymmetric source configuration of multi-level inverter topology

In this paper, an asymmetric source configuration of Multilevel Inverter (MLI) topology has been proposed. It consists of eight unidirectional switches, two bidirectional switches and four isolated DC sources. By considering 1:5 and 1:4 source configurations, the inverter produces 25-level and 21-level outputs respectively with the same switching action. For producing negative voltage levels, there is no requirement of separate backend H-bridge and inherently produces both positive and negative voltage levels. The main advantage of this topology is that in every state, only four switches are in ON mode and else are in OFF state. It also gives less per unit Total Standing Voltage (TSV) and thereby cost requirement of semiconductor devices can become decreases. For generating gate pulses, the simple Nearest Level Control (NLC) has been used by considering the round function. This technique is basically a fundamental switching frequency technique thereby switching losses are greatly reduces as compared with high switching frequency Pulse Width Modulation (PWM) techniques and it is particularly suitable for large number of levels. With this control technique, there is no inrush current has been developed at the input of DC sources. Finally, with step change in Modulation Index (MI) values the proposed topology with two different source configurations have been validated through MATLAB/Simulink platform.

PV FED Interleaved Boost Converter for BLDC Motor

Abstract: The generation of solar energy and its conversion techniques gained greater importance due to increase use of electricity. The power generation scheme is more striking due to its advantages among all the Renewable Energy Sources. This project introduces a PV fed interleaved boost converter for BLDC motor, which is a simple, cost effective and efficient brushless DC (BLDC) motor drive for solar photovoltaic (SPV) array system. A interleaved boost converter is used in order to extract the maximum available power from the SPV array. This control algorithm eliminates phase current sensors and adapts a fundamental frequency switching of the voltage source inverter (VSI) hence avoids the power losses due to high frequency switching. In speed control of BLDC motor no additional circuitry or control is used. An appropriate control of interleaved boost converter is done by the incremental conductance maximum power point tracking (INC-MPPT) algorithm which offers soft starting of the BLDC motor. The proposed system is designed and modelled at steady state conditions of practical operating conditions is demonstrated through simulation results using MATLAB/ Simulink.

Hybrid multilevel inverter using switched capacitor with boosting and self-balancing capability

Switched capacitor based multilevel inverters with boosting capability are emerging as single stage DC–AC conversion in utilizing low voltage DC sources such as solar PV and fuel cell. This paper proposes a single-phase hybrid multilevel inverter topology based on a switched capacitor that is capable of generating 9-levels along with a voltage gain of 2. The components required to construct the basic module of topology are 11 switches, 1 diode and 2 capacitors. The voltage balancing of the switched capacitors is achieved with the help of a modulation strategy, thereby eliminating the need of sensors. The theoretical loss analysis of the inverter is presented and the nearest level control based fundamental switching frequency modulation technique is employed to study the performance of the proposed inverter. The effectiveness of the suggested topology is validated with the help of a prototype built in the laboratory. The superiority of the proposed topology is assessed with the help of comparison with existing topologies.

A Twenty Five Switch Inverter Topology for Controlling Two Independent Five-Phase Load

The inverter drives for controlling multiple loads will provide several advantages like lower power electronic components, costs, space, etc. In this paper, a new Three-Level (3L) Neutral Point Clamped (NPC) inverter topology for controlling the two independent Five-Phase Load (FPL) is proposed which is named as Twenty Five Switch Inverter (TFSI) topology. This TFSI topology has five switches and two diodes in each leg. The number of switches in the conventional two load inverter is 30 switches which is reduced to 25 switches in the proposed topology. The Space Vector Modulation (SVM) for the proposed TFSI topology has 1024 vectors which is the addition of two individual Five-Phase Three-Level (FPTL) SVM. The performance of two loads for the proposed topology is examined at different conditions like changing the fundamental frequency (f_o), switching frequency (f_sw) and modulation indices. The simulation is carried out with MATLAB/Simulink and the results are validated with hardware implementation.