Full-bridge Topology Research Articles

Closed-Form Formulas for Automated Design of SiC-Based Phase-Shifted Full Bridge Converters in Charger Applications

Phase-Shifted Full Bridge (PSFB) topology in its four-diode variant is the choice with the lowest part count in applications that demand high power, high voltage, and galvanic isolation, such as in Electric Vehicle (EV) chargers. Even though the topology is prevalent in power electronics applications, no single, unified analytical model has been proposed for the design process of four-diode PSFB converters. As a result, engineers must rely on simulations and empirical results obtained from previously built converters when selecting components to properly match the DC source voltage level with the DC load voltage requirements. In this work, the authors provide a design-oriented analysis approach for obtaining the output voltage and semiconductor current values, ready for implementation in a spreadsheet- or MATLAB-type software to automate design optimization. The proposed formulas account for all the first-order nonlinear dependencies by considering the impact of each of the following eight design parameters: DC-link voltage, load resistance, phase-shift ratio, switching frequency, transformer turns ratio, magnetizing inductance, series inductance, and output inductance. The results are verified through experiments at the power level of 10 kW and the DC-link voltage level of 800 V by using a grid simulator and a SiC-based two-level Active Front End (AFE) with a DC–DC stage based on the PSFB topology. The accuracy of the output voltage formula is determined to be around 99.6% in experiments and 100.0% in simulations. Based on this exact model, an automated design procedure for high-power high-voltage SiC-based PSFB converters is developed. By providing the desired DC-link voltage, output voltage, output power, output current ripple factor, maximum temperatures, and semiconductor and heatsink databases, the algorithm calculates a set of feasible designs and points to the one with the lowest semiconductor losses, dimensions, or cost.

Hybrid Three-Phase Rectifiers with Active Power Factor Correction: A Systematic Review

The hybrid three-phase rectifiers (HTR) consist of parallel associations of two rectifiers (rectifier 1 and rectifier 2), each one of them with a distinct operation, while the sum of their input currents forms a sinusoidal or multilevel waveform. In general, rectifier 1 is a GRAETZ (full bridge) (can be combined with a BOOST converter) and rectifier 2 is combined with a DC-DC converter. In this HTR contest, this paper is intended to answer some important questions about those hybrid rectifiers. To obtain the correct answers, the study is conducted as an analysis of a systematic literature review. Thus, a search was carried out in the databases, mostly IEEE and IET, and 34 papers were selected as the best corresponding to the HTR theme. It is observed that the preferred form of power distribution in unidirectional hybrid three-phase rectifiers (UHTR) is 55%Po (rectifier 1) and 45%Po (rectifier 2). For the bidirectional hybrid three-phase rectifiers (BHTR), rectifier 1 preferably takes 90% of Po and 10% of Po is processed by rectifier 2. It is also observed that the UHTR that employ the single-ended primary-inductor converter (SEPIC) or VIENNA converter topologies in rectifier 2 can present sinusoidal input currents with low total harmonic distortion (THD) and high Power Factor (PF), even successfully complying with the international standards. The same can be said about the rectifier that employs a pulse-width (PWM) converter of BOOST topology in rectifier 2. In short, the HTR are interesting because they allow using the GRAETZ full bridge topology in rectifier 1, thus taking advantage of its characteristics, being simple, robust, and reliable. At the same time, the advantages of rectifier 2, i.e., high PF and low THD, are well used. In addition, this article also points out the future direction of research that is still unexplored in the literature, thus giving opportunities for future innovation.

A novel wideband partial discharge measuring circuit under fast repetitive impulses of static converters

Nowadays fast switching power electronic devices are used for driving high voltage electric rotating machines. These power supplies apply sharp transient voltage at the time of switching. To study the effect of these stresses on the insulation system, investigating Partial Discharge (PD) during voltage rapid changes is of special interest. Although, the implemented coupling capacitor in a conventional PD measuring circuit provides a low impedance pass for the PDs, but imposes a transient current caused by sharp changes of voltage at the time of switching; hence, the measuring impedance of the conventional partial discharge equipment cannot distinguish an actual PD pulse from the mentioned transduced capacitive current pulses. Currently, two options are available in order to cope with this issue, including UHF technique and implementation of band pass filters. On the one hand, calibration of the PD pulses in the UHF method is not possible; hence, the PD test results of different manufacturers of machines under such stresses cannot be compared, which is the main drawback. On the other hand, one has to remove a wide range of frequency components of PD pulses that makes PD calibration procedure to be invalid. In this paper, a resonant full bridge topology is implemented to cancel out the capacitive pulse shaped current, where the PD pulses are captured directly via electrical method in a symmetric introduced configuration. The resulting inrush current has drastically reduced and a wideband measuring circuit with a true calibration process has become possible.

Fault Simulations in a Multiterminal High Voltage DC Network with Modular Multilevel Converters Using Full-Bridge Submodules

The concept of high-voltage DC transmission using a multiterminal configuration is presently a central topic of research and investment due to rekindled interest in renewable energy resource integration. Moreover, great attention is given to fault analysis, which leads to the necessity of developing proper tools that enable proficient dynamic simulations. This paper leverages models and control system design techniques and demonstrates their appropriateness for scenarios in which faults are applied. Furthermore, this paper relies on full-bridge submodule topologies in order to underline the increase in resilience that such a configuration brings to the multiterminal DC network, after an unexpected disturbance. Therefore, strong focus is given to fault response, considering that converters use a full-bridge topology and that overhead power lines connect the terminals.

Constant-Voltage and Constant-Current Output Using P-CLCL Compensation Circuit for Single-Switch Inductive Power Transfer

The characteristic of constant-current output (CCO) and constant-voltage output (CVO) on full-bridge topology can be realized by using a traditional double-sided LCC compensation network. The switching from CCO mode to CVO mode can be realized by switching the operating frequency in CCO mode ( f CC) to the operating frequency in CVO mode ( f CV). However, the operating frequency is generally high, the value of L P, L S, and M in the loosely coupled transformer will have a significant influence on the operating frequency of the circuit, which makes it difficult to carry out a long-distance transmission at a lower operating frequency, otherwise, the self-inductance of the coils will be high, even though it is used to transfer low-power. Therefore, in this article, a novel P- CLCL compensation topology based on a single-switching circuit (SSC) is proposed to address these problems. The switching from CCO to CVO can also be realized by changing the operating frequency from f CC to f CV, and a relatively lower operating frequency and a relatively farther transmission distance than full-bridge topology are realized. The calculation method of circuit parameters, implementation of zero-voltage-switching, sensitivity analysis, and load-independent output are discussed. Finally, the simulation and experiment are carried out to verify the correctness of the analysis.

Research on Losses of PCB Parasitic Capacitance for GaN-Based Full Bridge Converters

The utilization of wide band-gap semiconductor devices provides the possibility of higher switching frequency and power density for power converters. However, the influence of parasitic parameters becomes more significant. It deteriorates the converter performance and leads to extra loss. In this article, the extra loss caused by the parasitic capacitance of printed circuit boards (PCBs) is studied. The mechanism is explained, and the model of full bridge topology with PCB parasitic capacitance is proposed as an example. Both the capacitance in power loops and control circuits are considered in the proposed model. Besides the capacitive loss in power loops, losses are also introduced by the capacitive coupling between the power and control circuits due to the potential pulsation of the control ground. This potential pulsation is analyzed and the calculation method of corresponding losses is presented. The formation of PCB parasitic capacitance is analyzed in detail and corresponding layout optimization methods are proposed. Theoretical analyses are verified on a gallium nitride based full bridge prototype with calorimetric loss measurement. The comparison of calculated and measured losses is presented, which shows a switching loss deviation of 26% without the consideration of parasitic capacitance and a 40% reduction on the extra losses after the proposed optimization.

Analisis Pengaturan Parameter Sinusoidal Pulse Width Modulation pada High Precission Closed Loop Full Bridge Bipolar Inverter untuk Pembangkit Tegangan Tinggi Berfrekuensi Tinggi

The application of high voltage becomes more important and wider. High voltage is needed in the process of reducing air contaminants, waste treatment, sanitation, disinfecting microorganisms, testing for insulating high voltage equipment, and transmitting electrical energy. The problem of high voltage AC generation system is still in a large scale, static, not portable, and very expensive. This paper presents an analytical design of a high-voltage AC high-frequency based on power electronic. It is portable, less expensive, and eaasier to control the amplitudo and frequency. The application of the Full Bridge Bipolar Inverter topology with the Sinusoidal Pulse Width Modulation switching method provides variable sinusoidal AC voltage outputs (Vo) on its amplitude and frequency. The Tesla Coil Transformer amplifies the amplitude in accordance with the classification of the high voltage AC in the order of Kilo Volt. The Closed Loop control system in the Bipolar Inverter Full Bridge topology provides high accuracy results between the given setting values and the actual amplitude output and the expected high-frequency AC voltage. Analysis of the SPWM switching pattern parameter settings shows stability for several loading variations

Phase-Shift PWM-Controlled DC–DC Converter with Secondary-Side Current Doubler Rectifier for On-Board Charger Application

A novel circuit topology for an on-board battery charger for plugged-in electric vehicles (PEVs) is presented in this paper. The proposed on-board battery charger is composed of three H-bridges on the primary side, a high-frequency transformer (HFT), and a current doubler circuit on the secondary side of the HFT. As part of an electric vehicle (EV) on-board charger, it is required to have a highly compact and efficient, lightweight, and isolated direct current (DC)–DC converter to enable battery charging through voltage/current regulation. In this work, performance characteristics of full-bridge phase-shift topology are analyzed and compared for EV charging applications. The current doubler with synchronous rectification topology is chosen due to its wider-range soft-switching availability over the full load range, and potential for a smaller and more compact size. The design employs a phase-shift full-bridge topology in the primary power stage. The current doubler with synchronous recitation is placed on the secondary. Over 92% of efficiency is achieved on the isolated charger. Design considerations for optimized zero-voltage transition are disused.

Research on Applications of An Improved Current Type Push-pull Full bridge bidirectional DC-DC Topology in UPS

Uninterruptible power supply (UPS) boasts the superiority of fast dynamic response and clean output power, which can ensure the stable operation of the system and the safety and reliability of data. Currently, it takes up a large proportion in the backup power market and is extensively applied in key industries such as energy and the Internet. UPS is connected between commercial power and power load, and furnishes uninterrupted, reliable and high-quality power to vital loads when the input power fails. Bi-directional DC-DC converter can realize bi-directional flow of energy, which is functionally equivalent to two uni-directional DC-DC converters, rendering the system to carry the advantages of high power density and low cost, which has become a research focus at home and abroad in the passing years. The traditional current-mode push-pull full bridge topology fails to realize the soft start of the on-line UPS and stable operation of it under empty and light load. Based on this topology, the inductor secondary coil and two freewheeling diodes are added to make the push-pull tube work in any duty ratio state, thus meeting the design requirements of the bi-directional DC-DC converter in UPS. The working principle of the improved topology is described in this thesis, and Saber and Matlab are used for simulation analysis. Prototype is made and debugged to verify the feasibility of the design so as to achieve the expected design goals.

A novel photovoltaic inverter topology based on common mode current suppression

ABSTRACT Aiming at the problems of large leakage current and low efficiency of existing transformerless single-phase grid-connected photovoltaic inverters, a novel transformerless single-phase grid-connected photovoltaic inverter topology is proposed. In this topology, two freewheeling diodes are added to the single-phase full-bridge inverter, and the filter inductors are moved between the upper and lower bridge arms, so that the common mode voltage remains constant during the switching period and the common mode current is effectively suppressed. Finally, through simulation and the experimental platform of 3kW single-phase grid-connected photovoltaic inverter, it is verified that compared with the traditional full-bridge topology, the novel topology can effectively suppress the common mode current, while compared with the H5 and H6 topology, the novel topology reduces the system loss and improves the system efficiency.

A Topology Synthetization Method for Single-Phase, Full-Bridge, Transformerless Inverter with Leakage Current Suppression Part I

Single-phase full-bridge transformerless topologies, such as the H5, H6, or the highly efficient and reliable inverter concept (HERIC) topologies, are commonly used for leakage current suppression for photovoltaic (PV) applications. The main derivation methodology of full-bridge topologies has been used based on both a DC-based decoupling model and an AC-based decoupling model. However, this methodology is not suited to the search for all possible topologies, and cannot verify whether they are inclusive. Part I of this paper will propose a new topology derivation methodology based on unipolar sinusoidal pulse width modulation (USPWM) to search all possible full-bridge topologies for leakage current suppression. First of all, a unified circuit model is proposed, instead of the DC- and AC-based models. Secondly, a mathematic method called the MN principle is then proposed to search for all possible topologies, and a derivation procedure is provided. It was verified that all existing topologies could be found using the proposed method; furthermore, seven new topologies were derived. The proposed topology derivation methodology is extended to search topologies under Double-Frequency USPWM (DFUSPWM). Twenty topologies under USPWM and four topologies under DFUSPWM have been derived.

Modeling and stability study of a high frequency and high efficiency photovoltaic DC boost converter

Many practical photovoltaic power generation systems with higher output voltage levels rely on photovoltaic DC boost converters with high frequency and high efficiency, which performance directly affect the conversion efficiency of photovoltaic power generation systems. This paper investigates a high-frequency and high-efficiency photovoltaic DC boost converter, which adopts the Boost full-bridge isolation circuit topology with active clamps. The conductance increment method is used as the maximum power point tracking algorithm. The small signal models of its power circuit and control circuit are established to obtain the system model and analyze its stability. The simulation results indicate that the ripple coefficient of output current is less than 3%, and the ripple coefficient of output voltage is less than 5%, which meets the stability requirements.

Modeling of ZVS Transitions for Efficiency Optimization of the Phase-Shifted Full-Bridge Topology

The emergence of wide bandgap semiconductors paved the way for integration of high-efficiency, high-power-density converters into industrial applications. Key to achieving these performance goals is operation at high switching frequencies, which requires mitigation of switching losses by schemes, such as zero-voltage switching (ZVS). The phase-shifted full-bridge (PSFB) converter is a very appealing converter for such industrial applications. However, the mechanisms that underlie the operation of ZVS within this topology are complex, as they depend on the coupled influence of multiple system parameters. This article aims to provide a detailed analytical treatment of the ZVS mechanisms within this topology, along with a detailed study of the interdependence of the associated critical system parameters. A prototype 10-kW, SiC-based PSFB converter is employed to aid this discourse and provide empirical validations. The outcome of these studies is leveraged to identify a set of practical guidelines for tuning the ZVS mechanisms. These guidelines also consider the impact of practical nonidealities, which are often neglected in the literature. Overall, the theoretical formulations, parametric trade studies, and practical implementation suggestions presented in this article constitute a set of tools that designers can utilize to obtain the full performance entitlement of this topology in practice.

Modulation Method and Control Strategy for Full-Bridge-Based Swiss Rectifier to Achieve ZVS Operation and Suppress Low-Order Harmonics of Injected Current

The Swiss-type rectifier (SR) uses a three-phase unfolder circuit to convert the ac voltage into two time-varying positive voltages. The power factor correction of ac sides and the stable dc voltage output can be realized by using two dc-dc topologies without any bulky decoupling capacitors. By applying the phase-shifted full-bridge topology into the dc structure, both the soft-switching and the high-frequency electrical isolation can be achieved. However, the power coupling between two full bridges using the traditional modulation method will affect the zero-voltage switching (ZVS) condition of lagging legs. Then, the duty cycle loss caused by the transformer leakage inductance will affect the input and output performance. Therefore, a new method using the up-counting mode modulation is proposed to implement the ZVS for both the lagging switches. Then, the relationship between the duty cycle loss and the extra 6N ± 1 harmonics added into the input current is theoretically analyzed. Hence, to suppress the low-order harmonics, a novel compensation strategy is proposed. The proposed modulation method and control strategy have been successfully verified by the experiments. 95% efficiency under half-rated power and 3% input current total harmonic distortion (THD) under rated power have been achieved under a 10-kW 380 Vac input/400 Vdc output prototype with 90-kHz switching frequency.

Instantaneous Pulse Power Compensator for High-Density Single-Phase Inverters

In this paper, instantaneous pulse power compensator (IPPC) method is proposed to achieve power pulsation decoupling function for single-phase inverter applications. A smaller capacitor is placed in series with the traditional dc-link capacitor, and this smaller capacitor voltage is controlled using pulse currents to cancel out the dc-link voltage ripple. Unlike twice-line-frequency power decoupling method, the proposed IPPC method can compensate the pulsating power with all the orders harmonics on the dc-link line, not only the second-order component. Both modeling and simulation results show that IPPC method can achieve nearly zero voltage ripple for the dc-link capacitor since the pulse current is fully compensated. Whereas twice-line-frequency power decoupling method has limit in voltage ripple reduction, especially in small dc-link capacitance conditions. The experimental results based on a full-bridge topology decoupling circuit and a single-phase inverter application show consistent results with simulation results. A 16% reduction of the prototype size, i.e., 16% higher power density with only ∼1% efficiency penalty can be achieved by the proposed IPPC method when compared to the second-order power decoupling method.

A Dynamic Priority Factor Loop for Fast Voltage Equalization Applied to High Power Density DC–DC Converter System

A fast output voltage equalization control strategy applied to 10-kV/100-kW high power density photovoltaic dc–dc converter system is proposed in this paper. The converter modules in the system have two dynamic priority factor loops for fast response with an inconsistent voltage between modules and a soft start-up circuit to precharge output capacitance for solving inrush current problem in boost circuit. The proposed strategy can realize fast voltage equalization control under inconsistent leakage inductance and parasitic resistance parameters condition between modules compared to the traditional unified duty cycle control strategy. The fast equalization performance is verified by 10-kV/100-kW photovoltaic dc–dc converter system. The converter system adopts an isolated boost full-bridge topology and input parallel output series structure, which meets high conversion ratio and high-power density requirements.

Isolated DC/DC converter with three‐level high‐frequency link and bidirectional power flow ability for electric vehicles

A high-frequency isolated bidirectional DC/DC converter based on the combination of an H-bridge, a three-level half-bridge and a three-phase full bridge topology is proposed for electric vehicle applications. The 24 V low-voltage battery pack is the power supply of the converter and it is raised to about 144 V, which is then converted to three-phase AC voltage to drive the induction motor. A multilevel high-frequency link is proposed to implement the conversion from the low voltage side (LVS) to the high voltage side (HVS). The switching patterns and single-phase three-level pulse width modulation is proposed to maintain the voltage on HVS and to control the power flowing out of the battery. The zero voltage switching characteristics of the low rating-voltage metal-oxide-semiconductor field-effect transistors on LVS and HVS are analyzed. The algorithms to suppress DC bias of magnetising current and to equalise the capacitor voltages are also introduced. The effectiveness and the control strategy of the proposed converter are verified by simulation and experimental results.

Feasible protection strategy for HVDC system by means of SFCL and passive resonance DC breaker

The key obstacle in implementing high-voltage direct current (HVDC) grid, which is considered as the future of power grid, is the absence of effective DC circuit breaker (DCCB). At present, HVDC grid could be based on half-bridge (HB) or full-bridge (FB) voltage source converter (VSC). Among these two converter topologies, FB topology has an advantage of reverse current blocking at a much higher cost compared to HB technology and still requires a DCCB for isolating the faulty line. Therefore, HB technology is more realistic to implement HVDC grid economically if DC fault current could be controlled more effectively. In this respect, this article suggests feasible fault protection strategy based on superconducting fault current limiter (SFCL) and passive resonance circuit breaker (PRCB) which could be applied effectively to HB system. To evaluate the performance of suggested protection scheme, comparative study of full-bridge modular multilevel converter (FB-MMC) protection was performed. In addition, the process to determine the optimal range for quenching resistance of SFCL was also investigated. Consequently, the authors’ suggested protection scheme has shown remarkably improved fault current limiting and interruption performance compared to FB-MMC protection scheme.

Bidirectional soft‐switching dc–dc converter for battery energy storage systems

The study introduces a bidirectional dc-dc converter with current- and voltage-fed (VF) ports that features soft switching in both buck and boost operating modes. The converter can be used for integration of low-voltage DC sources, such as batteries into a dc bus of considerably higher voltage or a dc link of a grid side inverter. Zero current switching, assisted with the leakage inductance of the isolation transformer, can be achieved at the current-fed side along with zero voltage switching of the VF side, assisted by snubber or intrinsic capacitances of the transistors. Soft switching can be maintained over a wide range of voltage and power levels, regardless of the energy transfer direction. Converter operation is described and theoretical findings were verified with experimental results obtained by means of a 300 W prototype operating at a switching frequency of 100 kHz and designed for integration of a 24 V battery into 400 V dc bus. The converter proposed is compared in terms of efficiency to other competing soft-switching full-bridge topologies implemented with the same components.

Hybrid control scheme for mitigating the inherent DC‐current in the transformer in buck‐boost full‐bridge converter for an all‐electric motor drive system

A buck-boost full-bridge topology is preferred for low-input voltage, high gain, high-power battery fed front-end converter of an all-electric motor drive system. Variants of this topology feature high direct current (DC)-gain, soft switching, continuous input and output currents with a phase modulation/asymmetrical pulse width modulation (PWM) scheme. These variants exhibit a high-magnitude DC-current in the transformer primary winding for low-input voltage, high-power application leading to poor core utilisation and low-power density of the system. The operation and analysis of the converter are presented to highlight the DC-current in the transformer and to mitigate this, a hybrid control scheme (HCS) is proposed. The proposed HCS consists of a DC-current compensation (DCCC) loop to mitigate the DC-current in the transformer without altering the DC-gain with no additional components and output regulation (REG) loop to regulate the output. The output REG and DCCC loops are independent of each other. Soft switching is retained with this proposed scheme. The necessity to mitigate the DC-current, analysis, and implementation of the HCS is discussed. The verification of the proposed HCS scheme in simulation and the experimental prototype is presented.