Free Pages Research Articles

A memory-efficient real-time non-copying garbage collector

Garbage collectors used in embedded systems such as Personal Java and Inferno or in operating systems such as SPIN must operate with limited resources and minimize their impact on application performance. Consequently, they must maintain short real-time pauses, low overhead, and a small memory footprint. Most garbage collectors, including the Treadmill algorithm, are inadequate because they sacrifice space for time. We have implemented a new Treadmill variant that provides good memory utilization by using real-time page-level management techniques that reduce fragmentation. A page-wise collection is used to locate pages of free memory, which are then dynamically reassigned between free lists as needed. Virtual memory is used to dynamically remap free pages into continuous ranges, and objects are allocated from under-utilized pages when needed. Finally, the use of header compaction and arbitrary free-list sizes reduces internal fragmentation. Our experiments demonstrate that we have substantially improved memory utilization without compromising latency or overhead, and that the new collector performs very well for SPIN's workloads and regular Modula-3 programs.

A memory controller executing segment operations in time 0(1)

A memory controller unit is presented for segmentation of page structured memories. it is intended for the BARDE dataflow processor. Suitably programmed controllers used in parallel can handle arbitrary memory sizes. Segment allocation, release, and access (i.e. translation of a segment relative page addresses into a physical page address) are carried out in at most one add cycle. The allocation method described avoids storage fragmentation and garbage collection by numbering allocated and free pages. A memory controller consists of one page controller for each memory page. The translation from virtual into physical addresses is done by associative search Rmong all page controllers.

A memory controller executing segment operations in time 0(1)

A memory controller unit is presented for segmentation of page structured memories. It is intended for the BARDE dataflow processor. Suitably programmed controllers used in parallel can handle arbitrary memory sizes. Segment allocation, release, and access (i.e. translation of a segment relative page addresses into a physical page address) are carried out in at most one add cycle. The allocation method described avoids storage fragmentation and garbage collection by numbering allocated and free pages. A memory controller consists of one page controller for each memory page. The translation from virtual into physical addresses is done by associative search amoag all page controllers.

Mixing bowl traction strips

Updated Journal policy for free illustrations in color Color illustration (not to exceed 16 in number) will be reproduced free of charge for all manuscripts received in the JOURNAL office after January 1, 1986. Cost to the author for each additional page (above two free pages) will be $500. Two sets of unmounted glossy color prints at least 3 x 4 inches in size must be submitted (4 inches wide by 3 inches deep is the preferred form). Illustrations should be consistent in size and have a suitable color balance (consistency in lighting and film speed). The Editor and his reviewers have final authority to determine whether color illustrations afford the most effective presentation. For further details, see the Editorial Communications page.