Frame Rate Requirements Research Articles

Software-controlled processor speed setting for low-power streaming multimedia

In this paper, we describe a software-controlled approach for adaptively minimizing energy in embedded systems for real-time multimedia processing. Energy is optimized by clock speed setting: the software controller dynamically adjusts processor clock speed to the frame rate (FR) requirements of the incoming multimedia stream. The speed-setting policy is based on a system model that correlates clock speed with best case, average case, and worst case sustainable FRs, accounting for data dependency in multimedia streams. The technique has been implemented in a energy-efficient MPEG3 real-time decoder algorithm designed for wearable devices as a case study. The target system is the Hewlett-Packard SmartBadgeIII prototype system based on the StrongARM1100 processor. Hardware measurements show that computational energy can be drastically reduced (up to 40%) with respect to fixed-frequency operation.

Integrating Occlusion Culling and Levels of Detail through Hardly‐Visible Sets

Occlusion culling and level‐of‐detail rendering have become two powerful tools for accelerating the handling of very large models in real‐time visualization applications. We present a framework that combines both techniques to improve rendering times. Classical occlusion culling algorithms compute potentially visible sets (PVS), which are supersets of the sets of visible polygons. The novelty of our approach is to estimate the degree of visibility of each object of the PVS using synthesized coarse occluders. This allows to arrange the objects of each PVS into several Hardly‐Visible Sets (HVS) with similar occlusion degree. According to image accuracy and frame rate requirements, HVS provide a way to avoid sending to the graphics pipeline those objects whose pixel contribution is low due to partial occlusion. The image error can be bounded by the user at navigation time. On the other hand, as HVS offer a tighter estimation of the pixel contribution for each scene object, it can be used for a more convenient selection of the level‐of‐detail at which objects are rendered. In this paper, we describe the new framework technique, provide details of its implementation using a visibility octree as the chosen occlusion culling data structure and show some experimental results on the image quality.

Interactive-Rate Animation Generation by Parallel Progressive Ray-Tracing on Distributed-Memory Machines

We describe a dynamic load-balancing algorithm for ray-tracing by progressive refinement on a distributed-memory parallel computer. Parallelization of progressive ray-tracing for single images is difficult because of the inherent sequential nature of the sample location generation process, which is optimized (and different) for any given image. Parallelization of progressive ray-tracing when generating image sequences at a fixed interactive rate is even more difficult, because of the time and synchronization constraints imposed on the system. The fixed frame rate requirement complicates matters and even renders meaningless traditional measures of parallel system performance (e.g., speedup). We show how to overcome these problems, which, to the best of our knowledge, have not been treated before. Exploiting the temporal coherence between frames enables us to both accelerate rendering and improve the load-balance throughout the sequence. Our dynamic load-balance algorithm combines local and global methods to account not only for rendering performance, but also for communication overhead and synchronization issues. The algorithm is shown to be robust to the harsh environment imposed by a time-critical application, such as the one we consider.

A Large Area, High-Resolution a-Si:H Array for X-Ray Imaging

ABSTRACTThe development of a large area, high-resolution, a-Si:H x-ray imager is reported. The array has 1536×1920 pixels, a pixel pitch of 127μm, and an area of 19.5×24.4 cm2. Tne array is tailored to the high frame rate and high spatial resolution requirements of diagnostic x-ray imaging. The design of this array is presented and examples of x-ray images are illustrated. Initial Measurements of the sensor capacitance and pixel time constant properties are in good agreement with theoretical expectations. These results indicate that high-resolution arrays of this construction are capable of providing fluoroscopic images at rates of at least 30 frames per second.

Speech synthesis system with parameter look up table

This system includes an LPC parameter speech synthesizer which basically needs ten binary bits for each LPC coefficient. However, external sources are allowed reduced storage and frame rate requirements by encoding the set of LPC coefficients in a data frame with bit-allocation, repeat-bit, and variable-length features. A three-memory system provides transformation: a speech word selected by controller 11 is transformed by a ROM (30) into an address to a ROM (12 or 13) which outputs corresponding speech data in reduced encoded format to a ROM (202) which converts the coded frame of coefficients to uncoded ten-bit coefficients as needed by the speech synthesizer.