Fractional Order Differentiator Research Articles

Optimal designs of analogue and digital fractional order filters for signal processing applications

Our initial research work was focussed on employing metaheuristic optimization techniques to design optimal digital signal processing (DSP) systems such as the full band, conventional infinite impulse response differentiators and integrators meeting the accurate magnitude responses with a smaller average group delay. Since, integer order systems are a tight subset of the fractional order (FO) systems the research has been extended towards the optimal design of FO differentiators and integrators in the discrete domain with improved frequency response performances. Specific emphasis was laid on the feasibility of the designed FO differentiators in controlling a double-integrator plant. Analogue Butterworth filter with fractional stepping in the transition band has also been realized using an optimal integer-order rational transfer function. In future, we intend to design and implement generalized fractional-order filters on FPGA/DSP kit and FPAAs.

An Efficient and Robust Digital Fractional Order Differentiator Based ECG Pre-Processor Design for QRS Detection.

This paper presents an efficient infinite impulse response type digital fractional order differentiator (DFOD) based electrocardiogram (ECG) pre-processor to detect QRS complexes. First, an efficient optimizer namely, Antlion optimization algorithm is employed to solve the proposed DFOD design problem. Then, the designed DFOD is deployed in the pre-processing stage of a threshold independent R-peak detection technique. Finally, the proposed QRS complex detector is thoroughly assessed on the standard ECG datasets of MIT/BIH Arrhythmia, MIT/BIH ST Change, MIT/BIH Supraventricular Arrhythmia, European ST-T, QT, and T-Wave Alternans Challenge databases to show the wide sense practicability of the proposed DFOD-based QRS detector. The root-means-square magnitude error (RMSME) and the average group delay (τDD) metrics of the proposed DFOD are as low as -38.17 dB and 0.04 samples, respectively. The percentage of improvement in terms of RMSME metric compared to the best-reported approach is 15%. The overall sensitivity of 99.89% and positive predictivity of 99.88% are incurred by considering all the six databases. To the best of the authors' knowledge, it is the first time when the evolutionary algorithm based IIR-type DFOD is employed for the QRS complex detection and establishing its performance superiority. The results so obtained are compared with the results of all the recently reported QRS detectors. The proposed DFOD based ECG pre-processor has a great potential to robustly generate the feature signal related to the ECG QRS complex irrespective of the ECG morphology. Thus, the proposed DFOD based QRS detector can be employed in clinical ECG monitoring devices to augment the QRS detection performance.

An efficient design of finite impulse response — Fractional-order differentiator using shuffled frog leaping algorithm heuristic

A fractional-order digital differentiator is employed for the calculation of a time-derivative of the applied signal. In the recent few decades, this particular concept of a fractional derivative has been gaining a lot of attention in various applications concerning engineering, technology and science that includes image processing along with automatic control. Once there has been an effective use for this continuous-time Fractional-Order Differentiator (FOD), the trend in its research is primarily toward using a discrete-time fractional differentiator. All these conventional techniques tend to make use of a unimodal function for approximating an ideal FOD. For these techniques, there is a minimization of the fitness function that is accomplished by the algorithms which are based on the gradient. The fractional-order circuits along with their systems include an emerging area that has a high level of potential in aspects such as the biomedical instrumentation, control or signal processing. A digital differentiator is a tool that is extremely helpful in the determination and estimation of time derivatives of any given signal. Irrespective of the actual type of filter chosen (the Finite Impulse Response (FIR) or the Infinite-Length Impulse Response (IIR)), it is critical to bring down the complexity of computation needed for the implementation of the filter for a certain bandwidth and error of approximation. A metaheuristic algorithm normally has some advantages in the solving of problems which are Non-Deterministic Polynomial (NP)-hard. The Shuffled Frog Leaping Algorithm (SFLA) has been a new heuristic algorithm proposed in this work for the determination of optimal coefficients of the problem of FIR-FOD. A design for fractional-order-based digital differentiator is not a very important topic in research and signal processing.

Direct Discretization Method for Realizing a Class of Fractional Order System in Delta Domain – a Unified Approach

Discretization is fundamental for digital realization of the fractional order system. The fractional order systems are digitally implemented by using either indirect or direct discretization methods. All these methods are typically developed in the conventional z domain in the form of s to z transforms. In this paper, a new direct discretization method is presented as a substitute of conventional z domain direct discretization method. The proposed approach capitalizes the feature of delta operator to unify both the discretized system and its continuous-time counterpart at the lower sampling time limit. The discretization is accomplished in two stages. At first, the delta operator is reframed by using the trapezoidal quadrature rule to obtain the suitable generating function. Then, the generating function is further expanded using the continued fraction expansion method to obtain the discrete-time approximation of the fractional order differentiator. Illustrative examples are presented to exhibit the efficacy of the proposed method with respect to two prevalent direct discretization methods of z domain on the basis of simulation results obtained using MATLAB.

An efficient design of fractional order differentiator using hybrid Shuffled frog leaping algorithm for handling noisy electrocardiograms

ABSTRACT The Fractional Order Differentiator (FOD) along with the various integrator topologies have been introduced here in this work. There are several benefits offered which are the resistor-less realizations, the electronic adjustments of their respective traits, and capacity to operate the voltage of power supply. All these were achieved by the employment of Sinh- Domain filtering. Important information is provided by the Electrocardiogram (ECG) regarding the condition of the heart and for this work, there is an algorithm which was proposed known as the Shuffled Frog Leaping Algorithm along with the TABU Search (SFLA-TS). This optimization problem has been formulated in a way in which the approach proposed as opposed to the other techniques do not need an operator of the discretization for obtaining their digital models. The response and its frequency along with its design stability and convergence speed of a hybrid SFLA-TS were investigated thoroughly. This FOD was employed to perform the necessary signal conditioning of the ECG in this SFLA-TS algorithm. The models proposed had achieved a high level of improvement over the other designs that were state of the art with regard to their magnitude response performance index.

Asymmetric Wavelength-Selective Directional Couplers as Fractional-Order Optical Differentiators

In this paper, the asymmetric wavelength-selective directional coupler (DC) is designed as a fractional-order optical differentiator. It is shown that the order of the optical differentiator is determined by the coupling coefficient and the propagation constant difference between the two waveguides in the coupler. The relation between the order of differentiator and the structure parameters of DC is analyzed. Optical differentiators with fractional orders of 0.47, 0.78, and 1.1 based on the asymmetric wavelength-selective DC are designed and analyzed, of which the processing errors are 10.04%, 6.11%, and 22.24%, and the energetic efficiencies are 20.61%, 19.62%, and 20.39%, respectively. The proposed design provides a competitive way for the fractional-order optical differentiator.

A unified direct approach for discretizing fractional-order differentiator in delta-domain

Fractional-order differentiator is a principal component of the fractional-order controller. Discretization of fractional-order differentiator is essential to implement the fractional-order controller digitally. Discretization methods generally include indirect approach and direct approach to find the discrete-time approximation of fractional-order differentiator in the [Formula: see text]-domain as evident from the existing literature. In this paper, a direct approach is proposed for discretization of fractional-order differentiator in delta-domain instead of the conventional [Formula: see text]-domain as the delta operator unifies both analog system and digital system together at a high sampling frequency. The discretization of fractional-order differentiator is accomplished in two stages. In the first stage, the generating function is framed by reformulating delta operator using trapezoidal rule or Tustin approximation and in the next stage, the fractional-order differentiator has been approximated by expanding the generating function using continued fraction expansion method. The proposed method has been compared with two well-known direct discretization methods taken from the existing literature. Two examples are presented in this context to show the efficacy of the proposed discretization method using simulation results obtained from MATLAB.

How to take fractional-order derivative experimentally?

In this study we demonstrate a simple and compact implementation of the fractional-order differentiator. At the heart of the proposed approach lies the “universal power law” of the capacitance dispersion of the interface between nanoporous TiN micro-electrode and NaCl 0.9% solution. Using of this phenomenon we take experimentally 0.68- and 0.77-order derivatives of various functions.

Design and application examples of CMOS fractional-order differentiators and integrators

Reduced complexity CMOS fractional-order differentiator and integrator building blocks are introduced in this work, based on 2nd-order integer-order transfer function approximations. These blocks are then used for implementing fractional-order filters as well as a Leaky-Integrate-and-Fire Mihalas-Niebur neuron model. Cascading 1st and 2nd-order blocks to obtain 5th-order integer-order transfer functions, improved bandwidth of approximation accuracy is achieved. Furthermore, the realization of fractional-order capacitor and inductor emulators is demonstrated.

Fractional order integrator/differentiator: FPGA implementation and FOPID controller application

This paper introduces two FPGA based design approaches of the fractional order integrator and differentiator using Grünwald Letnikov (GL) definition where fixed window and linear approximation approaches are considered. The main advantage of the linear approximation method is that it reduces the huge memory of the fractional order systems. One of the top applications of fractional calculus is the fractional order Proportional Integral Derivative (FOPID) controller. It has gained a great attention in academic studies and in industrial applications. The proposed approaches have been used as building blocks to implement FOPID controller. Oscilloscope experimental results for several cases are presented for GL and the fractional order PID controller. The proposed designs have been implemented based on Verilog Hardware Description Language (HDL) and realized on Nexys 4 Artix-7 FPGA XC7A100T. Moreover, a comparison between the proposed FPGA Implementation results for the GL operator and previous work has been investigated.

Single active element implementation of fractional-order differentiators and integrators

A novel topology for implementing fractional-order differentiator and integrator transfer functions is presented in this paper. This topology is based on the employment of a second generation Current Conveyor with EXtra inputs (EX-CCII), passive resistors, and fractional-order capacitors. The main benefit offered by this implementation is that both fractional-order differentiator and integrator transfer functions are simultaneously available at different output terminals, and that their frequency characteristics can be orthogonally adjusted without disturbing each other. With only one EX-CCII device needed, the proposed design is attractive from the active component count point of view. As an application example, a fractional-order controller is designed in order to control the velocity of a small scale submersible equipped with one propeller. Evaluation of the performance of the presented topology is performed using Cadence and the Design Kit provided by the Austria Mikro Systeme (AMS) 0.35μm CMOS process, as well as through experimental results.

Fractional derivative of logarithmic function and its applications as multipurpose ASP circuit

This paper presents a new approach to approximate the fractional order derivative of a logarithmic function using the Caputo definition. Further, this approximated fractional derivative has been used to conceptualize and design a multipurpose ASP (analog signal processing) circuit, by cascading the logarithmic amplifier with fractional order differentiator. The proposed multipurpose ASP circuit is capable to generate different kinds of signals (such as step signals with controlled amplitude, tangent and cotangent signals with controllable fractional power) for different inputs. Moreover, this circuit is also helpful to develop reciprocal, square root, cube root and nth-root of the input signal, up to some extent. Several types of input signals have been taken into consideration and the corresponding output responses are obtained by varying the order of differentiation in fractional sense. Numerical as-well-as circuit simulations have been done in MATLAB and PSpice environments to validate the theoretically obtained results. Further, hardware implantation has also been done to see the practical aspects of the proposed design.

Design of ultracompact tunable fractional-order temporal differentiators based on hybrid-plasmonic phase-shifted Bragg gratings.

The design and the simulation of tunable fractional-order temporal differentiators based on Si-hybrid plasmonic phase-shifted Bragg gratings are proposed in this paper, where strong light confinement in the hybrid plasmonic waveguide is employed to significantly reduce the overall length of the differentiators. According to 2D- and 3D-FDTD simulation results, the proposed structures with overall lengths of less than 8μm can provide arbitrary differentiation order and differentiation bandwidths as high as 1.6THz. The differentiation order and the bandwidth of the proposed structures can be tuned in relatively wide ranges by changing the geometrical parameters of the structures. For example, the differentiation order can be changed from 0.57 to 0.97 by changing the number of the Bragg grating periods in a 3D differentiator structure. Furthermore, it is shown that using an electro-optical polymer as the low-index material of the hybrid plasmonic waveguide, the differentiation order and the central frequency of the proposed differentiators can be actively tuned through applying a proper actuating electrical field (voltage) to the structure. This property, along with the ultracompact footprint and wide bandwidth of the proposed differentiators, suggest their application in ultrafast all-optical signal-processing systems.

Approximation of the Fractional-Order Laplacian <inline-formula> <tex-math notation="LaTeX">$s^\alpha$ </tex-math> </inline-formula> As a Weighted Sum of First-Order High-Pass Filters

A new approximation method of the fractional-order Laplacian operator ${s}^{\alpha }$ is introduced. The approximation is based on a weighted sum of first-order filter sections and its analytical proof is given. The optimal high-pass filter section parameters that cover six frequency decades are obtained using the flower pollination algorithm while the effect of the number of filter sections on the accuracy of the approximation is investigated. Approximations of fractional-order capacitors of orders ${\alpha =0.5}$ and ${\alpha =0.7}$ synthesized in Foster-II form are given as a validating example. Further, an active emulator of a fractional-order differentiator function based on this technique is also proposed and experimentally validated.

Comparative Study of Discrete Component Realizations of Fractional-Order Capacitor and Inductor Active Emulators

Due to the absence of commercially available fractional-order capacitors and inductors, their implementation can be performed using fractional-order differentiators and integrators, respectively, combined with a voltage-to-current conversion stage. The transfer function of fractional-order differentiators and integrators can be approximated through the utilization of appropriate integer-order transfer functions. In order to achieve that, the Continued Fraction Expansion as well as the Oustaloup’s approximations can be utilized. The accuracy, in terms of magnitude and phase response, of transfer functions of differentiators/integrators derived through the employment of the aforementioned approximations, is very important factor for achieving high performance approximation of the fractional-order elements. A comparative study of the accuracy offered by the Continued Fraction Expansion and the Oustaloup’s approximation is performed in this paper. As a next step, the corresponding implementations of the emulators of the fractional-order elements, derived using fundamental active cells such as operational amplifiers, operational transconductance amplifiers, current conveyors, and current feedback operational amplifiers realized in commercially available discrete-component IC form, are compared in terms of the most important performance characteristics. The most suitable of them are further compared using the OrCAD PSpice software.

Minimization of Spread of Time-Constants and Scaling Factors in Fractional-Order Differentiator and Integrator Realizations

The approximations of fractional-order differentiator/integrator transfer functions are currently performed using integer-order rational functions, which are in general implemented through appropriate multi-feedback topologies. The spreading in the values of time-constants and scaling factors, needed to implement these topologies, increases as the order of the differentiator/integrator and/or the order of the approximation increases. This leads to non-practical values of capacitances and resistances/transconductances in the implementation. A solution to overcome this obstacle is introduced in this paper, based on the employment of a combination of fractional-order and integer-order integrators and differentiators for implementing the desired function. The performance of the proposed scheme is verified through post-layout simulations using Cadence and the Design Kit provided by the Austria Mikro Systeme $$0.35~\upmu \mathrm{m}$$ CMOS technology process.

Optimal Design of Fractional-Order Digital Differentiator Using Flower Pollination Algorithm

This paper presents an efficient approach to design wideband, accurate, stable, and minimum-phase fractional-order digital differentiators (FODDs) in terms of the infinite impulse response (IIR) filters using an evolutionary optimization technique called flower pollination algorithm (FPA). The efficiency comparisons of FPA with real-coded genetic algorithm (RGA), particle swarm optimization (PSO), and differential evolution (DE)-based designs are conducted with respect to different magnitude and phase response error metrics, parametric and nonparametric statistical hypotheses tests, computational time, and fitness convergence. Exhaustive simulation results clearly demonstrate that FPA significantly outperforms RGA, PSO, and DE in attaining the best solution quality consistently. Extensive analysis is also conducted in order to determine the role of control parameters of FPA on the performance of the designed FODDs. The proposed FPA-based FODDs outperform all the designs published in the recent literature with respect to the magnitude responses and also achieve a competitive performance in terms of the phase response.

Analog Realization of Electronically Tunable Fractional-Order Differ-Integrators

This paper presents simple structures of fractional-order differentiators and fractional-order integrators. For these structures, both current mode and voltage mode designs have been implemented for differential input signals. The analog realizations of these fractional circuits use a single active element, the Differential Voltage Current Conveyor Transconductance Amplifier (DVCCTA), and a capacitive fractor. The passive elements present in the capacitive fractor are arranged in parallel RC ladder topology with their consecutive values in geometric progression. In the proposed structures, the capacitive fractor and the resistances connected at different ports of DVCCTA are all grounded, hence, making the designs simpler and less sensitive to the parasitic effects. Apart from this, the other key features of these designs are—electronically tunable, high dynamic range, robust and accurate. Simulations of all the four models are performed using TSMC \(0.25\,\upmu \hbox {m}\) technology in MentorGraphics. The non-ideal analysis of DVCCTA device and Monte Carlo analysis have been studied to validate the robustness of these models. The results obtained are in compliance with their corresponding ideal responses. Comparisons with other active element-based structures have been presented to substantiate the work proposed in this paper.

Design and implementation of fractional‐order microwave differentiator

The new design of a fractional-order microwave differentiator is proposed. It is first of its kind and uses short-circuited stub and transmission line sections to emulate the behaviour of an ideal fractional-order differentiator. Least mean square error-based objective function is formulated to obtain the transfer function of the proposed design, using the chain scattering parameters of line elements in the Z-domain. During the optimisation process, impedance values of equal-electrical-length line elements are considered in the range 10-150 Ω, such that they are practically realisable on the microstrip format. The structure is implemented on the FR4 substrate with permittivity of 4.4 having 1.6 mm thickness. The measured result for the magnitude response of the transmission coefficient is found to be in good agreement with ideal one in the operating frequency range from 0.8 to 6.6 GHz.

A novel approach for enhancement of geometric and contrast resolution properties of low contrast images

The present work encompasses a new image enhancement algorithm using newly constructed Chebyshev fractional order differentiator. We have used Chebyshev polynomials to design Chebyshev fractional order differentiator. We have generated the high pass filter corresponding to it. The designed filters are applied for decomposing the input image into four bands and low-low U+0028 L-L U+0029 sub-band is updated using correction coefficients. Reconstructed image with updated L-L sub-band provides the enhanced image. The visual results obtained are encouraging for image enhancement. The applicability of the developed algorithm is illustrated on three different test images. The effects of order of differentiation on the edges of images have also been presented and discussed.