FPGA-based Reconfigurable Hardware Research Articles

Modern-Integrated Triggering System For Nuclear Physics Experiments

This paper concerns the progression of a consistent, reconfigurable gear enacting system that expects to energize setting up and getting of data from nuclear material science investigate. This system replaces a basic enacting structure that included dull plan assignments of Nuclear Instrumentation Module equipment. The new system is a model-facilitated enrolling game plan in light of Scilab, and gives an approach to decipher a visual setup show into code to program a FPGA-based reconfigurable hardware organize. This reconfigurable stage replaces various affiliations and sections of the old system that must be wired-up physically for examinations. A close trial of the old and new structures was done, including examination of safe arranging operation. The new system has different central focuses, particularly: saving time in setting up tests, an office to timeshare exorbitant NIM equipment, and diminishing wear and tear on rigging. In any case, the testing in like manner showed issues with the new system, for instance, longer latencies and jitter diverged from the old structure. Answers for these issues are kept an eye on; however also work is relied upon to upgrade responsiveness and versatility of the new system to make it applicable to a more broad extent of the examinations.

Compilation for FPGA-based reconfigurable hardware

This paper provides techniques for compiling software programs into reconfigurable hardware which offer faster and more efficient performance than the complex resource-sharing approaches typical of high-level synthesis systems. The Java-based compiler presented in this paper uses intermediate graph representations to embody parallelism at various levels.