FPGA-based Controller Research Articles

To Develop a Parallel Processing System with the FPGA for Multi-Axis Motion Control Platform

It is known that the flexibility and programmable abilities have made the FPGA widely used as controllers to the electrical machines and systems. Above all, the high density of recent developed chip results in many of the CPU cores and complicated hardware can be programmed into the chip to be as controller. Thus, this topic is based on the currently available technologies of FPGA-based system design to the parallel processing. Software and hardware co-design are shown to reach the performance, and the system’s software stream data are processed with the hardware parallel technique. This analysis enables FPGA-based control system on the parallel computing platform to achieve the simultaneous operation for 3-axis motor motion and drive system control. In that way, we chose the high density FPGA, Altera Cyclone II EP2C8Q208C8N, as the chip to develop the hardware of microprocessor, motor drive and motion controller. The developed system was practically applied to a 3-axis motion platform driven by stepping motors to evaluate the system performance.

FPGA-based reconfigurable control for switch fault tolerant operation of WECS with DFIG without redundancy

This paper deals with reconfigurable back-to-back converter topology and control orders in Wind Energy Conversion Systems (WECS). A typical WECS with Doubly Fed Induction Generator (DFIG) in balanced conditions is concerned. Based on the classical topology, a fault tolerant converter without any redundancy has been studied. The presented fault tolerant topology allows a “five-leg” structure with converters reconfiguration after switch failure detection. Furthermore, the control strategy for classical topology can no longer be applied after fault occurrence. Thus, a “five-leg” control strategy has also been proposed. The validation of the reconfigurable digital controller for the studied WECS with DFIG topology has been performed using a Hardware-in-the-Loop (HIL) reconfigurable platform including a Field Programmable Gate Array (FPGA) chip. HIL simulation results in both healthy and fault conditions have been presented to show simultaneously the viability of the studied converters topology and the reconfigurable control.

Reducing Intersample Ripple of Actuator in Multirate Environment by A Joint Space Interpolator

Chattering is a very undesired phenomenon in technical systems. There can be many causes for it. In this paper, at first simulation results are shown that insufficient setpoint updating can also lead to chattering in form of intersample ripple. The difference between setpoint updating rate and the control frequency can be traced back to the multi-layered software architecture of an overall system. As a solution, a joint space interpolator is suggested, which is a novel construction mainly combining a trajectory interpolator with a jitter buffer in joint space. On the one hand it provides supplementary setpoints to the controller and on the other hand it ensures very strict real-time performance of the closed-loop system. At last, experiment results are shown to support the proposed method. This scheme is implemented for, but not limited to, actuators utilizing geared brushless DC (BLDC) motors with FPGA-based controllers. The simulations and experiments have focus on robotic motion control in joint space.

Intelligent Motion Control for Four-Wheeled Holonomic Mobile Robots Using FPGA-Based Artificial Immune System Algorithm

This paper presents an intelligent motion controller for four-wheeled holonomic mobile robots with four driving omnidirectional wheels equally spaced at 90 degrees from one another by using field-programmable gate array (FPGA)-based artificial immune system (AIS) algorithm. Both the nature-inspired AIS computational approach and motion controller are implemented in one FPGA chip to address the optimal control problem of real-world mobile robotics application. The proposed FPGA-based AIS method takes the advantages of artificial intelligence and FPGA technology by using system-on-a-programmable chip (SoPC) methodology. Experimental results are conducted to show the effectiveness and merit of the proposed FPGA-based AIS intelligent motion controller for four-wheeled omnidirectional mobile robots. This FPGA-based AIS autotuning intelligent controller outperforms the conventional nonoptimal controllers, the genetic algorithm (GA) controller, and the particle swarm optimization (PSO) controller.

Industrial Laser Cladding Systems: FPGA-Based Adaptive Control

Laser cladding is a deposition process, depicted in Figure 1, which uses a laser beam to melt the surface of a metallic substrate and a substance added in the form of powder flow so that the two materials are fused by metallurgical bonding. Usually, laser cladding consists of a processing head, where the laser beam and powder flow are generated, that moves over the target part. The melted powder particles and a thin layer of the substrate form a clad, whose thickness and penetration depend on the control parameters of the process.

A low-cost, FPGA-based servo controller with lock-in amplifier

We describe the design and implementation of a low-cost, FPGA-based servo controller with an integrated waveform synthesizer and lock-in amplifier. This system has been designed with the specific application of laser frequency locking in mind but should be adaptable to a variety of other purposes as well. The system incorporates an onboard waveform synthesizer, a lock-in amplifier, two channels of proportional-integral (PI) servo control, and a ramp generator on a single FPGA chip. The system is based on an inexpensive, off-the-shelf FPGA evaluation board with a wide variety of available accessories, allowing the system to interface with standard laser controllers and detectors while minimizing the use of custom hardware and electronics. Gains, filter constants, and other relevant parameters are adjustable via onboard knobs and switches. These parameters and other information are displayed to the user via an integrated LCD, allowing full operation of the device without an accompanying computer. We demonstrate the performance of the system in a test setup, in which the frequency of a tunable external-cavity diode laser (ECDL) is locked to a resonant optical transmission peak of a Fabry-Perot cavity. In this setup, we achieve a total servo-loop bandwidth of ∼ 7 kHz and achieve locking of the ECDL to the cavity with a full-width-at-half-maximum (FWHM) linewidth of ∼ 200 kHz.

Fully FPGA-Based Sensorless Control for Synchronous AC Drive Using an Extended Kalman Filter

The aim of this paper is to quantify the interest of using hardware field-programmable gate arrays (FPGAs) to implement complex control algorithms. As a benchmark, authors have chosen a sensorless speed controller for a synchronous motor. The estimation of the rotor position and speed is achieved using an extended Kalman filter (EKF), eliminating the need of their corresponding mechanical sensors. Due to the EKF complexity, such sensorless controller is systematically implemented in a software digital signal processor (DSP) device. The execution time is frequently evaluated to several tens or hundreds of microseconds. The motivation here is to prove that, when exploiting the treatment fastness of FPGAs (less than 6 μs ), it is possible to enhance the control bandwidth. To reach this objective, a comparison between the developed FPGA-based sensorless speed controller and its DSP-based counterpart is made. The same sensorless controller (with the same complexity) has been implemented in both cases. To prop up this comparison, simulation, hardware-in-the-loop, and experimental tests are presented.

A FPGA-Based Long Distance Temperature Measurement System and Control Circuit

Temperature measurement methods always including contact method and non-contact method, generally speaking, non-contact method used for detecting remote measuring objects temperature, in especially as to particular occasions such as factory workshop. This paper provides a system based FPGA(field programmable gate array)for accurate measure and analysis long distance objects temperature. The system could be used in process of industrial produce fabrication.

Simulink Modeling and Design of an Efficient Hardware-Constrained FPGA-Based PMSM Speed Controller

The aim of this paper is to present a holistic approach to modeling and field programmable gate array (FPGA) implementation of a permanent magnet synchronous motor (PMSM) speed controller. The whole system is modeled in the Matlab Simulink environment. The controller is then translated to discrete time and remodeled using System Generator blocks, directly synthesizable into FPGA hardware. The algorithm is further refined and factorized to take into account hardware constraints, so as to fit into a low-cost FPGA, without significantly increasing the execution time. The resulting controller is then integrated together with sensor interfaces and analysis tools and implemented into an FPGA device. Experimental results validate the controller and verify the design.

Optimal hardware/software partitioning of a system on chip FPGA-based sensorless AC drive current controller

The recent field programmable gate array (FPGA) system on chip devices offer a new degree of design freedom. Indeed, these digital components allow the combination of software treatment (by the on-chip processor cores) and hardware treatment (hardware architecture made by the interconnection of the FPGA logic cells). In the field of industrial control applications, this digital technology is appropriate to reach an optimum between the control performances, the controller algorithm complexity and the design flexibility. On the other hand, a co-design methodology is necessary to make an efficient partitioning of the control algorithm so as to define modules to be software-made and modules to be hardware-made.To this aim, this paper deals with a co-design methodology adapted to SoC FPGA-based controllers for embedded power applications. The case study is a sensorless current controller of a synchronous machine using an extended Kalman filter (EKF). This co-design development is based on two reference implementations: a full software implementation and a full hardware implementation that are also discussed. To find the optimal HW/SW partitioning, a non-dominated sorting genetic algorithm (NSGA-II) is used.

FPGA-based sliding mode direct control of single phase PWM boost rectifier

In this paper, a Field Programmable Gate Array (FPGA) based controller for single phase PWM boost rectifier is presented. The control is made up of an internal current control loop and external DC-link voltage control loop. The internal control loop allows active shaping of the line current and is synthesized via sliding mode theory. The external control loop is based on a PI controller and allows imposing the shape of the DC-link voltage response. Experimental results carried out on a FPGA-based prototyping platform are presented and discussed in order to illustrate the efficiency of the developed FPGA-based controller.

Electrical impedance tomography system based on active electrodes

Electrical impedance tomography (EIT) can image the distribution of ventilated lung tissue, and is thus a promising technology to help monitor patient breathing to help selection of mechanical ventilation parameters. Two key difficulties in EIT instrumentation make such monitoring difficult: (1) EIT data quality depends on good electrode contact and is sensitive to changes in contact quality, and (2) EIT electrodes are difficult and time consuming to place on patients. This paper presents the design and initial tests of an active electrode-based system to address these difficulties. Our active electrode EIT system incorporates an active electrode belt, a central voltage-driven current source, central analog to digital converters and digital to analog converters, a central FPGA-based demodulator and controller. The electrode belt is designed incorporating 32 active electrodes, each of which contains the electronic amplifiers, switches and associated logic. Tests show stable device performance with a convenient ease of use and good imaging ability in volunteer tests.

Multiple tasks in FPGA-based programmable controller

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Design and Implementation of FPGA-Based Digital PID Controller Using Distributed Arithmetic

This paper proposes a modularized method for the design and implementation of digital PID controller using DA algorithm based on Field Programmable Gate Array (FPGA) device. It is higher integration, lower power consumption, higher processing speed and more convenient reconfiguration compared with PID controllers based on software. The PID controller is modeled by using Simulink and DSP Builder to generate a system model. The controller coefficients are tuned conveniently by simulink and then pre-written into Look-up Tables(LUTs) in model of the proposed PID controller. After modeling, the simulation wave of step response for proposed PID controller is obtained easily by simulink. And the model of digital PID based on DA is then compiled by using Signal Compiler tool in DSP Builder provided by ALTERA corporation and synthesized by using QUARTUS II platform, and then the created file is downloaded into ALTERA’s FPGA device to implement the proposed PID controller.

Performance, diagnostics, controls and plans for the gyrotron system on the DIII-D tokamak

The DIII-D ECH complex is being upgraded with three new depressed collector gyrotrons. The performance of the existing system has been very good. As more gyrotrons having higher power are added to the system, diagnostics of gyrotron operation, optimization of the performance and qualification of components for higher power become more important. A new FPGA-based gyrotron control system is being installed, additional capabilities for rapid real time variation of the rf injection angles by the DIII-D Plasma Control System are being tested and infrastructure enhancements are being completed. Longer term plans continue to include ECH as a major component in the DIII-D heating and current drive capabilities.

FPGA-based cooperative control of indoor multiple robots

Cooperative control of a group of mobile robots remains a challenging topic in robotics. In the emerging trend of ubiquitous robotics, real-time control using vision-based surveillance strategies requires embedded systems with limited computational performance and energy saving. In this paper, a control-system-on-chip architecture is developed for coordination of control of an indoor robotic formation by using a field programmable gate array (FPGA) chip. The prototype features capabilities of colour-based motion object tracking, inter-robot distance estimation, trajectory estimation, velocity control, formation initialisation and maintenance. All algorithms are implemented in pure register-transfer and gate-level circuits with localisation from a global monocular camera. Experiment results are included for miniature robots deployed in a line formation. The FPGA’s resource usage and power consumption are analysed to show efficiency of the proposed approach.

FPGA-Based Flash Memory Controller for BZK.SAU.FPGA10.1 Microcomputer Architecture Design as an Educational Tool

FPGA-Based Flash Memory Controller for BZK.SAU.FPGA10.1 Microcomputer Architecture Design as an Educational Tool

Control of NI SbRIO-9631 prototype robot on the basis of hand movement

Abstract The NI SbRIO-9631 prototype robot is mobile electro-mechanic system with onboard FPGA-based reconfigurable digital control and signal processing. Its special hardware structure allows fast interfacing with sound- and image processing interface units for complex applications such as processing from advanced man-machine interfaces. This paper presents a new controlling mode of the NI LabVIEW Robotics Starter Kit by arm movement and gestures.

FPGA-based Wideband Force Control System with Friction-Free and Noise-Free Force Observation

FPGA-based Wideband Force Control System with Friction-Free and Noise-Free Force Observation

How FPGAs Can Help Create Self-Recoverable Antenna Arrays

An approach to utilize Field Programmable Gate Array (FPGA) technology to control antenna arrays is presented based on the scenario of sensing a failure of any array element, analyzing degradation of the radiation pattern due to that failure, and finding a new set of excitations to the array elements in order to recover the radiation pattern as close to the original state as possible, thus creating aself-recoverable antenna array(SRA). The challenges of the SRA concept and embodiment of the recovery algorithm(s) are discussed. The results of the radiation recovery are presented on a few array cases, followed by a discussion on the advantages and possible limitations of the FPGA-based array control.