Four-state Memory Research Articles

Memory effects in photoinduced femtosecond magnetization rotation in ferromagnetic GaMnAs

We report a photoinduced femtosecond change in the magnetization direction in the ferromagnetic semiconductor GaMnAs, which allows for the detection of a four-state magnetic memory on the femtosecond time scale. The temporal profile of the magnetization exhibits a discontinuity that reveals two distinct temporal regimes, marked by the transition from a carrier-mediated nonthermal regime within the first 200 fs to a thermal, lattice-heating picosecond regime.

A four-state memory cell based on magnetoelectric composite

A four-state memory can store four states in each memory cell. We designed a four-state memory cell using Co/PZT magnetoelectric composite and observed a broad magnetoelectric hysteretic output loop on applying magnetic field. Based on magnetoelectric hysteresis, we developed a read method by applying a bias magnetic field on the memory cell. Results gave clearly four-state signals of 15.8, −4.4, 5.5 and −11.3 μV, which demonstrated the feasibility of our design.

Unique properties of magnetotransport in GaMnAs films grown on vicinal and high-indexplanes

Ferromagnetic III–Mn–V semiconductors such as GaMnAs represent systems inwhich electronic and magnetic properties are closely intertwined, which results inentirely new effects in electrical transport. We illustrate this by the unique andsomewhat unexpected magnetotransport phenomena observed in GaMnAs filmsgrown on vicinal substrates (i.e., on surfaces tilted by several degrees relativeto the (100) plane) as well as on substrates with high-index-plane surfaces. Inparticular, it will be shown that such vicinal or high-index-plane GaMnAs layersmanifest a striking asymmetry in the dependence of the planar Hall resistanceRxy on magnetic field, caused by the superposition of the planar Hall effect (PHE) and theanomalous Hall effect (AHE). This asymmetry is a direct manifestation of the effectof magnetocrystalline anisotropy in GaMnAs that confines the magnetizationM toa preferred crystal plane rather than to the plane of the film, resulting in turn in a finite componentof M normal to the sample plane. The ability to investigate PHE and AHE occurring simultaneouslyin the same sample revealed a clear relationship between the two effects, suggesting thatPHE and AHE are fundamentally connected. The asymmetry of the resistanceRxy occurring in the PHE geometry in these GaMnAs layers also allows one to obtain fourdistinct zero-field resistance states that depend on the history of the experiment, makingthis effect of potential interest for building a unique four-state magnetic memory device.Moreover, measurements with the magnetic field normal to the growth plane insuch tilted samples have revealed a new highly complex hysteresis behaviour ofRxy. These results, together with measurements of anisotropic magnetoresistance(AMR) measured on samples grown on high-index planes, point to the intimaterelationship between magnetotransport and magnetocrystalline anisotropy in GaMnAs,providing new insights into this complex interdependence, as well as opening newopportunities for exploiting magnetic anisotropy for use in spintronic devices.

Thin dividing line

Multiferroic thin films are used as barriers in tunnel junctions to produce four-state memory devices

Multiferroic memories

Multiferroics might hold the future for the ultimate memory device. The demonstration of a four-state resistive memory element in a tunnel junction with multiferroic barriers represents a major step in this direction.

Tunnel junctions with multiferroic barriers

Multiferroics are singular materials that can exhibit simultaneously electric and magnetic orders. Some are ferroelectric and ferromagnetic and provide the opportunity to encode information in electric polarization and magnetization to obtain four logic states. However, such materials are rare and schemes allowing a simple electrical readout of these states have not been demonstrated in the same device. Here, we show that films of La(0.1)Bi(0.9)MnO(3) (LBMO) are ferromagnetic and ferroelectric, and retain both ferroic properties down to a thickness of 2 nm. We have integrated such ultrathin multiferroic films as barriers in spin-filter-type tunnel junctions that exploit the magnetic and ferroelectric degrees of freedom of LBMO. Whereas ferromagnetism permits read operations reminiscent of magnetic random access memories (MRAM), the electrical switching evokes a ferroelectric RAM write operation. Significantly, our device does not require the destructive ferroelectric readout, and therefore represents an advance over the original four-state memory concept based on multiferroics.

Effect of magnetic anisotropy on the transverse planar Hall resistance ofGa1−xMnxAsfilms grown on vicinalGaAssubstrates

A striking asymmetry is observed in magnetic field dependence of the Hall resistance ${R}_{xy}$ in ferromagnetic ${\mathrm{Ga}}_{1\ensuremath{-}x}{\mathrm{Mn}}_{x}\mathrm{As}$ epilayers grown on vicinal $\mathrm{GaAs}$ substrates, caused by the superposition of the planar Hall effect (PHE) and the anomalous Hall effect (AHE). The asymmetry is a direct manifestation of the effect of magnetocrystalline anisotropy in ${\mathrm{Ga}}_{1\ensuremath{-}x}{\mathrm{Mn}}_{x}\mathrm{As}$, that confines the magnetization $\mathbf{M}$ to a preferred crystal plane rather than to the plane of the film, resulting in a nonzero component of $\mathbf{M}$ normal to the sample plane in vicinal samples. The simultaneous contributions of AHE and PHE to the same measured quantity provides valuable physical insight into the relationship of the two effects. The asymmetry of the resistance ${R}_{xy}$ occurring in the PHE geometry in vicinal ${\mathrm{Ga}}_{1\ensuremath{-}x}{\mathrm{Mn}}_{x}\mathrm{As}$ layers also allows one to obtain four distinct zero-field resistance states that depend on the history of the experiment, making this effect of potential interest for building a unique four-state memory device.

Multistate per-cell magnetoresistive random-access memory written at Curie point

A multistate per-cell magnetoresistive random-access memory (MRAM) that writes data by a thermally assisted technique and reads data using the angular-dependent magnetoresistance is proposed. A hard magnetic layer or pinned ferromagnetic layer (CoFe-IrMn) is used as the recording layer. The free layer serves as the read layer. Before reading, the free layer's magnetization is set to the initial state. For the N states per-cell MRAM, the magnetization angle of the ith state (i=0 to N-1) between the free layer and recording layer can be set to be acos(1-2*i/(N-1)). For example, in the four-state per-cell MRAM, the magnetization angle can be set to be acos(1), acos(1/3), acos(-1/3), and acos(-1), which represent the four states, respectively. More states can be obtained if the signal-to-noise ratio is sufficient. At near Curie point, a small external field can be used to record the signal. In order to verify the idea, a spin-valve giant-magnetoresistance memory cell was fabricated using e-beam lithography and ultrahigh voltage sputtering. A 25-mA heating current and a small external field are enough to assist the writing process. A four-state per-cell memory is realized by this method.

Hysteresis in resonant tunneling diode based multiple-peak driver device for multivalued SRAM cells: analysis, simulation, and experimental results

This paper describes results of our investigation on the hysteresis phenomenon observed in multiple-peak resonant tunneling devices based on a series combination of resonant tunneling diodes (RTDs). We have modelled this hysteresis by assuming that when one of the diodes in the series combination is switching from its prenegative differential resistance (NDR) region to its post-NDR region or back, the others are acting as a combined load to it. Our analytical model based on a load-line analysis with a piecewise-linear approximation for the RTD I–V curve brings out the salient features of hysteresis as measured on a three-peak device based on discrete RTDs. Also, the model provides a first-order quantitative picture that is particularly useful in the context of difficulties in reliable dc circuit simulation on these devices. We have further shown results of our transient circuit simulation on a four-state memory cell that uses the tree-peak device as its driver and constant current metal semiconductor field effect transistor load device. The simulation results clearly bring out the importance of considering hysteresis in the driver device and its implications on important cell parameters such as logic levels, noise margins, and power dissipation. Finally, we verify the simulation scheme with experimental results from an actual memory cell constructed with discrete RTDs and a constant-current load device.

A multiple-state memory cell based on the resonant tunneling diode

The device consists primarily of several molecular-beam-epitaxy (MBE-) grown GaAs/(AlGa)As resonant tunneling diodes connected in parallel. This device exhibits multiple peaks in the I-V characteristic. When a load resistor is connected, the circuit can be operated in a multiple stable mode. With this concept, implementation of three-state and four-state memory cells are made. In the three-state case the operating points at voltages V/sub 0/=0.27 V, V/sub 1/=0.42 V, and V/sub 2/=0.53 V represent the logic levels 0, 1, and 2. Similarly for the four-state memory cell the logic levels voltages are V/sub 0/=0.35 V, V/sub 1/=0.42 V, V/sub 2/=0.54 V, and V/sub 3/=0.59 V. A suggestion of an integrated device structure using this concept is also presented. >

A four-state EEPROM using floating-gate memory cells

An electrically erasable programmable read-only memory (EEPROM) is used in a novel way as a four-state memory by charging the floating gate to determined values. The memory cell and the complete programming and readout circuit are described. Retention characteristics are investigated and found to confirm a thermionic emission model. Retention time is estimated to be more than 22 years at 125/spl deg/C. Secondary effects like charge trapping in the oxide are successfully suppressed by a controlled writing procedure. Using such a four-state EEPROM instead of a binary cell, a reduction in chip area of 40% can be expected for a 1-kb memory.