Flexible Polyethylene Naphthalate Substrate Research Articles

Substrate Dependence of CdSe/ZnS Quantum-Dot Light-Emitting Diodes: A Comparative Study between Rigid Glass and Flexible Plastic Substrates.

The purpose of this study was to investigate the effect of substrate characteristics on the performance of quantum-dot light-emitting diodes (QLEDs) with the aim of developing high-performance flexible QLEDs. Specifically, we compared QLEDs made with a flexible polyethylene naphthalate (PEN) substrate to those made with a rigid glass substrate, using the same materials and structure except for the substrates. Our findings indicate that the PEN QLED had a 3.3 nm wider full width at half maximum and a 6 nm redshifted spectrum in comparison to the glass QLED. Additionally, the PEN QLED exhibited a 6% higher current efficiency, a flatter current efficiency curve, and a 2.25-V lower turn-on voltage, indicating superior overall characteristics. We attribute the spectral difference to the optical properties of the PEN substrate, such as light transmittance and refractive index. Our study also revealed that the electro-optical properties of the QLEDs were consistent with the electron-only device and transient electroluminescence results, which suggests that the improved charge injection properties of the PEN QLED were responsible. Overall, our study provides valuable insights into the relationship between substrate characteristics and QLED performance, which can be used to develop high-performance QLEDs.

Hysteresis Dynamic Modeling and Analysis of Flexible Nano Silver-Polyvinyl Alcohol Humidity Sensor Based on the Microscopic Process and Langmuir-Fick Theory.

In recent years, advances in materials science and manufacturing technologies have facilitated the development of flexible sensors. However, there are still performance gaps between emerging flexible sensors and traditional silicon-based rigid sensors, especially lacking dynamic modeling and optimization analysis for addressing above challenges. This paper describes a hysteresis dynamic modeling method for flexible humidity sensors. Through inkjet printing and coating methods, the polyvinyl alcohol (PVA) sensitive layer and nano silver interdigital electrode are fabricated on flexible polyethylene naphthalate substrates. The performance characterization results show that the sensitivity and maximum hysteresis within the range of 12–98% relative humidity (RH) are −0.02167 MΩ/% RH and 2.7% RH, respectively. The sensor also has outstanding dynamic response ability and stability in a wide range of humidity variation. The hysteresis mechanism of flexible humidity sensors is theoretically analyzed from microscopic hysteresis processes, Langmuir monomolecular adsorption dynamic modeling, and Fick diffusion dynamic modeling. These hysteresis models provide a path for the hysteresis optimization of flexible PVA humidity sensors. Further exploration of the diffusion rate of water molecules and the proportion of PVA in ink represents promising hysteresis optimization directions of flexible humidity sensors based on PVA-sensitive material.

Gate‐Deterministic Remote Doping Enables Highly Retentive Graphene‐MXene Hybrid Memory Devices on Plastic

AbstractIn this work, a highly retentive and synaptic‐functional transistor memory device architecture based on the gate‐deterministic remote doping of graphene via surface‐oxidized Ti3C2TX MXene nano‐floating‐gates (NFG) is presented. By using solution‐phase size‐sorting followed by controlled surface oxidation process, a regulated distribution of MXene nanoflakes comprising metallic Ti3C2TX as the core surrounded by TiO2‐a high dielectric constant insulator‐as the shell is achieved. The size‐sorted core/shell‐like MXene nanoflakes show a self‐sustainable charge trapping/detrapping behavior, which is highly feasible for realizing non‐embed NFGs for transistor memory devices. Interestingly, unlike the conventional NFG‐embedded architecture, the introduction of core/shell‐like MXene under an electrolyte‐gated graphene field‐effect transistor (GFET) architecture induces a cooperative evolution of the hysteresis loop associated with ionic motion in the electrolyte gates and charge trapping/detrapping in the nanoflakes, resulting in a deterministic remote doping of the graphene layer. The resulting device exhibited a highly retentive memory behavior, which can be optimized by the nanoflake size distribution. In addition, synaptic functions having mechanical flexibility can be successfully emulated using MXene‐based GFETs fabricated on a flexible polyethylene naphthalate substrate.

Localized and structured growth of polymer brushes using ink jet printing approach

Inkjet printing (IJP) technique has been used for the deposition of silica nanoparticles with controlled position and shape onto flexible polyethylene naphthalate (PEN) substrate. The printed silica areas have been chemically functionalized with a silane molecule bearing an ATRP initiator group. Surface-initiated atom transfer radical polymerisation (SI-ATRP) methodology has been betrothed to grow polymer brushes onto the silica printed areas. X-ray photoelectron spectroscopy (XPS) has been used after each step of functionalisation in order to determine the elemental surface composition. In addition, IJP has been used to design specific pattern at 250 micrometer scale. By combining maskless IJP technic and XPS line-scan mode, this work clearly demonstrates that the position and the pattern shape of printed areas can be controlled on demand, and that, structurally polymer brushes are only generated onto the functionalised silica printed areas.

Printed dual-gate organic thin film transistors and PMOS inverters on flexible substrates: role of top gate electrode

We report printed single and dual-gate organic thin film transistors (OTFTs) and p-channel metal-oxide-semiconductor (PMOS) inverters fabricated on 125 µm thick flexible polyethylene naphthalate substrate. All the electrodes (gate, source, and drain) are inkjet-printed, while the parylene dielectric is formed by chemical vapor deposition. A dispenser system is used to print the active channel material using a blend of 2,7-dihexyl-dithieno[2,3-d;2′,3′-d′]benzo [1,2-b;4,5-b′]dithiophene and polystyrene in tetralin solvent, which gives highest mobility of 0.43 cm2 V−1s−1. Dual-gate OTFTs are characterized by keeping the other gate electrode either in grounded or floating state. Floating gate electrode devices shows higher apparent mobility and current ratio due to additional capacitance of the parylene dielectric. PMOS inverter circuits are characterized in terms of gain, trip point and noise margin values calculated from the voltage transfer characteristics (VTC). Applied top gate voltage on the load OTFT control the conductivity or threshold voltage (V Th) of the bottom TFT and shift the trip point towards the middle of the VTC curve, and hence increase the noise margin.

Sinter-free inkjet-printed PEDOT:PSS/WO3/PEDOT:PSS flexible valency change memory

With the rapid proliferation of consumer electronics in our day to day lives, there is an ever increasing demand for flexible electronic devices which are low cost, easy to fabricate and deliver reliable performance. In this work, we report fabrication of symmetric poly(3,4-ethylenedioxythiophene):polystyrene sulfonate (PEDOT:PSS)/WO3/PEDOT:PSS memory cells by inkjet printing on transparent, flexible polyethylene naphthalate (PEN) substrates. The cells show resistive switching behavior with two stable resistance states. The current conduction across the interface between the PEDOT:PSS electrode and dielectric WO3 is determined by localized filamentary features which is space charge limited in the high resistance state, facilitated through the migration of oxygen vacancies at low voltages (<2 V) whereas Schottky emission dominates the current conduction for higher voltages (>2 V). The cells show good retentivity and endurance (>6000 cycles). The cells are entirely sinter free and no electroforming is required to activate them. These characteristics make them suitable for the next generation of flexible non-volatile memory devices.

Scalable Fabrication of Flexible Large-area Inverted Organic Photovoltaic Cells

Scalable large-area inverted organic hotovoltaic (OPV) cells were fabricated on a flexible polyethylene naphthalate (PEN) substrate. To account for the scalability and impact of the substrate (rigid versus flexible), OPVs of various sizes (0.04-1.6 cm²) were fabricated on flexible PEN and rigid glass substrates. A single OPV cell area of up to 1.6 cm² can be fabricated using a solution process at a low temperature of < 160 ℃. It should be noted that all processes except those of the electrodes were conducted based on a solution process under ambient air conditions, not inside a N₂ filled glove box. It was found from the numerical calculations and experimental measurements that a lower photoconversion efficiency (PCE) for higher areas mainly comes from a degradation in the fill factor (FF). Solar cell characteristic parameters were measured under an AM1.5G spectrum (intensity of 100 mW/cm²), and the PCE was 1.8% and 2.0% for the OPV on the PEN and glass substrates, respectively.

(Invited) Compact Model for Short-Channel Organic Thin-Film Transistors with Extension for Non-Quasistatic Circuit Simulation and Variability Analysis

We present a compact model for organic thin-film transistors (TFTs) that covers both below-threshold and above-threshold operation with a single charge-based current expression [1]. The effect of hopping transport is included by a power-law mobility model. Contact resistances for staggered and coplanar device structures (Fig. 1) are considered, which can be nonlinear in the case of work-function mismatch between contacts and organic semiconductor [2]. Short-channel effects in submicron transistors, such as threshold-voltage roll-off and drain-induced barrier lowering (DIBL), are included [3].From the expression for the accumulated channel charge, a closed-form model for the drain-current variability due to carrier-number and correlated mobility fluctuations has been derived, relating these statistical variations to the trap density in the channel [4].Furthermore, by applying a partitioning scheme, charges are explicitly attributed to the source and drain contacts, allowing the derivation of a charge-based capacitance model valid for quasi-static operation [5]. Charges in the gate-to-contact overlap regions have been included.Utilizing this device model in a transmission-line approach, a circuit simulation including non-quasistatic effects is possible [6]. In the circuit-simulation netlist, the TFT is replaced by a macro model consisting of a finite number of n single transistors, whereby each single transistor represents a section of the intrinsic channel capacitance and a segment of the intrinsic channel resistance. This model is able to capture the charging and discharging of the channel capacitance of each segment through the channel resistance of the adjacent transistors. In this way, the frequency dependence of the node-to-node capacitances of the full device is obtained.The compact model has been implemented in the hardware description language Verilog-A and verified using results of measurements performed on organic p-channel TFTs fabricated on flexible polyethylene naphthalate (PEN) substrates by stencil lithography (Figs. 2, 3). The TFTs consist of 25-nm-thick aluminum gate electrodes, a 5.3-nm-thick hybrid AlOx/SAM gate dielectric, 30-nm-thick gold (Au) source and drain contacts coated with a pentafluorobenzenethiol (PFBT) monolayer, and a 25-nm-thick vacuum-deposited layer of the small-molecule organic semiconductor DPh-DNTT [7,8]. The transmission-line approach has been verified with good accuracy by comparison with frequency-dependent admittance measurements and numerical simulations of the transient switching behavior of organic TFTs. For a transient analysis, the optimum number of segments required to achieve good agreement between the results from the model and those from TCAD simulations is approximately n=6.In conclusion, the model presented here is fully capable of providing accurate results in dc, small-signal ac, and transient circuit simulations, including short-channel effects. Furthermore, the same set of equations allows an estimation of the drain-current variability due to charge trapping. Acknowledgements: This project was funded by the German Federal Ministry of Education and Research ("SOMOFLEX", No. 13FH015IX6), German Research Foundation (DFG) under Grant KL 1042/9-2 (SPP FFlexCom), and EU H2020 RISE ("DOMINO", No. 645760). We acknowledge AdMOS GmbH, Germany for support.

Flexible low-voltage organic thin-film transistors and PMOS inverters: the effect of channel width on noise margin

Low-operating-voltage (<2 V) organic thin-film transistors (OTFTs) and P-channel metal-oxide-semiconductor (PMOS) inverter circuits are fabricated on a 125 µm-thick flexible polyethylene naphthalate substrate using a blend of 2,7-dihexyl-dithieno[2,3-d;2′,3′-d′]benzo[1,2-b;4,5-b′]dithiophene and polystyrene as an active p-type organic semiconducting material. All three electrodes (gate, source, and drain) are inkjet-printed, while the active semiconducting material is deposited by a dispenser system to achieve a saturation mobility of 0.32 cm2 V−1 s−1 at V GS = −2 V. Two different PMOS inverters are fabricated, for which the signal gain peak values are resolved for an ultra-low supply voltage, V DD = −0.5 V. We achieve a signal gain of 2.73 at V DD = −0.5 V. The effect of channel width is demonstrated for both OTFTs and PMOS devices. The ‘on’ current increases with channel width, and the switching point of the PMOS inverters shifts toward the middle of the voltage transfer characteristics, and hence improves the noise margin.

Flexible high-performance organic thin film transistors and PMOS inverters: Trap controlled grain boundaries and contact resistance effect in different channel length devices

Printed high-performance organic thin film transistors (OTFTs) are fabricated on flexible polyethylene naphthalate (PEN) substrate for low-voltage operation. Gate, source and drain electrodes are inkjet-printed using conductive silver ink, while chemical vapor deposition grown parylene is used as dielectric layer. We used a blend of 2,7-dihexyl-dithieno[2,3-d;2′,3′-d′]benzo[1,2-b;4,5-b′]dithiophene (DTBDT-C6) and polystyrene (PS), for active p-type organic semiconducting material, and deposited by a dispenser system to achieve 0.66 cm2/Vs mobility at VGS = −6 V. For a set of 30 OTFT devices, the uniformity in device characteristics is illustrated by plotting the histograms for on current, mobility, and threshold voltage (VTh). Mobility decrease for small channel length due to greater contribution of contact resistance, while negative VTh shift occurs because of the generation of hole traps at dielectric-semiconductor interface attributed to moisture present. Electron traps on grain boundaries of the active semiconducting layer causes positive shift in VTh. By using these high mobility OTFT devices, two different low-voltage operation PMOS (P-channel metal-oxide-semiconductor) inverters are fabricated for which high signal gain value of 24.86 is achieved at VDD = −5 V.

Oxidative Chemical Vapor Deposition of Conducting Polymer Films on Nanostructured Surfaces for Piezoresistive Sensor Applications

AbstractIn this study, a novel, fully polymeric setup for piezoresistive sensing is prepared and tested. Monolayers of polystyrene (PS) nanospheres are assembled on flexible polyethylene naphthalate substrates. Subsequently, thin layers (≈50–100 nm) of poly(3,4‐ethylenedioxythiophene) (PEDOT) are deposited conformally around the spheres by oxidative chemical vapor deposition (oCVD). Voltage−current characteristics and direct resistance measurements are performed to test the electrical properties of the samples in their unstrained state and their piezoresistive response during bending. Substrate deposition temperature (Tsub) and film thickness (tPEDOT) are used as parameters to alter properties of the PEDOT thin films; increased Tsub and tPEDOT lead to samples exhibiting lower intrinsic resistance. The electrical conductivity of the samples is estimated to range as high as tens of S cm−1. Dopant exchange of the oCVD‐PEDOT layer (intrinsically, chlorine‐doped) is performed by putting the samples in 0.5 m sulfuric acid, which decreases their resistance by ≈1/3. Regarding the piezoresistive properties of the devices, acid treatment, higher Tsub and tPEDOT (thus, lower intrinsic resistance) yield samples with increased response. As a result, gauge factors as high as 11.4 are achieved. Due to their flexibility and low‐cost, the proposed structures can be readily employed as skin‐inspired or wearable electronic devices.

Stage-by-stage formation of superficial nanostructures in ITO films reduced by H2-GD at low temperature (100 °C) for applications on plastic substrates

The formation of superficial nanostructures (SNs) in reduced indium tin oxide (ITO) thin films by H2-Glow discharge (GD) at a low reduction temperature (Tr = 100 °C) was investigated. Sputtered ITO films deposited at low (Td = 100 °C) and high (Td = 300 °C) temperatures were reduced using this low-temperature process. Scanning electron and atomic force microscopy were applied to study the evolution of the nanostructural features and three stages were identified: emerging/densification, coalescence, and depletion stages. The structural characteristics of the SNs were characterized by grazing incidence and conventional θ/2θ x-ray diffractions showing that at Tr = 100 °C, the reduction process was limited to the surface region in which the ion bombardment had influence. The mean diameter, <D>, of the SNs in ITO deposited on the glass substrate was controlled from ∼10–90 nm and the SN densities, d, were obtained from ∼109–1011 SNs cm−2. Finally, the superficial nanostructures were successfully formed in ITO films deposited on flexible polyethylene naphthalate (PEN) substrates. It was demonstrated that, on these substrates, is possible to obtain a uniform distribution in the size and density of the SNs, with <D> = 9.5–20.7 nm and d = 2.66 × 1011–4.20 × 1010 SNs cm−2.

Flexible inkjet-printed dual-gate organic thin film transistors and PMOS inverters: Noise margin control by top gate

Low operating voltage dual-gate p-type organic thin film transistors (OTFTs) and PMOS inverters have been fabricated on 125 μm-thick flexible polyethylene naphthalate (PEN) substrates by solution-processed techniques. Inkjet-printed silver electrodes are used for gate, source, and drain contacts while the active organic semiconducting material is printed by a dispenser system over parylene dielectric. Bottom channel, top channel, and dual-gate OTFTs separately display average charge carrier mobilities of 0.03, 0.11, and 0.37 cm 2 V −1 s −1 , respectively. Top-gate is used to independently tune the threshold voltage for bottom-gate OTFT and vice versa. Two PMOS inverters are fabricated with high gain and low supply voltage operation. Ideal symmetric voltage transfer characteristics with high noise margin are achieved by controlling the threshold voltage of the driver OTFT by top-gate bias for low supply voltage, V DD = −2.5 V. • Flexible low voltage dual-gate OTFTs are fabricated by inkjet printing technique. • Dual-gate OTFTs are characterized in bottom-, top-, and dual-gate mode. • V Th of bottom channel OTFT is linearly control by top gate and vice versa. • DLL and ZVLL, PMOS inverters are compared in terms of gain and noise margin. • Ideal PMOS inverters are achieved by controlling V Th of bottom OTFT by top gate.

Photoresponse of the AlN-Based SAW Device on Polymeric and Silicon Substrates

This paper shows the optical photoresponse in the IR-Vis-UV range of a AlN-based piezoelectric surface acoustic wave (SAW) delay-line device. The piezoelectric aluminum nitride (AlN) thin film has been sputtered on both silicon rigid substrate and flexible polyethylene naphthalate (PEN) substrate. Both devices have been investigated in their electroacoustic response, by measuring the transfer function S <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">21</sub> and by laser Doppler vibrometer characterization. The silicon based SAW devices, stimulated by the IR-Vis-UV light, are strongly affected in the out-of-band insertion loss due to the photovoltaic effect. A mathematical model has been implemented to correlate the out-of-band loss with the material's electrical admittance change. In contrast PEN based SAW devices, due to the polymeric nature of the substrate, did not show any variation in the out-of-band loss. Moreover, when exposed to UV light, a frequency downshift of the Rayleigh and Lamb resonances modes have been observed in all the devices, due screening of the photoinduced electrons in the AlN piezoelectric layer which induces an acoustic wave velocity reduction. To the best of our knowledge, this is the first photoresponse study exploiting SAW in the range IR-Vis-UV, suggesting a new detection mode of UV light by a flexible AlN based SAW device. Further development of these devices can lead to a new class of light sensors from UV to IR, based on remote SAW devices.

Flexible PMOS Inverter and NOR Gate Using Inkjet-Printed Dual-Gate Organic Thin Film Transistors

We report the fabrication of low voltage dual-gate organic thin film transistors, and their possible applications for PMOS inverters and NOR logic gates, on $125~\mu \text{m}$ -thick flexible polyethylene naphthalate (PEN) substrates using solution-processed techniques. Source, drain, and gate electrodes are made by inkjet-printing, while active semiconductor is printed by a dispenser system over parylene dielectric. Bottom and top channel interfaces have been characterized by taking long drain current transients. Formation of stable top channel interface, with low trap density, is a reason for higher top channel current than bottom channel. Increase in drain current transients, and positive threshold voltage shift is attributed to the accumulation of extra positive charge carriers induced by slow polarization of the dipoles in the parylene dielectric.

Flexible and Self‐Powered Lateral Photodetector Based on Inorganic Perovskite CsPbI3–CsPbBr3 Heterojunction Nanowire Array

AbstractSelf‐powered perovskite photodetectors mainly adopt the vertical heterojunction structure composed of active layer, electron–hole transfer layers, and electrodes, which results in the loss of incident light and interfacial accumulation of defects. To address these issues, a self‐powered lateral photodetector based on CsPbI3–CsPbBr3 heterojunction nanowire arrays is designed on both a rigid glass and a flexible polyethylene naphthalate substrate using an in situ conversion and mask‐assisted electrode fabrication method. Through adding the polyvinyl pyrrolidone and optimizing the concentration of precursors under the pressure‐assisted moulding process, both the crystallinity and stability of perovskite nanowire array are improved. The nanowire array–based lateral device shows a high responsivity of 125 mA W−1 and a fast rise and decay time of 0.7 and 0.8 ms under a self‐powered operation condition. This work provides a new strategy to fabricate perovskite heterojunction nanoarrays towards self‐powered photodetection.

High-performance extended-gate ion-sensitive field-effect transistors with multi-gate structure for transparent, flexible, and wearable biosensors

ABSTRACT In this study, we developed a high-performance extended-gate ion-sensitive field-effect transistor (EG-ISFET) sensor on a flexible polyethylene naphthalate (PEN) substrate. The EG-ISFET sensor comprises a tin dioxide (SnO2) extended gate, which acts as a detector, and an amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) for a transducer. In order to self-amplify the sensitivity of the pH sensors, we designed a uniquely-structured a-IGZO TFT transducer with a high-k engineered top gate insulator consisting of a silicon dioxide/tantalum pentoxide (SiO2/Ta2O5) stack, a floating layer under the channel, and a control gate coplanar with the channel. The SiO2/Ta2O5 stacked top gate insulator and in-plane control gate significantly contribute to capacitive coupling, enabling the amplification of sensitivity to be enlarged compared to conventional dual-gate transducers. For a pH sensing method suitable for EG-ISFET sensors, we propose an in-plane control gate (IG) sensing mode, instead of conventional single-gate (SG) or dual-gate (DG) sensing modes. As a result, a pH sensitivity of 2364 mV/pH was achieved at room temperature – this is significantly superior to the Nernstian limit (59.15 mV/pH at room temperature). In addition, we found that non-ideal behavior was improved in hysteresis and drift measurements. Therefore, the proposed transparent EGISFFET sensor with an IG sensing mode is expected to become a promising platform for flexible and wearable biosensing applications.

Flexible transparent graphene laminates via direct lamination of graphene onto polyethylene naphthalate substrates.

Graphene, with its excellent electrical, mechanical, and optical properties, has emerged as an exceptional material for flexible and transparent nanoelectronics. Such versatility makes it compelling to find new pathways to lay graphene sheets onto smooth, flexible substrates to create large-scale flexible transparent graphene conductors. Here, we report the realization of flexible transparent graphene laminates by direct adhesion of chemical vapor deposition (CVD) graphene on a polyethylene naphthalate (PEN) substrate, which is an emerging standard for flexible electronics. By systematically optimizing the conditions of a hot-press technique, we have identified that applying optimum temperature and pressure can make graphene directly adhere to flexible PEN substrates without any intermediate layer. The resultant flexible graphene films are transparent, have a standard sheet resistance of 1 kΩ with high bending resilience, and high optical transmittance of 85%. Our direct hot-press method is achieved below the glass transition temperature of the PEN substrate. Furthermore, we demonstrate press-assisted embossing for patterned transfer of graphene, and hence it can serve as a reliable new means for creating universal, transparent conducting patterned films for designing flexible nanoelectronic and optoelectronic components.

Towards Wearable and Flexible Sensors and Circuits Integration for Stress Monitoring.

Excessive stress is one of the main causes of mental illness. Long-term exposure of stress could affect one's physiological wellbeing (such as hypertension) and psychological condition (such as depression). Multisensory information such as heart rate variability (HRV) and pH can provide suitable information about mental and physical stress. This paper proposes a novel approach for stress condition monitoring using disposable flexible sensors. By integrating flexible amplifiers with a commercially available flexible polyvinylidene difluoride (PVDF) mechanical deformation sensor and a pH-type chemical sensor, the proposed system can detect arterial pulses from the neck and pH levels from sweat located in the back of the body. The system uses organic thin film transistor (OTFT)-based signal amplification front-end circuits with modifications to accommodate the dynamic signal ranges obtained from the sensors. The OTFTs were manufactured on a low-cost flexible polyethylene naphthalate (PEN) substrate using a coater capable of Roll-to-Roll (R2R) deposition. The proposed system can capture physiological indicators with data interrogated by Near Field Communication (NFC). The device has been successfully tested with healthy subjects, demonstrating its feasibility for real-time stress monitoring.

Semitransparent, Flexible, and Self‐Powered Photodetectors Based on Ferroelectricity‐Assisted Perovskite Nanowire Arrays

AbstractTransparent and flexible photodetectors hold great promise in next‐generation portable and wearable optoelectronic devices. However, most of the previously reported devices need an external energy power source to drive its operation or require complex fabrication processes. Herein, designed is a semitransparent, flexible, and self‐powered photodetector based on the integrated ferroelectric poly(vinylidene‐fluoride‐trifluoroethylene) (P(VDF‐TrFE)) and perovskite nanowire arrays on the flexible polyethylene naphthalate substrate via a facile imprinting method. Through optimizing the treatment conditions, including polarization voltage, polarization time, and the concentration of P(VDF‐TrFE), the resulting device exhibits remarkable detectivity (7.3 × 1012 Jones), fast response time (88/154 µs) at zero bias, as well as outstanding mechanical stability. The excellent performance is attributed to the efficient charge separation and transport originating from the highly oriented 1D transport pathway and the polarization‐induced internal electric field within P(VDF‐TrFE)/perovskite hybrid nanowire arrays.