Flash Memory Storage Research Articles

ASA-FTL: An adaptive separation aware flash translation layer for solid state drives

• An innovative FTL approach (ASA-FTL) for identifying and separating hot/cold data at the page level based on data clustering for SSDs; • A sampling and selective caching technique to control the overhead of clustering-based hot/cold data separation approach; • A Hotness Updating Algorithm that samples and clusters data periodically to update the separation criteria and an overhead analysis of the approach; • An evaluation of the proposed approach using the FlashSim simulator with several real world workloads, showing the performance benefits of our approach compared to a current state of the art FTL; • An evaluation of the effect of the sample size and the adaptivity of the proposed ASA-FTL. The flash-memory based Solid State Drive (SSD) presents a promising storage solution for increasingly critical data-intensive applications due to its low latency (high throughput), high bandwidth, and low power consumption . Within an SSD, its Flash Translation Layer (FTL) is responsible for exposing the SSD’s flash memory storage to the computer system as a simple block device. The FTL design is one of the dominant factors determining an SSD’s lifespan and performance. To reduce the garbage collection overhead and deliver better performance, we propose a new, low-cost, adaptive separation-aware flash translation layer (ASA-FTL) that combines sampling, data clustering and selective caching of recency information to accurately identify and separate hot/cold data while incurring minimal overhead. We use sampling for light-weight identification of separation criteria, and our dedicated selective caching mechanism is designed to save the limited RAM resource in contemporary SSDs. Using simulations of ASA-FTL with both real-world and synthetic workloads, we have shown that our proposed approach reduces the garbage collection overhead by up to 28% and the overall response time by 15% compared to one of the most advanced existing FTLs. We find that the data clustering using a small sample size provides significant performance benefit while only incurring a very small computation and memory cost. In addition, our evaluation shows that ASA-FTL is able to adapt to the changes in the access pattern of workloads, which is a major advantage comparing to existing fixed data separation methods.

Investigating of Dynamic Interval of Journaling for more Lurked Discard Regions for Flash memory Storage

In modern storage system, most file system uses journaling operation to preserve data in-safe and recover fast from power loss. However, journaling operations generate excessive IO requests and degrades IO throughput. In addition to that, it also makes a lot of possible-discard regions that could be invalidated physically through discard command. However, due to it short period of time between journal transactions, there occur a lot of tiny lurked discard regions which give much overheads. In this paper, we identify that there exist many tiny lurked discard regions between successive journaling commit operations, and investigate a dynamic interval controlling scheme of journal transactions commit to reduce tiny lurked discard regions, as well as enlarge IO size of upcoming commit transaction. With the help or dynamic controlling of transaction interval, overall IO bandwidth can be enhanced.

A General Non-Binary LDPC Code Optimization Framework Suitable for Dense Flash Memory and Magnetic Storage

Transmission channels underlying modern dense storage systems, e.g., Flash memory and magnetic recording (MR) systems, significantly differ from canonical channels, like additive white Gaussian noise (AWGN) channels. While existing low-density parity-check (LDPC) codes optimized for symmetric, AWGN-like channels are being actively considered for Flash applications, we demonstrate that, due to channel asymmetry, such approaches are inadequate. We introduce a refined definition of absorbing sets, which we call general absorbing sets of type two (GASTs) , and study the combinatorial properties of GASTs. We then present the weight consistency matrix (WCM) , which succinctly captures key properties in a GAST. Furthermore, we show how to customize the WCM definition such that it suits other special subclasses of GASTs. Based on these new concepts, we then develop a new, general combinatorial code optimization framework, which we call the WCM framework , and demonstrate its effectiveness on the realistic highly-asymmetric normal-Laplace mixture (NLM) Flash channel. Moreover, we show that our framework can be customized to optimize non-binary LDPC (NB-LDPC) codes for other asymmetric channels, channels with memory (incorporated in MR systems), and canonical symmetric channels. For all the channels we have simulated NB-LDPC codes over, the codes optimized using the WCM framework enjoy at least 1 order, and up to nearly 2 orders of magnitude performance gain in the uncorrectable bit error rate (UBER) or the frame error rate (FER) relative to the unoptimized codes. Our simulations also show that codes optimized for symmetric channels are not the best choice for asymmetric channels.

Design and implementation of split/merge operations for efficient multimedia file manipulation

Various kinds of smart devices, including personal video recorders, smart TVs, smart phones, and digital cameras frequently manipulate multimedia files, such as frame trimming or inserting. However, because the standard file system APIs do not provide appropriate operations for multimedia file editing, application developers have to implement editing operations by using the conventional read and write operations. Therefore, editing multimedia files unnecessarily incur a large number of I/O operations, resulting in significant performance drawbacks. This paper proposes the design of two novel file system operations, split() and merge(), to remedy the performance overhead of manipulating multimedia files. Unlike conventional file system operations, these operations are carried out only at the metadata level and are accompanied by no actual data movement, so they take negligible time to finish regardless of file size. In addition to the design proposal, this paper introduces the implementation details of the proposed design for three representative file systems: Ext4, FAT32, and exFAT. The evaluation with a commercial digital camera showed that the movie file trimming took less than 1s for most cases, which is well over 1000% improvement over the conventional approach. In addition, the number of I/O operations, which significantly affects the lifespan of flash memory storage components, was suppressed to less than 1% of that with the conventional approach.

An Endurance-Aware Metadata Allocation Strategy for MLC NAND Flash Memory Storage Systems

This paper presents a reliability-aware metadata allocation strategy called scatter-single-level cell (SLC) for multiple-level cell (MLC) NAND flash memory storage systems. In scatter-SLC, metadata is kept in least significant bit (LSB) pages and corresponding most significant bit (MSB) pages are bypassed. Without partitioning SLC and MLC blocks, scatter-SLC can eliminate the unbalanced lifetime between SLC and MLC blocks while achieving the similar error rate as the method to store metadata in SLC blocks. We implemented scatter-SLC on a real-hardware platform. The experiment results show that scatter-SLC can reduce uncorrectable page errors by 93.54% while incurring less than 1% time overhead on average compared with the previous work.

Bitmap discard operation for the higher utilization of flash memory storage

Bitmap discard operation for the higher utilization of flash memory storage

Retention Trimming for Lifetime Improvement of Flash Memory Storage Systems

NAND flash memory has been widely deployed in embedded systems, personal computers, and data centers. While recent technology scaling and density improvement have reduced its price, they have also significantly shortened its endurance. In this paper, with the understanding of the relationship between data retention time and flash wearing, a retention trimming approach, which trims data retention time based on the data lifetime, is proposed to reduce the wearing of flash memory, and hence improve the endurance of flash memory. Extensive experimental results show that the proposed technique achieves significant endurance improvements.

A Real-Time Flash Translation Layer for NAND Flash Memory Storage Systems

NAND flash memory is widely used in both hard real-time and soft real-time systems because of its unique properties, such as non-volatility, low power consumption, and fast access time. However, due to the variable garbage collection latency, the response time becomes unpredictable when multiple I/O requests are issued from the file system to flash media. In NAND flash memory storage systems, flash translation layer (FTL) is a typical software module to handle the I/O requests and manage NAND flash memory. Most of existing FTL schemes focus on improving average response time but worst-case response time remains an open problem. This paper proposes a real-time flash translation layer (RFTL) scheme to evenly distribute garbage collection time-cost, so as to guarantee a near optimum worst-case response time. This is achieved by using a new hybrid-level address mapping approach, which can provide guaranteed physical space to serve requests in any time period. Moreover, we propose a distributed garbage collection policy that enables RFTL to reclaim the space and serve the requests simultaneously. We conduct a set of experiments on a real hardware platform. Both the proposed scheme and other representative FTL schemes have been implemented in the hardware evaluation board. Experimental results show that our scheme improves worst-case response time by 41.51 percent and average response time by 88.85 percent.

SQLite optimization with phase change memory for mobile applications

Given its pervasive use in smart mobile platforms, there is a compelling need to optimize the performance of sluggish SQLite databases. Popular mobile applications such as messenger, email and social network services rely on SQLite for their data management need. Those mobile applications tend to execute relatively short transactions in the autocommit mode for transactional consistency in databases. This often has adverse effect on the flash memory storage in mobile devices because the small random updates cause high write amplification and high write latency. In order to address this problem, we propose a new optimization strategy, called per-page logging (PPL) , for mobile data management, and have implemented the key functions in SQLite/PPL. The hardware component of SQLite/PPL includes phase change memory (PCM) with a byte-addressable, persistent memory abstraction. By capturing an update in a physiological log record and adding it to the PCM log sector, SQLite/PPL can replace a multitude of successive page writes made to the same logical page with much smaller log writes done to PCM much more efficiently. We have observed that SQLite/PPL would potentially improve the performance of mobile applications by an order of magnitude while supporting transactional atomicity and durability.

Lazy-RTGC

Due to many attractive and unique properties, NAND flash memory has been widely adopted in mission-critical hard real-time systems and some soft real-time systems. However, the nondeterministic garbage collection operation in NAND flash memory makes it difficult to predict the system response time of each data request. This article presents Lazy-RTGC , a real-time lazy garbage collection mechanism for NAND flash memory storage systems. Lazy-RTGC adopts two design optimization techniques: on-demand page-level address mappings, and partial garbage collection. On-demand page-level address mappings can achieve high performance of address translation and can effectively manage the flash space with the minimum RAM cost. On the other hand, partial garbage collection can provide the guaranteed system response time. By adopting these techniques, Lazy-RTGC jointly optimizes both the average and the worst system response time, and provides a lower bound of reclaimed free space. Lazy-RTGC is implemented in FlashSim and compared with representative real-time NAND flash memory management schemes. Experimental results show that our technique can significantly improve both the average and worst system performance with very low extra flash-space requirements.

Improving file system performance and reliability of car digital video recorders

Car digital video recorders (DVRs) store realtime audio/video data at flash memory storage device. Car DVR should handle a large amount of high quality multimedia data with high reliability. However, current file systems are vulnerable to sudden-power-offs and flash memory errors. This paper proposes flash-aware cluster allocation techniques and a flash-aware journaling technique. The flash-aware cluster allocation techniques can reduce the probability of file system corruptions and file fragmentations. The flash-aware journaling technique can ensure the file system consistency without significant overheads. Experiments on a simulator and a real system showed that the proposed techniques can prevent file fragmentations and file system corruptions, and they can improve the write performance and lifetime of SD card significantly.

Optimizing R-tree for flash memory

R-tree has been widely used in spatial data management and data analysis to improve the performance of spatial data retrieval. However, the original R-tree is designed for magnetic disks, and has poor performance on flash memory, due to the special features of flash memory such as asymmetric read/write speeds (fast read, slow write) and the erase-before-write feature. Particularly, the original updating mechanism of R-tree usually has to update a few interior nodes when inserting an indexing item into or deleting an item from a leaf node, yielding many slow writes to flash memory. With the wide use of flash memory in many location-based fields, e.g., to store moving trajectories in intelligent transportation systems, how to optimize R-tree for flash memory has become a critical issue. In this paper, we propose a novel spatial index named Flash-Optimized R-tree that is optimized for flash memory. In particular, we propose to defer the node-splitting operations on R-tree by introducing overflow nodes, which results in an unbalanced tree structure. With this mechanism, we can reduce random writes to flash memory and improve the overall performance of R-tree. In addition, we present a new buffering scheme to efficiently cache the updates to the tree, which can further reduce random writes to flash memory. We conduct extensive experiments on real flash-memory storage devices as well as a flash memory simulation platform to evaluate the performance of our proposal, and the results suggest the efficiency of our proposal with respect to different metrics.

Garbage Collection for Low Performance Variation in NAND Flash Storage Systems

In many NAND flash-memory storage systems, invalidated pages can occupy the storage space until being erased. In order to preserve sustained write performance and effective storage capacity, the flash translation layer (FTL) must recycle these pages through garbage collection (GC) operations. Many previous studies have investigated GC techniques, most of which have focused on the effective selection of victim blocks to reduce the operational overhead. However, methods to reduce the cost overhead of the victim selection process, as well as to improve the responsiveness of storage systems during GC, have not yet been explored. In this paper, therefore, we propose a novel GC mechanism, called link-based GC (LINK-GC), which provides fast victim selection and preemptive operation with small additional space overhead to existing page-mapped FTLs. In our experiments, when compared with a GC scheme based on an on-demand victim search, the proposed mechanism increases the average input-output operations per second (IOPS) by up to 15.8% and decreases the standard deviation of IOPS by up to 6.16 times. Additionally, the LINK-GC shows better performance than the existing preemptive GC techniques in terms of responsiveness to host requests.

Two-Step Injection Method for Collecting Digital Evidence in Digital Forensics

In digital forensic investigations, the investigators take digital evidence from computers, laptops or other electronic goods. There are many complications when a suspect or related person does not want to cooperate or has removed digital evidence. A lot of research has been done with the goal of retrieving data from flash memory or other digital storage media from which the content has been deleted. Unfortunately, such methods cannot guarantee that all data will be recovered. Most data can only be recovered partially and sometimes not perfectly, so that some or all files cannot be opened. This paper proposes the development of a new method for the retrieval of digital evidence called the Two-Step Injection method (TSI). It focuses on the prevention of the loss of digital evidence through the deletion of data by suspects or other parties. The advantage of this method is that the system works in secret and can be combined with other digital evidence applications that already exist, so that the accuracy and completeness of the resulting digital evidence can be improved. An experiment to test the effectiveness of the method was set up. The developed TSI system worked properly and had a 100% success rate.

Multi-Channel Architecture-Based FTL for Reliable and High-Performance SSD

Several excellent researches have been proposed to improve the performance of solid-state drives (SSDs) by exploiting I/O parallelism of multi-channel architecture. However, these researches do not fully explore the internal parallelism and do not take wear leveling into consideration. In this paper, I/O performance is further improved by interleaving requests in channel level and striping sub-requests in plane level. A wear-leveling-aware distributed garbage collector is proposed to improve SSD lifetime and reclamation efficiency. To balance the utilization of user space among all channels, data migration is performed implicitly during channel selection and explicitly during garbage collection. To the best of our knowledge, this is the first paper on the design of distributed garbage collector for multi-channel flash-memory storage system. The experimental results showed that the proposed scheme can achieve good wear leveling and improve the overall performance by 34% for the Windows workload, 56.5% for the Linux workload, 88.4% for the multimedia workload, and 9.3% for the on-line transaction processing (OLTP) workload under the two-die-two-plane architecture, compared with the related work.

Data loss recovery for power failure in flash memory storage systems

Due to the rapid development of flash memory technology, NAND flash has been widely used as a storage device in portable embedded systems, personal computers, and enterprise systems. However, flash memory is prone to performance degradation due to the long latency in flash program operations and flash erasure operations. One common technique for hiding long program latency is to use a temporal buffer to hold write data. Although DRAM is often used to implement the buffer because of its high performance and low bit cost, it is volatile; thus, that the data may be lost on power failure in the storage system. As a solution to this issue, recent operating systems frequently issue flush commands to force storage devices to permanently move data from the buffer into the non-volatile area. However, the excessive use of flush commands may worsen the write performance of the storage systems. In this paper, we propose two data loss recovery techniques that require fewer write operations to flash memory. These techniques remove unnecessary flash writes by storing storage metadata along with user data simultaneously by utilizing the spare area associated with each data page.

A Read-Write Optimization Scheme for Flash Memory Storage Systems

In this paper, we propose a novel and efficient read-write optimization scheme for flash memory storage systems, we have named RWF: Read-Write FTL. In the proposed scheme, we effectively connect Logical Sector Number, Logical Block Number, Logical Page Number, Physical Page Number and Physical Block Number. RWF through uniting log blocks and physical blocks, all blocks can be used for servicing update requests. The invalid blocks could be reclaimed properly and intensively, it can avoid merging log blocks with physical blocks. At last, through the simulation test on RWF and the comparison with other schemes, which demonstrate the RWF can effectively solve data storage problems, and it greatly reduces erase count of flash devices and efficiency improves the performance of flash memory storage systems.

Asymmetric programming: a highly reliable metadata allocation strategy for MLC NAND flash memory-based sensor systems.

While the NAND flash memory is widely used as the storage medium in modern sensor systems, the aggressive shrinking of process geometry and an increase in the number of bits stored in each memory cell will inevitably degrade the reliability of NAND flash memory. In particular, it's critical to enhance metadata reliability, which occupies only a small portion of the storage space, but maintains the critical information of the file system and the address translations of the storage system. Metadata damage will cause the system to crash or a large amount of data to be lost. This paper presents Asymmetric Programming, a highly reliable metadata allocation strategy for MLC NAND flash memory storage systems. Our technique exploits for the first time the property of the multi-page architecture of MLC NAND flash memory to improve the reliability of metadata. The basic idea is to keep metadata in most significant bit (MSB) pages which are more reliable than least significant bit (LSB) pages. Thus, we can achieve relatively low bit error rates for metadata. Based on this idea, we propose two strategies to optimize address mapping and garbage collection. We have implemented Asymmetric Programming on a real hardware platform. The experimental results show that Asymmetric Programming can achieve a reduction in the number of page errors of up to 99.05% with the baseline error correction scheme.

블록화기법을 이용한 대형구조물의 해석방법

Sung-Jin Jung Min-Sup LeeAbstractIn this study, we studied how to perform the structural analysis which need a large-capacity flash memory with the computerprogram when the flash memory storage of a personal computer has no enough room for the analysis of structure. As one of thesolutions of this problem, the blocking method of stiffness matrix, which is a method that stiffness matrix is divided by a few blocks and each block is sequentially used for the calculation of matrix decomposition, is proposed and an algorithm available incomputer program is derived on the method. Finally, A structural analysis program (sNs) based on this study is developed and the correctness and efficiency of the algorithm is founded through some examples which are fundamental in structural analysis.Keywords : Structural analysis, Massive matrix decomposition, Blocking method, Stiffness matrix, Algorithm, Structural analysis program

Towards Adapting NAS Mechanism over Solid State Disks

Flash memory storage such as SSDs (Solid State disks) have been gaining popularity due to its low energy consumption and durability in embedded systems and laptops. With the fast technical improvement, Solid State Disks (SSDs) are becoming an important part of the computer storage hierarchy to significantly improve performance and energy efficiency. However, due to its relatively high price and low capacity, a major system research issue to address is on how to make SSDs play their most effective roles as a high-performance storage system in cost- and performance-effective ways. In this paper, we describe a NAS prototype that eliminates most software overheads and makes Solid State Disks a high-performance storage system in cost- and performance-effective ways. NAS integrates a network adapter into SSDs, so the SSDs remove the random access time, Reduce administrative overhead while delivering scalable, reliable data storage. NAS can also give support block based I/O rather than traditional NAS system which supports only file I/O protocol such as NFS and CIFS. Our scale-out NAS solutions can boost capacity and performance while enabling flexible provisioning, no disruptive operations, easy scalability, and virtualization. As the storage and processing requirements of the file server continued to increase data security and integrity became difficult to