A new and accurate technique that allows the simultaneous determination of the spatial distributions of both interface states (N/sub it/) and oxide charge (Q/sub ox/) will be presented. The gated-diode current measurement in combination with the gate-induced drain leakage (GIDL) current were performed to monitor the generation of both N/sub it/ and Q/sub ox/ in n-MOSFET's. A special detrapping technique and simple calculations have been developed, from which the spatial distributions of both N/sub it/ and Q/sub ox/ under various bias stress conditions, such as the hot-electron stress (I/sub G,max/), I/sub B,max/, and hot-hole stresses, can be determined. The calculation of gated-diode current by incorporating the extracted profiles of N/sub it/ and Q/sub ox/ has been justified from numerical simulation. Results show very good agreement with the experimental results. The extracted interface damages for hot-electron and hot-hole stresses have very important applications for the study of hot-carrier reliability issues, in particular, on the design of flash EPROM, E/sup 2/PROM cells since the above stress conditions, such as the I/sub G,max/ and hot-hole stress, are the major operating conditions for device programming and erasing, respectively.