Finite Impulse Response Filter Research Articles

Certain investigation on hybrid neural network method for classification of ECG signal with the suitable a FIR filter

The Electrocardiogram (ECG) records are crucial for predicting heart diseases and evaluating patient’s health conditions. ECG signals provide essential peak values that reflect reliable health information. Analyzing ECG signals is a fundamental technique for computerized prediction with advancements in Very Large-Scale Integration (VLSI) technology and significantly impacts in biomedical signal processing. VLSI advancements focus on high-speed circuit functionality while minimizing power consumption and area occupancy. In ECG signal denoising, digital filters like Infinite Impulse Response (IIR) and Finite Impulse Response (FIR) are commonly used. The FIR filters are preferred for their higher-order performance and stability over IIR filters, especially in real-time applications. The Modified FIR (MFIR) blocks were reconstructed using the optimized adder-multiplier block for better noise reduction performance. The MIT-BIT database is used as reference where the noises are filtered by the MFIR based on Optimized Kogge Stone Adder (OKSA). Features are extracted and analyzed using Discrete wavelet transform (DWT) and Cross Correlation (CC). At this modern era, Hybrid methods of Machine Learning (HMLM) methods are preferred because of their combined performance which is better than non-fused methods. The accuracy of the Hybrid Neural Network (HNN) model reached 92.3%, surpassing other models such as Generalized Sequential Neural Networks (GSNN), Artificial Neural Networks (ANN), Support Vector Machine with linear kernel (SVM linear), and Support Vector Machine with Radial Basis Function kernel (SVM RBF) by margins of 3.3%, 5.3%, 23.3%, and 24.3%, respectively. While the precision of the HNN is 91.1%, it was slightly lower than GSNN and ANN but higher than both SVM linear and SVM -RBF. The HNN with various features are incorporated to improve the ECG classification. The accuracy of the HNN is switched to 95.99% when the DWT and CC are combined. Also, it improvises other parameters such as precision 93.88%, recall is 0.94, F1 score is 0.88, Kappa is 0.89, kurtosis is 1.54, skewness is 1.52 and error rate 0.076. These parameters are higher than recently developed models whose algorithms and methods accuracy is more than 90%.

Digital Aided Analog Data Acquisition for Telemetry

This paper tackles the limitations in the current data acquisition system through the integration of a equiripple Finite Impulse Response (FIR) filter. The inclusion of this digital filter eliminates the necessity for physical component alterations, thereby increasing the system’s adaptability and versatility in telemetry applications. The FIR filter’s ability to adjust passband, stopband, and sampling frequencies allows for seamless reconfiguration without the need for hardware modifications, representing a substantial enhancement compared to the constraints of the previous system. Additionally, the equiripple design guarantees minimal variations in passband and stopband ripples, thereby optimizing overall filter performance. An important aspect of the proposed solution is the implementation of shift-and-add multiplier architecture for the FIR filter, which contributes to a reduction in hardware complexity and resource requirements, ultimately leading to a more efficient system. The adoption of MATLAB’s robust filter design tools, coupled with subsequent verification through SIMULINK simulations, has played a pivotal role in successfully realizing the proposed design. To sum up, this project has efficiently addressed the identified issues by introducing a reconfigurable FIR filter solution that not only enhances the flexibility, performance, and user friendliness of the data acquisition system in telemetry applications but also showcases the potential for broader applications in various signal processing domain.

Fine-tuning digital FIR filters with gray wolf optimization for peak performance

The design of optimum filters constitutes a fundamental aspect within the realm of signal processing applications. The process entails the calculation of ideal coefficients for a filter in order to get a passband with a flat response and an unlimited level of attenuation in the stopband. The objective of this work is to solve the FIR filter design problem and to compare the optimal solutions obtained from evolutionary algorithms. The design of optimal FIR low pass (LP), high pass (HP), and band stop (BS) filters is achieved by the utilization of nature-inspired optimization approaches, namely gray wolf optimization ,cuckoo search, particle swarm optimization, and genetic algorithm. The filters are evaluated in terms of their stop band attenuation, pass band ripples, and departure from the anticipated response. In addition, this study compares the optimization strategies applied in the context of algorithm execution time which is achievement of global optimal outcomes for the design of digital finite impulse response (FIR) filters. The results indicate that when the Gray wolf algorithm is applied to the development of a finite impulse response (FIR) filter, it produces a higher level of performance than other approaches, as supported by enhanced design precision, decreased execution time, and achievement of an optimal solution.

Design and Implementation of Digital Down Converter for WiFi Network

This paper introduces a field-programmable gate array (FPGA)-based digital down converter (DDC) processing a sampling frequency of about 3.64 GHz to a down-converted frequency of 28.4375 MHz to match the IEEE 802.11ah Wi-Fi HaLow standard. The proposed DDC uses a polyphase mixer(PM) and a resampling filter. The PM adopts parallel coordinate rotation digital computer (CORDIC) processors and lowpass filter arrays to reduce high-speed data rates with minimum resource utilization. Again, the resampling filter employs a cascaded integrator comb (CIC) filter associated with a parallel prefixed adder (PPA) and a multi-channel systolic finite impulse response (FIR) filter implemented with canonical expression, attaining optimum hardware cost. Converting floating-point to fixed-point data types provides significant resource savings. Finally, the improved design is coded in the Xilinx Vivado synthesis tool and successfully tested on the FPGA Kintex-7 device. In contrast to other recent architectures, the proposed design substantially reduces area requirements and power utilization. The Matlab tool verifies the design to achieve an acceptable spurious-free dynamic range (SFDR) of 115 dB.

"Enhanced DA Algorithm for FIR Filter Design and FPGA Implementation"

Abstract: This study looks into the difficulties of using the Distributed Arithmetic (DA) method for Finite Impulse Response (FIR) filters on Field-Programmable Gate Arrays (FPGAs). It focuses on how coefficients are represented, balancing precision using fixed-point arithmetic and quantization. The research explores ways to optimize memory use, aiming to store data more efficiently within FPGA resources and reduce memory needs. To speed up computations, it examines how to make accessing lookup tables faster and suggests improvements in design. The study also considers how to manage FPGA resources effectively, balancing latency, throughput, and resource use. It looks at specific improvements to the DA method for FIR filters to make better use of resources and enhance performance. Overall, this work provides insights and solutions for algorithm design, memory use, lookup table speed, and FPGA architecture to make DA-based FIR filter implementations on FPGAs more efficient.

A New Order Tracking Method for Fault Diagnosis of Gearbox under Non-Stationary Working Conditions Based on In Situ Gravity Acceleration Decomposition

Rotational speed measuring is important in order tracking under non-stational working conditions. However, sometimes, encoders or coded discs are not easy to mount due to the limited measurement environment. In this paper, a new in situ gravity acceleration decomposition method (GAD) is proposed for rotational speed estimation, and it is applied in the order tracking scene for fault diagnosis of a gearbox under non-stationary working conditions. In the proposed method, a MEMS accelerometer is locally embedded on the rotating shaft or disc in the tangential direction. The time-varying gravity acceleration component is sensed by the in situ accelerometer during the rotation of the shaft or disc. The GAD method is established to exploit the gravity acceleration component based on the linear-phase finite impulse response (FIR) filter and complete ensemble empirical mode decomposition with adaptive noise (CEEMDAN) methods. Then, the phase signal of time-varying gravity acceleration is derived for rotational speed estimations. A motor–shaft–disc experimental setup is established to verify the correctness and effectiveness of the proposed method in comparison to a mounted encoder. The results show that both the estimated average and instantaneous rotational speed agree well with the mounted encoder. Furthermore, both the proposed GAD method and the traditional vibration-based tacholess speed estimation methods are applied in the context of order tracking for fault diagnosis of a gearbox. The results demonstrate the superiority of the proposed method in the detection of tooth spalling faults under non-stationary working conditions.

A novel design algorithm for low complexity sparse 2‐D FIR filters

SummaryThe hardware implementation complexity of traditional two‐dimensional (2‐D) finite impulse response (FIR) filters with high order is very high. In this paper, a novel sparse 2‐D FIR filter design algorithm has been proposed by combining the common subexpression elimination technique and sparse filter design algorithms to reduce hardware implementation complexity. First, an initial 2‐D FIR filter with sparse coefficients that meets frequency‐domain specifications is obtained by the sparse filter design algorithm. Then, each filter coefficient is quantized in canonical signed digit, and the sensitivities of all weight‐two subexpressions and isolated non‐zero bits are calculated. Finally, the filter coefficients with low implementation cost are reconstructed via iteratively choosing subexpressions and isolated non‐zero bits in terms of their sensitivities. Simulation results show that the proposed algorithm saves about of adders compared with other low complexity filter design method, which reduces effectively the implementation cost.

Implementation of block-based diagonal and quadrantal symmetry type 2D-FIR filter architectures using DA technique

The efficient architectures of Two-Dimensional (2D) Finite Impulse Response (FIR) filters are proposed for image processing applications. The performance metrics such as power consumption, area, and delay of the architectures can be optimized using VLSI design. The 2D FIR filter architectures can be implemented using parallel or block processing to increase the filter throughput and to prune the number of clock cycles required for image processing. The symmetry in the filter coefficients decreases the number of multipliers, whereas the multiplier block is very complex and a power-consuming block in the filter architecture. In this work, two types of symmetric architectures such as diagonal symmetry and quadrantal symmetry filters are proposed. The remaining multipliers required for the filter architecture are replaced by Distributed Arithmetic (DA) logic. The memory-based DA reduces the LUT size and hence the area, power, and delay are reduced in the filter architecture. Block processing, symmetry, and DA concepts are introduced here to optimize the 2D FIR filter architecture. The proposed architectures are implemented in 45 nm CMOS technology using Cadence Genus Synthesis tools and area, delay, power, Area-Delay Product (ADP), and Power-Delay Product (PDP) results are obtained and compared with state-of-the-art works. The ADP value of the proposed diagonal symmetry architecture is decreased by a maximum of 73.34 %, and a minimum of 20.39 %, and the PDP value is decreased by a maximum of 90.28 %, and a minimum of 21.27 % when compared to the existing works. The ADP and PDP values of the proposed quadrantal symmetry are decreased by a minimum of 23.62 %, and 27.74 % when compared to existing works, respectively.

A two stage pipeline architecture for hardware implementation of multi-level decomposition of 1-D framelet transform

In this paper a two stage pipeline architecture for computation of multilevel decomposition of framelet transform is proposed. To handle the problem of perfect reconstruction, an area efficient symmetric extension router is used that duplicates the appropriate number of data samples of input signal at the boundary followed by reflection about the symmetry axis. In addition, to reduce the period and number of clock cycles required for computing the framelet transform, the inter-stage and intrastage pipeline of the computational units is maximized. The inter-stage pipelining is obtained by distributing the various levels of decomposition among the computational units of two stages, and a synchronization mechanism is adopted to reduce the total number of clock cycles. Similarly, the intrastage pipelining is achieved by using the pipeline registers such that the clock period is limited to the delay of multiplier and accumulator (MAC) circuit of the finite-impulse response (FIR) filter. To validate the feasibility and functionality of the proposed hardware architecture, the design is implemented on Artix7 XC7A100TCSG324-1 field-programmable gate array (FPGA) for the case of framelet transform with one low-pass and two high-pass filters. The proposed architecture is able to operate at a maximum clock frequency of 112 MHz.

Enhanced FPGA linear phase FIR filter with amalgam multiplier

ABSTRACT Designing high-performance integrated circuits that balance area, speed, and power is increasingly challenging. This study optimises hardware implementation of FIR filters using an innovative Amalgam Multiplier, minimising resource use without compromising performance. The key challenge in designing signal processing hardware is the multiplier design, which significantly affects efficiency. This study explores integrated circuit optimisation, addressing the delicate balance between area utilisation, speed, and power consumption. Focusing on hardware implementation of Finite Impulse Response (FIR) filters in signal processing, the article starts with a conventional FIR filter design using a standard array multiplier which consumed 1.790 W, with 8 s real-time completion. Then, Linear Phase FIR (LP-FIR) filter is designed using Braun and Dadda Multiplier. LP-FIR filter with Braun multiplier consumed 1.436 W power and 26 s of completion time whereas LP-FIR with Dadda multiplier consumed 1.363 W power and 23 s of completion time. Finally, the implementation of novel LP-FIR enhanced by Amalgam multiplier consumed 0.302 W power and 10.29 s of completion time, marking a significant advancement in integrated circuit design.

Prediction of mild cognitive impairment using EEG signal and BiLSTM network

Mild cognitive impairment (MCI) is a cognitive disease that primarily affects elderly persons. Patients with MCI have impairments in one or more cognitive areas, such as memory, attention, language, and problem-solving. The risk of Alzheimer’s disease development is 10 times higher among individuals who meet the MCI diagnosis than in those who do not have such a diagnosis. Identifying the primary neurophysiological variations between those who are suffering from cognitive impairment and those who are ageing normally may provide helpful techniques to assess the effectiveness of therapies. Event-related Potentials (ERPs) are utilized to investigate the processing of sensory, cognitive, and motor information in the brain. ERPs enable excellent temporal resolution of underlying brain activity. ERP data is complex due to the temporal variation that occurs in the time domain. It is actually a type of electroencephalography (EEG) signal that is time-locked to a specific event or behavior. To remove artifacts from the data, this work utilizes Independent component analysis, finite impulse response filter, and fast Fourier transformation as preprocessing techniques. The bidirectional long short-term memory network is utilized to retain the spatial relationships between the ERP data while learning changes in temporal information for a long time. This network performed well both in modeling and information extraction from the signals. To validate the model performance, the proposed framework is tested on two benchmark datasets. The proposed framework achieved a state-of-the-art accuracy of 96.03% on the SJTU Emotion EEG Dataset dataset and 97.31% on the Chung–Ang University Hospital EEG dataset for the classification tasks.

A novel feature mode decomposition method and its application for gear fault detection

Fault detection can promptly reveal the potential hazards of mechanical equipment, guaranteeing the safety, stability, and reliability of their operation. Although many advanced fault detection methods, such as spectral kurtosis, deconvolution and decomposition, have been developed, most of them still suffer from insufficient utilization of fault features and incomplete extraction of diagnostic information. Given this, we propose a novel method named feature mode decomposition (FMD). Firstly, to coarsely steer the decomposition direction, a finite impulse response (FIR) filter bank is set up with a window initialization. The, correlated kurtosis (CK) is taken to evaluate the latent fault-related information in mode signals, thereby guides the updating process of all adaptive filters, assisted with period estimation. Ultimately, the unnecessary and intermingled modes are weeded out by mode selection. Experimental cases verified that the proposed FMD can adaptively decompose the fault mode of gear fault signal with excellent inspection ability. Comparison between the results and those of the classical variational mode decomposition (VMD) further highlights that FMD is more robust to other interference and noise.

Design and Implementation of FIR Filters for Biomedical Applications

Abstract: Digital signal processing (DSP) greatly facilitates the continuous capture, monitoring, processing, and analysis of signals in real-world applications, particularly in biomedical or wearable devices. Within DSP systems, the design of Finite Impulse Response (FIR) filters is pivotal. In scenarios demanding intricate calculations and high precision, higher-order filters are employed. Multipliers are crucial components in filter design, consuming significant chip space and introducing extra computation overhead. Designers strive to optimize multipliers to enhance performance. In this project we are going to design pipelined based FIR filter by applying pipelining concept to the FIR filter and following the previous implementations such as the FIR filter with high accuracy compared to existing method. The proposed system architectures are known to be efficient for real signal processing, offering advantages over conventional based designs. The proposed design is anticipated to yield benefits in terms of area, power consumption, and timing performance. The synthesis and simulation of the existing and proposed designs are implemented using Cadence Virtuoso.

Implementation of Digital Filter Using Verilog HDL

Abstract: In the context of Very Large Scale Integration technology, where addition is essential, digital filters are essential elements. The performance of the Finite Impulse Response Filter is highly dependent on the speed of its multiplier unit, making itstand out among the others. In order to improve the effectiveness of the FIR filter, we suggest using a Wallace tree multiplier. This novel method offers improvements over conventional multipliers, with a decrease in latency being one of the main advantages. Significant improvements in latency are obtained by using Xilinx tools and implementing this filter design in Verilog HDL. The Wallace tree multiplier is perfect for FIR filter construction in low-voltage and low-power VLSI applications since it has benefits like higher operating frequency and reduced power consumption. This development might improve the effectiveness and performance of digital filters, especially in settings with limited resources, opening the way for more robust VLSI systems

A new design scheme of two-channel graph filter bank

The existing designs of a two-channel graph filter bank (2c-graph-FB) are polynomial-based and have the numerical calculation problem when designing high performance/order 2c-graph-FB. In this study, a new design scheme is proposed to overcome the numerical calculation problem. The basic idea is adopting the expression form of the traditional symmetric finite impulse response (FIR) filter's frequency response as that of the frequency-domain graph filter of a 2c-graph-FB. Further, for solving the contradiction between the order and the vertex-domain localization in the existing designs as well as the proposed design, the idea of approximate vertex-domain localization is proposed. The designed 2c-graph-FB via our proposed scheme can have strict or approximate vertex-domain localization property. The simulation results reveal that the proposed scheme has no numerical calculation problem. Moreover, compared with the existing designs on the condition of all being able to achieve exceedingly small reconstruction error, the proposed design with the strict localization property has superior frequency selectivity. Among the existing designs (also including the proposed design with strict or approximate localization property) which can achieve exceedingly small reconstruction error, the proposed design scheme with the approximate localization property performs best in terms of the frequency selectivity while having certain localization property.

A PRECISE RESPIRATORY AND HEART RATE DETECTION METHOD FOR MILLIMETER-WAVE RADAR

Millimeter wave radar as a type of noncontact sensor can more conveniently and insensibly obtain breathing and heartbeat signals. However, due to the weak radar echo signal and the influence of noise, there may be phase ambiguity and separation distortion of breathing and heartbeat signals during the processing, which affects the accuracy of detection. In this paper, an enhanced extended differential and cross multiplication (EDACM) algorithm is presented to obtain chest position signals without phase ambiguity. A specific order finite impulse response (FIR) filter with a Blackman window is applied to extract breath signals without waveform distortion from phase signals, and the heartbeat signal without rate distortion is extracted from the phase signal by means of the designed Chebyshev II filter. The measured results show that the proposed method achieves 96.78% accuracy for heart rate detection and 94.44% accuracy for respiratory rate detection, and improves the accuracy of heart rate detection by 2.22% and respiratory rate detection by 4.06% compared to the band-pass filter method under the same parameter conditions.

Time-domain sound field reconstruction using a rigid spherical microphone array.

A time-domain approach for interior spherical near-field acoustic holography is proposed to achieve the low-delay reconstruction of time-domain sound fields using a rigid spherical microphone array. This reconstruction encompasses the incident pressure field, the incident radial particle velocity field, and the total pressure field, which includes scattering. The proposed approach derives time-domain radial propagators through the inverse Fourier transform of their frequency-domain counterparts. These propagators are then applied to the array measurements to obtain the time-domain spherical harmonic coefficients of the interior sound field. Given the fact that the time-domain radial propagators possess finite-time support and exhibit significant high-frequency attenuation characteristics, they can be efficiently implemented using finite impulse response (FIR) filters. The proposed approach processes the signal sample-by-sample through these FIR filters, avoiding a series of issues associated with time-frequency transformations in frequency-domain methods. As a result, the approach offers higher accuracy and lower latency in reconstructing non-stationary sound fields compared to its frequency-domain counterpart and thus holds greater potential for real-time applications. Additionally, owing to the scattering effect of the rigid sphere, the approach avoids the impact of spherical Bessel function nulls and does not require the measurement of particle velocities, which renders the measurements cost effective.

The Design of FIR Filter Based on improved DA Algorithm and its FPGA implementation: REVIEW

The Design of FIR Filter Based on improved DA Algorithm and its FPGA implementation: REVIEW

Adaptive Expectation-Maximization-Based Kalman Filter/Finite Impulse Response Filter for MEMS-INS-Based Posture Capture of Human Upper Limbs.

To obtain precise positional information, in this study, we propose an adaptive expectation-maximization (EM)-based Kalman filter (KF)/finite impulse response (FIR) integrated filter for inertial navigation system (INS)-based posture capture of human upper limbs. Initially, a data fusion model for wrist and elbow position is developed. Subsequently, the Mahalanobis distance is utilized to evaluate the performance of the filter. The integrated filter employs the EM-based KF to enhance noise estimation accuracy when the performance of KF declines. Conversely, upon deterioration in the performance of the EM-based KF, which is evaluated using the Mahalanobis distance, the FIR filter is employed to maintain the effectiveness of the data fusion filter. This research utilizes the proposed EM-based KF/FIR integrated filter to ascertain wrist and elbow positions. The empirical results demonstrate the proficiency of the proposed approach in estimating these positions, thereby overcoming the challenge and highlighting its inherent effectiveness.

On the minimization of multiplier-adders for powers-of-two filter using a novel right to left (R2L) algorithm

The field of digital signal processing has been receiving increasing attention over the years because of its widespread applications in various fields of science, engineering and technology. In connection to this, design of finite impulse response (FIR) filter has drawn enough attention of researchers throughout the globe. A number of promising developments has been carried out over the last few decades which emphasize on the design of hardware efficient filter structure. In this work, one novel Right to Left (R2L) algorithm is proposed which can minimize the number of multiplier-adders for the powers-of-two FIR filter. The requirement of such adders essentially depends upon the number of such non-zero entries and the word-length of the input signal. Comparative study has been performed amongst few such hardware efficient realizations of digital filters. Finally, the proposed approach has been implemented using Xilinx Plan Ahead 14.7 so as to have a clear understanding about the requirement of different hardware blocks on a field programmable device.