Improving the collection efficiency is one of the major challenges in fabricating high performance gated hot carrier tunneling devices that have important applications in electronics and optoelectronics. In this work, a general model for a gated hot carrier tunneling device has been established to figure out the optimized thickness of a tunneling barrier for maximizing the collection efficiency. Simulation indicates that the maximum efficiency increases with the field F, the tunneling barrier height Φ0, and the mean free path λ but decreases with the threshold energy Et. In addition, the optimal thickness of the tunneling barrier decreases as F and Φ0 increase or λ and Et decrease, which varies from ∼6 to ∼9 nm depending on the above-mentioned parameters. To verify the model, electron emission characteristics of a few layers graphene (FLG)/h-BN/FLG heterostructure with different thickness of h-BN have been measured. A similar dependence of the averaged emission efficiency on the h-BN thickness has been obtained, which can be fitted by an extended model for the case of FLG/h-BN/FLG with consideration of a hot hole-induced Auger process. All the results are useful for designing a high performance hot carrier tunneling device.