The ferroelectric field effect transistor (FeFET) is a very promising candidate for low-power and non-volatile memory. However, the co-existing effect of ferroelectric polarization and interface charge trapping in the FeFETs is demonstrated and many efforts have been made to eliminate this charge-trapping effect, which is usually treated as a deleterious effect. In contrast, we have found that the charge-trapping effect can play a dominant role in ferroelectric gates. In this work, we have verified that the charge-trapping effect of the ferroelectric/insulator interface could induce a memory window as the main physical mechanism in the TiN/Hf0.5Zr0.5O2/SiO2/p-Si (MFIS) structure, in which the ferroelectric characteristics of HZO thin films was verified through a reverse-grown MFIS structure. We also demonstrated that 2.5 nm SiO2 is optimal for the charge tunneling effect and the device has the largest memory window. Moreover, in order to enlarge the memory window of MFIS capacitors, we utilized the stress-enhanced ferroelectric polarization characteristics of Hf0.5Zr0.5O2 to improve the charge-trapping effect. Such a finding demonstrates that the ferroelectric-aided charge-trapping devices are potential to be used in non-volatile memories.