This article presents a wideband low-noise amplifier (LNA) with low power consumption and flat gain, implemented in a 180 nm CMOS technology. This LNA uses low voltage operation and current-reuse technology to reduce power consumption, and its cascaded structure is composed of a common-source (CS) stage with gate-source transformer feedback and a cascode stage. The T-coil structure is employed for inter-stage and output matching to expand bandwidth and adjust peak gain, while achieving in-band flat gain through the peak gain distribution technology. Measured results show that the LNA achieves a flat gain of 9.4 ± 0.6 dB over the 7.3–14.2 GHz frequency band, with a 3 dB bandwidth of 6.3–14.6 GHz and an in-band noise figure (NF) of lower than 4.2 dB. The core chip area is 0.29 mm2, and the power consumption is only 6.3 mW.
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