Power Consumption Characteristics Research Articles

Measuring the radiation hardness of terahertz devices for space applications

The application of terahertz technology in space is frontier for the development of 6G technologies. Terahertz transceiver devices based on gallium arsenide Schottky barrier diodes (GaAs SBDs) have the characteristics of small size, light weight and low power consumption, making them suitable for application on spacecraft. However, there is currently a lack of experimental assessments on their space adaptability. Here, we study the radiation hardness of terahertz devices to determine their adaptability in complex space environments. We exposed GaAs SBDs and terahertz multipliers as typical terahertz devices to gamma rays and protons. The experimental results showed that the terahertz devices exhibited good tolerance to protons, but prolonged exposure to gamma rays could significantly increase the leakage current of the GaAs SBDs and alter its C-V characteristics, leading to the failure of the terahertz multiplier. Nevertheless, the terahertz devices maintained a good level of radiation hardness, making them highly suitable for use in Low Earth Orbit (LEO) satellites. The comparison between the results of proton and gamma ray tests indicated that the terahertz devices exhibited high inherent radiation hardness against displacement damage but were more sensitive to ionization damage, requiring higher shielding requirements.

Optimal scheduling strategy of household electrical equipment based on scenario dynamic modeling

Household electricity is highly unpredictable, necessitating a deep understanding of its impact on energy scheduling for optimal resource allocation and economic gains. This issue’s complexity can lead traditional optimization methods to converge on suboptimal solutions. In this study, the dynamic Copula (DC) model is used to construct the dynamic correlation between power consumption characteristics, and the Monte Carlo (MC) method is used to generate multiple power consumption scenarios to cope with the uncertainty of user behavior. Then, the optimal scenario set is selected through the average distribution error (ADE) to participate in the subsequent scheduling. In addition, based on the established equipment operation characteristic model, the electricity cost and load peak-to-average ratio (PAR) are comprehensively considered. The Improved Dynamic search multi-objective particle swarm optimization (IDSMOPSO) is introduced to optimize the running time of the equipment. Taking the electricity consumption of a family in Xi’an as an example, the results show that the algorithm is significantly better than the other two improved algorithms in performance. Meanwhile, the electricity cost of the family was significantly reduced by 17.09 %, and the PAR value was also reduced by 31.59 %, which realized the economic operation of household electricity.

MCLORA: Maritime ad-hoc communication system based on LORA

Maritime communication plays a crucial role in fields such as ocean resource exploration and marine environmental monitoring. Existing maritime communication methods either face challenges in equipment deployment or are limited by high power requirements, making sustained operation difficult. The emergence of LoRa presents an opportunity in this regard, with its characteristics of low power consumption and long communication range, meeting the demands for long-term maritime communication. However, LoRa’s underlying implementation is not open-source, and LoRaWAN itself adopts a star topology, limiting communication between nodes. Therefore, we have devised a communication packet header working at the application layer to enable peer-to-peer communication between nodes. Our on-campus field tests have shown that our system can achieve node-to-node communication, networking functionalities, with a packet delivery rate more than 94%, and max data transmission rate can achieve 1027 bps. In the sea test, the communication rate of our node remained basically around 1035 bps due to the absence of objects blocking the line of sight, and packet delivery rate was more than 96%.The byte error rates of all experiments were less than 0.5%.

Controlling and optimizing the transport (search) efficiency with local information on a class of scale-free trees.

The scale-free trees are fundamental dynamics networks with extensive applications in material and engineering fields owing to their high reliability and low power consumption characteristics. Controlling and optimizing transport (search) efficiency on scale-free trees has attracted much attention. In this paper, we first introduce degree-dependent weighted tree by assigning each edge (x,y) a weight wxy=(dxdy)θ, with dx and dy being the degree of nodes x and y, and θ being a controllable parameter. Then, we design a parameterized biased random walk strategy with the transition probability depending on the local information (the degree of neighboring nodes) and a parameter θ. Finally, we evaluate analytically the global mean first-passage time, which is an important indicator for measuring the transport (search) efficiency on the underlying networks, and find the interval for parameter θ where transport (search) efficiency can be improved on a class of scale-free trees. We also analyze the (transfinite) walk dimension for our biased random walk on the scale-free trees and find one can obtain arbitrary transfinite walk dimension in an interval by properly tuning the biased parameter θ. The results obtained here would shed light on controlling and optimizing transport (search) efficiency on objects with scale-free tree structures.

A stepwise optimization method for topology structure of fluid machinery network

A stepwise optimization method for topology structure of fluid machinery network

A Comprehensive Review of Power Consumption in Digital Logic Circuits at Ultra-Low Subthreshold CMOS Levels

In the anticipated spectrum, a lot of work has gone into managing the trade-offs between power, location, and efficiency in the moderate efficiency, moderate power region. However, research into the extremities of this spectrum remains restricted. In particular, there hasn't been enough research done on the extremes of extraordinarily low power consumption with appropriate efficiency and extraordinary efficiency with energy that is within realistic bounds. In this work, very low subthreshold power levels are used to study the power consumption characteristics of digital logic circuits in static Complementary Metal-Oxide-Semiconductor (CMOS) devices. The study shows that operating transistors below their threshold voltage might result in significant energy savings. This research emphasises the significance of subthreshold design strategies for contemporary electronic circuits that aspire for low-power operation without sacrificing efficiency. The results highlight the potential for significant progress in energy-efficient circuit design and highlight the delicate balance between preserving performance and cutting power usage. As a result, this research adds to our understanding of low-power electronics and provides information that may lead to the development of future technologies that are more efficient and sustainable. Keywords— Power consumption analysis, Digital logic circuits, Ultra-low power, Subthreshold operation, Static CMOS gates

The effect of bending angle on a flexible electrode DBD plasma under sinusoidal excitation

There is a critical demand for sophisticated surface disinfection and sterilization devices accessible to the public by using cold atmospheric pressure air plasmas. A flexible printed circuit design of a dielectric barrier discharge reactor under non-bending and two bending configurations with an angle of 120° and 180° was studied. The characteristics of power consumption, the optical emission spectrum, dynamic process, electrode temperature and ozone concentration are evaluated. The non-bending configuration produces more O3, as compared to the bending configuration at the same applied voltage. The 180° configuration has a maximum concentration of excited species at the expense of higher electrode temperature. Both bending configurations demonstrated the propagation of filaments to bending axis where the continues luminescence is observed due to the high electrical field. The energy efficiency for plasma-generated reactive species reaches to 40% for non-bending configuration and decreases with the increase of bending angle. This research provides a new strategy for perspective into the plasma generated reactive species in biomedical and environmental applications.

Short-term Power Load Forecasting Based on EMD-GWO-BP

Abstract The short-range prediction of electricity demand holds immense importance in the strategic planning and advancement of the energy sector. However, the actual load sequence data reflects multiple complex properties, such as nonlinearity, non-stationarity, and temporal variation. In order to accurately forecast the load, this paper presents a three-level hybrid integrated short-term load prediction method composed of empirical mode decomposition (EMD), Grey Wolf Optimization (GWO) and BP neural network (BP). EMD is used to decompose load data to obtain good power consumption characteristics; GWO is used to obtain the optimal weight and threshold required for BP prediction. The hybrid integration method (EMD-GWO-BP) was evaluated using the 2017 annual data of Chaoyang County, Liaoning Province. The EMD-GWO-BP method was compared with the other two mainstream coupling methods (BP, GWO-BP). The statistical analysis Indicates that the suggested method within this document shows better forecast precision on three standard scales of MAPE, MAD and RMSE, which reflects the advanced nature of this method.

A Study on the Machinability and Environmental Effects of Milling AISI 5140 Steel in Sustainable Cutting Environments

AISI 5140 steel is an alloy frequently used in the manufacturing and automotive industries. This steel alloy is shaped using different manufacturing methods and cooling is required during this process. This research study included the milling of AISI 5140 steel utilizing various cutting settings and cooling/lubrication procedures. For this purpose, two cutting speeds (75–100 m/min), two feed rates (0.075–0.100 mm/rev), and four cooling media (dry, MQL, flood, nanofluid) were used. Then, 5% Mo nanoparticles were added to the nanofluid cutting fluid. Machinability and power consumption analyses were carried out using the input parameters selected in light of the manufacturer’s recommendations and studies in the literature. The effects of sustainable cutting fluids and their parameters on machinability and power consumption were investigated through experiments. This study concluded that the use of nanofluid led to improvements in surface roughness, flank wear, and power consumption characteristics. It was determined that the flood environment is the most effective in reducing the cutting temperature. As a result, it is predicted that nanofluid cutting fluids can be used during machining.

An energy-efficient 32-bit bit-parallel superconducting SFQ specialized processor

As the demand for energy efficiency rises, researchers are increasingly prioritizing the quest for energy-efficient chip design. Superconducting SFQ circuit technology has garnered attention due to its ultra-high speed and low power consumption characteristics. In this paper, we propose a layout method called Maximum Operating Frequency Constraint (MOFC) for SFQ circuit design. Using this method, we demonstrated a 32-bit bit-parallel string-matching processor fabricated based on SIMIT-Nb03P technology, which holds practical value. The MOFC method focuses on achieving high bit-width processor design within constrained area cost in SFQ circuits, contributing to less energy consumption. To the best of our knowledge, this represents the first demonstrated instance of a superconducting SFQ chip achieving successful internal 32-bit data parallel processing. Our chip has been fabricated and tested, revealing not only its capability for 32-bit bit-parallel processing at a high speed of 12 GHz but also its achievement of an energy efficiency ratio of up to 251 GOPS/W.

Demand Management for Manufacturing Loads Considering Temperature Control under Dynamic Electricity Prices

Demand response (DR) can provide extra scheduling flexibility for power systems. Different from industrial and residential loads, the production process of manufacturing loads includes multiple production links, and complex material flow and energy flow are closely coupled, which can be seen as a typical nondeterministic polynomial-time (NP) hard problem. In addition, there is a coupling effect between the temperature-controlled loads (TCLs) and the manufacturing loads, which has often been ignored in previous research, resulting in conservative electricity consumption planning. This paper proposes an optimal demand management for the manufacturing industry. Firstly, the power consumption characteristics of manufacturing loads are analyzed in detail. A state task network (STN) is introduced to decouple the relationship between energy and material flow in each production link. Combining STN and production equipment parameters, a general MILP model is constructed to describe the whole production process of the manufacturing industry. Then, a mathematical model of the TCLs considering a comfortable human degree is established. Fully considering the electricity consumption behavior of equipment and TCLs, the model predictive control (MPC) method is adopted to generate the optimal scheduling plan. Finally, an actual seat production enterprise is used to verify the feasibility and effectiveness of the proposed demand management strategy.

Thermal-aware device design of low-power H2S sensors using Joule-heated Au nanosheet

We demonstrated Joule-heated Au nanosheet H2S sensors for low-power operation. We confirmed that low temperature regions in the Joule-heated Au nanosheet caused lower response and recovery characteristics than uniformly heated Au nanosheets. By using Pt electrodes, which has lower thermal conductivity than Au, heat dissipation to the electrodes could be suppressed, resulting in lower power consumption and faster recovery characteristics. We then discussed the optimal sensor structure by developing an analytical model of electrical and thermal resistances. We introduced semi-elliptical intermediate electrodes between the channel and pad electrodes to efficiently suppress the heat dissipation, demonstrating that the optimal channel length and thermal conductivity of the intermediate electrode κ int exist depending on the channel width. Finally, we proposed the sensor design strategy of considering the κ int dependences of the electrical and thermal resistances. This strategy is useful for all metal nanosheet sensors because it gives an estimation of their optimal structures.

Cation-Modified Poly(vinyl alcohol) Film to Optimize the Bistability of Transparent Electrophoretic Display Based on Charge Adsorption Behavior in Nonpolar Solvent.

Electrophoretic displays (EPDs) utilize the electrophoretic particles in electronic ink (e-ink) to display different color states with bistability. Bistability of EPDs is achieved by placing colloidal particles in a highly viscous solvent to keep the distribution of colloidal particles stable without sustaining the external field, so it only consumes power when updating the image. The feature of low power consumption makes it suitable for applications such as advertising boards, price tags, etc. Apart from these applications, recent research on lateral-driving EPDs extends its applications to smart windows, privacy control, and so on. However, achieving bistability by simply increasing the viscosity of solvent is inefficient in the case of lateral driving operation. Therefore, it is deserving to have intensive study on the mechanism of bistability from other aspects. Herein, we propose a mechanism to investigate the charge adsorption behavior on the electrode to affect the bistability of particles, which is based on the "Stern layer adsorption/desorption" model. Based on the above mechanism, we further fabricated a hexadecyl trimethylammonium bromide (CTAB)/poly(vinyl alcohol) (PVA) composite film on the electrode to improve the bistability of lateral-driving EPD by reducing the diffusion current caused by unabsorbed charges. This developed lateral-driving EPD can significantly improve the bistability, which is enhanced from 40 s to 7 min, an increase by a factor of approximately 10. This work gives a way to consider the bistability of colloidal particles in nonpolar solvent.

Comprehensive Review of RF MEMS Switches in Satellite Communications.

The miniaturization and low power consumption characteristics of RF MEMS (Radio Frequency Microelectromechanical System) switches provide new possibilities for the development of microsatellites and nanosatellites, which will play an increasingly important role in future space missions. This paper provides a comprehensive review of RF MEMS switches in satellite communication, detailing their working mechanisms, performance optimization strategies, and applications in reconfigurable antennas. It explores various driving mechanisms (electrostatic, piezoelectric, electromagnetic, thermoelectric) and contact mechanisms (capacitive, ohmic), highlighting their advantages, challenges, and advancements. The paper emphasizes strategies to enhance switch reliability and RF performance, including minimizing the impact of shocks, reducing driving voltage, improving contacts, and appropriate packaging. Finally, it discusses the enormous potential of RF MEMS switches in future satellite communications, addressing their technical advantages, challenges, and the necessity for further research to optimize design and manufacturing for broader applications and increased efficiency in space missions. The research findings of this review can serve as a reference for further design and improvement of RF MEMS switches, which are expected to play a more important role in future aerospace communication systems.

CMOS Scaling for the 5 nm Node and Beyond: Device, Process and Technology.

After more than five decades, Moore's Law for transistors is approaching the end of the international technology roadmap of semiconductors (ITRS). The fate of complementary metal oxide semiconductor (CMOS) architecture has become increasingly unknown. In this era, 3D transistors in the form of gate-all-around (GAA) transistors are being considered as an excellent solution to scaling down beyond the 5 nm technology node, which solves the difficulties of carrier transport in the channel region which are mainly rooted in short channel effects (SCEs). In parallel to Moore, during the last two decades, transistors with a fully depleted SOI (FDSOI) design have also been processed for low-power electronics. Among all the possible designs, there are also tunneling field-effect transistors (TFETs), which offer very low power consumption and decent electrical characteristics. This review article presents new transistor designs, along with the integration of electronics and photonics, simulation methods, and continuation of CMOS process technology to the 5 nm technology node and beyond. The content highlights the innovative methods, challenges, and difficulties in device processing and design, as well as how to apply suitable metrology techniques as a tool to find out the imperfections and lattice distortions, strain status, and composition in the device structures.

Ultra-high ON/OFF ratio with low set voltage for a Pt-Nb2O5-Pt resistivity switching device

The limited ON/OFF ratio constrains the quantity of available resistance states and the multi-level storage capability, a high ON/OFF ratio (>103) is essential for implementing multi-level storage in a resistive device. Through annealing processes for Nb2O5 films prepared by magnetron sputtering, we successfully achieved an ultra-high ON/OFF ratio of 106 and a four-order higher resistance compared to conventional binary oxide resistive random-access memory. Results confirm that annealing can effectively modulate the content of oxygen vacancies within the resistance-switching layer and the formation path of oxygen vacancies. At the same time, we observed a gradual decrease in the set voltage of the device with increasing annealing temperature, which is beneficial for the low power consumption characteristics. Therefore, appropriate annealing is a novel and effective approach to optimize device performances for better information storage applications, and its core mechanism is to modulate the concentration of Vo for constructing fixed conductive paths.

A novel energy efficient 4-bit vedic multiplier using modified GDI approach at 32 nm technology

Multipliers are essential components within digital signal processing, arithmetic operations, and various computational tasks, making their design and optimization crucial for improving the efficiency and performance of integrated circuits. Among multiplier architectures, Vedic multipliers stand out due to their inherent efficiency and speed, derived from ancient Indian mathematical principles. This study presents a comprehensive analysis and comparison of 4-bit Vedic multiplier designs utilizing Gate Diffusion Input (GDI), Complementary Metal-Oxide-Semiconductor (CMOS), and Transmission Gate (TG) technologies, utilizing different adder architectures such as Ripple Carry Adder (RCA), and Carry Lookahead Adder (CLA), Carry Skip Adder (CSA). The objective is to explore the performance, area, and power consumption characteristics of these multipliers across different technologies and adder implementations. Each multiplier architecture is meticulously designed and optimized to leverage the unique features of the respective technology while adhering to the principles of Vedic mathematics. The designs are evaluated based on parameters such as transistor count, delay, power dissipation, and area. The results demonstrate the effectiveness of GDI technology in terms of in tems of delay, area, power and PDP when compared with other technologies. The 4-bit Vedic multiplier has been designed using 32 nm technology within Tanner EDA software tools.

High performance antimony-rich RexSb3Te for phase-change random access memory applications

Phase-change random access memory (PCRAM) demands for high-performance phase change materials, including operation speed, data retention, resistance drift etc. In this work, a high performance PCRAM device based on antimony-rich RexSb3Te material was put forward and studied. Excellent data retention, fast operation speed, low resistance drift, low power consumption and good cycle characteristics were achieved. The lattice information, bonding properties and surface morphology of the films were characterized by transmission electron microscopy, Raman spectroscopy and atomic force microscopy. Density functional theory calculations show that the Re dopant is more inclined to replace Sb and forms chemical bonds with Te, and the Re-Te bonds are more stable than the previous Sb-Te bonds, which is conducive to the formation of stable precursors to accelerate nucleation. The research shows that the antimony-rich Re0.18Sb3Te material has good overall performance, which provides a strategy for developing high-performance memory.

Power hardware-in-loop emulation of a battery for charging systems and grid applications

Relevance. Batteries are playing an increasingly vital role in power systems due to their utilization in various applications including microgrids, electric vehicles, sustaining geographically isolated communities, and energization of automated devices. Since they are considered as the enabling technology for renewable energy integration, the absence of battery systems from islanded microgrids can result in decreased system reliability and compromised performance due to the intermittency of local sources. Nevertheless, the hazardousness associated with their charging mechanism has led to the urgent continuous development of charging technologies and battery management systems. Aim. To develop a safe testbed to examine the functionality of newly produced battery charging stations and battery managers without employing actual physical batteries to avoid the hazardous manipulation of batteries and increase flexibility during the design and validation stage. This is accomplished by modeling the electrochemical dynamics of the battery system and integrating the device-under-test to a DC converter, which reacts based on these modeled dynamics. Novelty. This work adapts one of the most successful Li-ion battery models available in the literature and utilizes it to interact with power electronic devices that exchange power signals. Unlike other work in this field, the design is based on power hardware-in-loop principles and has minimized power consumption characteristics due to its unique configuration. The constructed computer model can be easily reparametrized to describe the dynamics of various battery capacities. Methods. MATLAB-based simulations of the proposed testbed were conducted for high and low power capacity. A LabView-based program was interfaced with the testbed hardware using a NI-DAQ board to validate the proposed design practically. The testbed hardware components were entirely developed from scratch for experimentation purposes. Results. The proposed testbed successfully imitated the dynamics of the battery, while the practical results concurred the simulated ones.

Ultra-Low Power 9T FinFET Based SRAM Cell for IoT Applications

The rapid proliferation of Internet of Things (IoT) devices has escalated the demand for energy-efficient memory solutions. The development of SRAM (Static Random-Access Memory) has gathered significant attention, particularly for low-power applications and portable devices. This research introduces a novel approach to ensure robust performance and operational integrity, all while adhering to stringent power constraints amidst process and temperature fluctuations. This quest for alternative nano-devices has been ignited by the scaling and channel control challenges intrinsic to CMOS technology. Among the array of alternatives, including FinFETs, TFETs, and CNTFETs, FinFETs have emerged as strong contenders. FinFET SRAMs contribute to the ongoing drive for electronic devices to become more compact and energy-efficient. They offer a distinct advantage as a promising CMOS substitute, attributed to their high performance, stability, with low power consumption characteristics at the nanoscale. The study proposes an ultra-low power 9T FinFET based SRAM cell meticulously designed for IoT applications. Leveraging the unique attributes of FinFET based 9T cell, the proposed SRAM cell is tailored to achieving minimal power consumption while maintaining inherent stability. The study assesses the performance of the proposed SRAM cells for power dissipation, stability, speed, and energy efficiency, and compares them with existing SRAM structures. The results are obtained through the Monte Carlo simulation technique, which evaluates circuit performance under specified conditions. The study achieves remarkable efficiency gains with 9T SRAM cells compared to other configurations. Additionally, the reduced read and write access times facilitate expedited data retrieval and storage operations.