Failure Mechanism Of Solder Joints Research Articles

Thermal Fatigue Failure of Micro-Solder Joints in Electronic Packaging Devices: A Review

In electronic packaging products in the service process, the solder joints experience thermal fatigue due to temperature cycles, which have a significant influence on the performance of electronic products and the reliability of solder joints. In this paper, the thermal fatigue failure mechanism of solder joints in microelectronic packages, the microstructure changes of the thermal fatigue process, the influence factors on the joint fatigue life, and the simulation analysis and forecasting of thermal fatigue life are reviewed. The results show that the solder joints are heterogeneously coarsened, and this leads to fatigue cracks occurring under the elevated high-temperature phase of alternating temperature cycles. However, the thickness of the solder and the hold time in the high-temperature phase do not significantly influence the thermal fatigue. The coarsened region and the IMC layer thicken with the number of cycles, and the cracks initiate and propagate along the interface between the intermetallic compound (IMC) layer and coarsened region, eventually leading to solder joint failure. For lead-containing and lead-free solders, the lead-containing solder shows a faster fatigue crack growth rate and propagates by transgranular mode. Temperature and frequency affect the thermal fatigue life of solder joints to different degrees, and the fatigue lifetime of solder joints can be predicted through a variety of methods and simulated crack trajectories, but also through the use of a unified constitutive model and finite element analysis for prediction.

Crack mechanism correlated with Sn grain orientations on Ni metal surface subjected to 1000 thermal shocks

With the rapid development of 3D packaging, it is of great practical significance to understand the failure mechanism of solder joints in heterogeneous integration devices. In this study, the grain orientation and microstructure evolution of SAC305 solder joints were investigated in thermal shock tests for fan-out wafer level packaging. The heterogenous evolution of microstructure in Sn–3Ag-0.5Cu (SAC305) solder joints was investigated using electron backscattered diffraction (EBSD) and nanoindentation analysis. When the thermal shock reaches 1000 cycles, the local deformation caused the heterolattices in the joint to rotate toward the corners due to the thermal expansion. During deformation, sub-grain formation is accompanied by an increase in dislocations, the accumulation of plastic slip, and the activation of slip systems. The energy stored by this deformation is released in the form of cracks. The work in this paper provides new insights into the early stages of grain orientation, microstructural deformations and the accumulation of stored energy associated with these deformations, providing a scientific basis for the application and failure analysis of large size fan-out welded joints in complex working conditions.

Failure Analysis of Printed Circuit Board Solder Joint under Thermal Shock

Investigating the failure mechanism of solder joints under different temperature conditions is significant to ensure the service life of a printed circuit board (PCB). In this research, the stress and strain distribution of a PCB solder joint was evaluated by high- and low-temperature thermal shock tests. The cross-section of the solder joint after thermal shock testing was measured using a 3D stereoscopic microscope and SEM equipped with EDS. The microstructure of the lead-free solder joint and the phase of the intermetallic compound (IMC) layer were studied by XRD. The working state of the PCB solder joint under thermal shock was simulated and analyzed by the finite element method. The results show that thermal shock has a great effect on the reliability of solder joints. The location of the actual crack is consistent with the maximum stress–strain concentration area of the simulated solder joint. The brittle Cu6Sn5 and Cu3Sn phases at the interface accelerate the failure of solder joints. Limiting the growth of Cu6Sn5 and Cu3Sn phases can improve the reliability of solder joints to a certain extent.

Evaluation of Solder Joint Reliability in 3D Packaging Memory Devices under Thermal Shock

In 3D packaging memory devices, solder joints are critical links between the chip and the printed circuit board (PCB). Under severe working conditions, cracks inevitably occur due to thermal shock. If cracks grow in the solder joint, the chip will be disconnected with the PCB, causing its function failure. In this paper, the reliability of solder joints under thermal shock are evaluated for 3D packaging memory devices by means of the SEM and finite element analysis. As microscopically studied by the SEM, it is found out that the main failure mechanism of solder joints in such test is the thermal fatigue failure of solder joints. Finite element analysis shows that cracks are caused by the accumulation of plastic work and creep strain. The initiation and growth of cracks are mainly influenced by the inelastic strain accumulation. The trends of cracks are influenced by the difference between the coefficient of thermal expansion (CTE) of epoxy resin and that of the chip.

Research on Wiener Degradation Model and Failure Mechanism of Interconnect Solder Joints Under Random Vibration Load

Electronic packaging solder joints are the key parts of mechanical fixation and electrical interconnection between electronic chips and printed circuit boards, which are prone to failure and lead to electronic device failures under the action of vibration environment stress. In regard to the failure characterization and degradation modeling of electronic packaging solder joints under vibration load, this paper adopts environmental stress tests, builds a vibration failure test platform, designs a vibration load excitation spectrum, and obtains solder joint degradation data under vibration stress; it uses the square root amplitude, form factors, and kurtosis factors to characterize the solder joint degradation process, which effectively identify the solder joint degradation node, and improve the data monotonicity of the solder joint degradation process; the Wiener process is used to build a solder joint multi-stage degradation model. Based on the EM algorithm, the hyperparameters of the degradation model have been optimized, and the universal test of the Wiener degradation model with multiple samples is carried out in accordance with the LB index. The analysis shows that the effectiveness of different samples is as high as 87.5%, which verifies the universality of the Wiener degradation model; Based on the crack morphology subject to the solder joint test and the features of the solder joint in the multi-stages, the paper analyzes the crack propagation behavior of the solder joint, and clarifies the failure mechanism of the solder joint.

Energy based modeling for temperature cycling induced tin silver copper solder interconnect fatigue life

Lead free (LF) solders such as tin silver copper (SAC) and its variations have been used in microelectronic products for the past decade due the Restriction of Hazardous Substances regulation. In use, temperature cycling is a major contributor to the wear-out failure mechanisms of solder joints during the life span of electronics. To predict the reliability of electronic solder joints, a fatigue life model is needed. Currently, strain energy density based models are widely used for solder joint fatigue life estimation. This paper reviews existing LF solder fatigue life models and provides strain energy based life model constants for a variety of LF solder materials.

Experimental and numerical investigations of full-field strain measurement and fracture parameter of lead-free solder using DIC technique

In this study, rupture of notched SENT specimens fabricated from a novel lead-free solder alloy is investigated. The lead-free solder alloy, focused on in this study, is particularly used as interconnect material in power modules of electric vehicles. Its commercial denomination is InnoLot and it can be used in harsh environments thanks to its improved reliability. Up to now, studies on their resistance to rupture remain relatively limited. Yet the comprehension of fracture behavior is essential for the correct design of the electronic packages which must be robust against fatigue and vibrations loads. The tests are performed with the help of a micro-tensile testing machine equipped with an optical system for full-field measurements with Digital Image Correlation. The images are taken at successive steps of deformation and the displacement field is measured in a region of interest which is the singularity dominated zone surrounding the plastic zone at the crack tip. The procedure consists then in comparing the measured field with the theoretical field given by the Williams' solution. The stress intensity factor is calculated by fitting the analytical fields to the experimental data. The effects of the size and shape of the zone of data collection, as well as that of the number of terms considered in the Williams's expansion series, are examined in the study. A method is also proposed for the automatic crack tip detection. From these finding, it is easy to predict the crack propagation and failure mechanism of solder joint. In addition, the theoretical solution of displacement, given by the Williams series, is compared with measurements to identify the coefficients of these series, including the stress intensity factor. Finally, a 5-order truncation of the Williams series seems sufficient to obtain a correct estimate of the stress intensity factor.

Effect of Surface Finish on the Shear Properties of SnAgCu-Based Solder Alloys

The reliability of an electronic assembly is typically limited by the failure of one of the solder interconnections. One of the key factors that define the quality of solder interconnections is the strength of the solder joint attachment to the printed circuit board (PCB). The ball shear testing is commonly used as a quantitative approach to evaluate the integrity of the solder. Several factors control the shear strength and failure mechanism of solder joints, including the surface finish, solder alloy composition, and speed of shearing (shear strain rate). In this paper, the effect of surface finish on the shear properties of various “microalloyed” SnAgCu-based solder materials was investigated. Individual solder joints were fabricated on a PCB with a solder mask defined configuration. A series of shear testing was conducted at four different strain rates of 0.001, 0.01, 0.1, and 1 s−1. Shear stress–strain curves were recorded for each test, and both shear strength and shear energy were measured. Following the shear testing, fractured top surfaces and cross sections were inspected using SEM/EDS microscopy to characterize the failure mechanism. The results showed that both shear strength and shear energy increase with increasing shear strain rate due to the viscoplasticity of the solder materials. Failure mode analysis indicated the existence of three failure mechanisms, including ductile failure, brittle failure, and mixed failure. Higher occurrence of brittle failure was observed when the shear strain rate is high regardless of surface finish. It was also found that the combination of solder alloy with high silver (Ag) and bismuth (Bi) content and electroless Ni/immersion Au (ENIG) surface finish is more susceptible to brittle failure compared to the rest of solder alloy-surface finish combinations.

Effects of Grain Orientation on Cu6Sn5 Growth Behavior in Cu6Sn5-Reinforced Composite Solder Joints During Electromigration

Electromigration is a major reliability problem in composite solder joints. Due to the anisotropy of the β-Sn crystal structure, the Sn grain orientations present in the solder matrix dominate the principal failure mechanism in solder joints under electric current stressing. In this work, the Cu6Sn5 growth behavior in Cu6Sn5-reinforced composite solder joints with three different Sn grain orientations was investigated at current density of 104 A/cm2 at room temperature. Micron-sized Cu particles were added to Sn-3.5Ag solder at 2% volume fraction using an in situ method. After current stressing for 528 h, the polarity effect in the composite solder joint was greatest for an angle (θ) between the c-axis and electron flow direction of 30°, resulting in higher growth rate of Cu6Sn5 in the solder matrix compared with composite solder joints with θ of 60° or 90°. There were no noticeable changes in the composite solder joint with θ of 90°. The growth behavior of Cu6Sn5, Cu atomic motion, and Cu diffusivity in the composite solder joints with different Sn grain orientations were analyzed in detail.

A Review of Recent Research on the Mechanical Behavior of Lead-Free Solders

Due to the restriction of lead-rich solder and the miniaturization of electronic packaging devices, lead-free solders have replaced lead-rich solders in the past decades; however, it also brings new technical problems. Reliability, fatigue, and drop resistance are of concern in the electronic industry. The paper provides a comprehensive survey of recent research on the methodologies to describe the mechanical behavior of lead-free solders. In order to understand the fundamental mechanical behavior of lead-free solders, the visco-plastic characteristics should be considered in the constitutive modeling. Under mechanical and thermal cycling, fatigue is related to the time to failure and can be predicted based on the analysis to strain, hysteresis energy, and damage accumulation. For electronic devices with potential drop impacts, drop resistance plays an essential role to assess the mechanical reliability of solder joints through experimental studies, establishing the rate-dependent material properties and proposing advanced numerical techniques to model the interconnect failure. The failure mechanisms of solder joints are complicated under coupled electrical-thermal-mechanical loadings, the increased current density can lead to electromigration around the current crowding zone. The induced void initiation and propagation have been investigated based on theoretical approaches to reveal the effects on the mechanical properties of solder joints. To elucidate the dominant mechanisms, the effects of current stressing and elevated temperature on mechanical behavior of lead-free solder have been reviewed. Potential directions for future research have been discussed.

Investigation and prediction of solder joint failure analysis for ball grid array package subject to mechanical bending environment

PurposeThe purpose of this study was to investigate the changes in solder joint stress when subjected to mechanical bending. The analytical theory pertaining to the stresses in the solder joint between the components (including the molding compound, the chip and the substrate) was described, and the printed circuit board (PCB) with a discontinuity function when the PCB assembly is subjected to mechanical bending was developed. Thus, the findings reported here may lead to a better understanding of the solder joint failure based on the Physics of Failure model.Design/methodology/approachThis paper discusses the analytical model for calculating the stress in solder joints, as well as presents a simulation model that can be used for calculating the strain energy density of solder joint. First, the multilayer plate theory is used in discussing the composite material for the component, including the molding compound, the silicon chip and the substrate, or the PCB, including the copper layers, the fiber and the epoxy. Finally, the complete structure of the analytical model developed as a part of this current work is presented.FindingsFor the analytical model of multilayer structures in which the interconnection layer is discrete, mechanical bending has been modeled with respect to varying silicon chip length. The analytical model that describes the stress of the outermost solder joint experiences is chosen, as this is the typical solder joint failure. The analytical model can be applied to discrete solder joints, which are evaluated by calculating the matrix form. Owing to its use of the matrix equation, the analytical model can be highly combinatorial and thus more capable of calculating the solution.Research limitations/implicationsThe analytical solution based on a simple concept was presented and validated using the finite element model for the stress experienced by solder joints subjected to mechanical bending. To verify that the simulation represents a real PCB case, the authors use the finite element method (FEM) to compare their case with the multilayer plate theory. Owing to the good agreement between the theory and simulation results, the authors conclude that the multilayer plate theory can be correctly applied in multilayer PCB and be used in an analytical model for the PCB assembly subjected to mechanical bending.Practical implicationsOwing to the good agreement between the theory and simulation results, the authors conclude that the multilayer plate theory can be correctly applied in multilayer PCB and be used in an analytical model for the PCB assembly subjected to mechanical bending.Social implicationsThe analytical model is validated with the FEM model and provides the way to physically examine the solder joint failure mechanism. In this paper, the analytical model is developed as a means to assess the solder joint stress subjected to mechanical bending.Originality/valueThe analytical model treats the solder joint as discrete and has been successfully validated against the finite element model. The complete structure model (the second analytical model) is presented to discuss the effects of varying silicon chip length on the normal stress in solder joints. When the silicon chip length exceeds to 80 per cent of the total package length, the stress of the outermost solder joint increases rapidly. The design analysis findings have suggested that the failure of the outermost solder joint subjected to mechanical bending on the PCB assembly can be reduced by analyzing the analytical model.

Coupling effects of mechanical vibrations and thermal cycling on reliability of CCGA solder joints

The microstructures and crack propagation behavior of CCGA (ceramic column grid array) solder joints after sinusoidal vibration loading, random vibration loading, and thermal cycling test have been discussed in this study. The failure mechanism of solder joints was analyzed using an experimental method and finite element analysis. It was found that the failed solder joints mainly distributed at the peripheral area in the solder column arrays and the crack initiation was mainly caused by mechanical vibrations. The deformation of PCB (printed circuit board) introduced by mechanical vibrations brought the outermost solder columns in CCGA devices with significant stress concentration and induced the initiation of cracks. Furthermore, cracks propagated during the process of mechanical vibrations and thermal cycling. The cracks propagated rapidly and the solder joints finally failed. The structure of the PCB holder was improved to relieve the vibration response from the peripheral joints. No visible crack was found in the solder joints after the same mechanical vibrations and thermal cycling test. The reliability of solder joints have been greatly improved with the new PCB holder.

A novel procedure for failure criteria determination at solder joints under the board level drop test

Abstract Controlling and monitoring of dynamic responses are very important to ensure consistent test results and understand mechanical behaviors, as they are closely related to the solder joint failure mechanism. The failure of a solder joint during drop impact is induced by printed circuit board (PCB) bending. The failure criteria must be clear to determine the absolute impact life for direct comparison of drop test results. In this publication, a multi-channel real time electrical monitoring system is introduced, which can measure the dynamic voltage of daisy-chained solder joints in real-time during drop impact. A new failure criteria of board level drop test is developed, which takes the function of the component into account.

Sensitivity Analysis for the Dependence of Solder Joints Fatigue Life

In electronic package technology, solder joint is not only used for the electrical connection and mechanical connection, but also offering the channel of heat dissipation. As chip package had developed from pin through-hole to pin surface mount, until the current no-pin ball array surface mount. Electronic package is developing in the direction of smaller ball grid array pitch, smaller chip size and more number of solder balls. The fact makes the reliability problem of solder joint become more and more outstanding. Studies have shown that 70 percent of electronic devices’ failure was caused by the failure of package assembly, and the failure of solder joint is the main reason in electronic package. The main failure mechanism of solder joint is low cycle thermal fatigue, and failure reason is the coefficient of thermal expansion (CTE)’s mismatch between components and circuit boards, then the thermal stress and strain don’t match in solder joint. The uncoordinated thermal strain will produce stress concentration, leading to the crack initiation and propagation, finally the solder joints’ failure.

EFFECT OF ELECTROLESS Ni-P CONSUMPTION ON THE FAILURE MECHANISM OF SOLDER JOINTS DURING ELECTROMIGRATION

The consumption of electroless Ni-P and its effect on the failure mechanism of solder joints during electromigration under a current density of 1.0×10 4 A/cm 2 at both 150 and 200 were investigated using line-type Cu/Sn/Ni-P solder joints. Before the electroless Ni-P was completely consumed, the microstructural evolution of the Sn/Ni-P interface (cathode) was the formation of Ni2SnP and Ni3P accompanied by the consumption of the electroless Ni-P. Ni atoms diffused from the electroless Ni-P into the Sn solder under electron current stressing. Most Ni atoms precipitated as (Cu, Ni)6Sn5 or (Ni, Cu)3Sn4 in the Sn solder, and few Ni atoms could arrive at the opposite Cu/Sn interface (anode). After the electroless Ni-P was completely consumed, the microstructural evolutions of the Sn/Ni-P interface (cathode) were the formation of voids and the transformation from Ni3 Pt o Ni2SnP. Furthermore, cracks that resulted from the propagation of voids significantly increased the current density through solder joints, and thus greatly enhanced the Joule heating of solder joints, resulting in the failure of solder joints by the fusing of Sn solder.

Current density redistribution from no current crowding to current crowding in Pb-free solder joints with an extremely thick Cu layer

In order to remove the effect of current crowding on electromigration, thick Cu under-bump metallization has been widely adopted in the electronics industry. Three-dimensional (3-D) integrated circuits, using through Si via Cu column interconnects, is being developed, and it seems that current crowding may not be a reliability issue. However, statistical experiments and 3-D finite element simulation indicate that there is a transition from no current crowding to current crowding, caused by void growth at the cathode. An analysis of the electromigration-induced failure mechanism in solder joints having a very thick Cu layer is presented. It is a unique failure mechanism, different from that in flip chip technology. Moreover, the study of marker displacement shows two different stages of drift velocity, which clearly demonstrates the back-stress effect and the development of compressive stress.

Grooved Ball Pad Structure (GBPS) to Improve FBGA Solder Joint Reliability (SJR) Performance

In this paper, a novel concept using the circular grooved ball pad structure (GBPS) for FBGA is proposed. The goal of the new design is to significantly improve FBGA solder joint reliability (SJR), with minimal impact in cost and packaging assembly processes. Finite element analysis (FEA) tools are used to understand the package solder joint failure mechanism. Simulation shows the GBPS can improve FBGA package SJR significantly. The leadframe based ball grid array package (LFBGA) is chosen as the vehicle to demonstrate the concept of grooved ball pad structure. The reliability results show that GBPS can improve LFBGA package SJR cycles by 2X. Grooved ball pad technology is further attempted on wafer level chip scale packages (WLCSP).

Experimental and numerical analysis of BGA lead-free solder joint reliability under board-level drop impact

Board-level solder joint reliability is very critical for handheld electronic products during drop impact. In this study, board-level drop test and finite element method (FEM) are adopted to investigate failure modes and failure mechanisms of lead-free solder joint under drop impact. In order to make all ball grid array (BGA) packages on the same test board subject to the uniform stress and strain level during drop impact, a test board in round shape is designed to conduct drop tests. During these drop tests, the round printed circuit board assembly (PCBA) is suffered from a specified half-sine acceleration pulse. The dynamic responses of the PCBA under drop impact loading are measured by strain gauges and accelerometers. Locations of the failed solder joints and failure modes are examined by the dye penetration test and cross section test. While in simulation, FEM in ABAQUS software is used to study transient dynamic responses. The peeling stress which is considered as the dominant factor affecting the solder joint reliability is used to identify location of the failed solder joints. Simulation results show very good correlation with experiment measurement in terms of acceleration response and strain histories in actual drop test. Solder joint failure mechanisms are analyzed based on observation of cross section of packages and dye and pry as well. Crack occurred at intermetallic composite (IMC) interface on the package side with some brittle features. The position of maximum peeling stress in finite element analysis (FEA) coincides with the crack position in the cross section of a failed package, which validated our FEA. The analysis approach combining experiment with simulation is helpful to understand and improve solder joint reliability.

Dynamic responses and solder joint reliability under board level drop test

Board level solder joint reliability during drop test is a great concern to semiconductor and electronic product manufacturers. In this paper, the comprehensive dynamic responses of printed circuit boards (PCBs) and solder joints, e.g., acceleration, strains, and resistance, are measured and analyzed in detail with a multi-channel real-time electrical monitoring system. Control and monitoring of dynamic responses are very important to ensure consistent test results and understand the mechanical behaviors, as they are closely related to the solder joint failure mechanism. The effects of test variables, such as drop height, number of PCB mounting screws, tightness of screws, and number of felt layer, are studied by comparing and analyzing the dynamic responses. A good repeatability of testing can only be achieved when careful attentions are paid on these factors. The relationships among drop height, peak acceleration, pulse duration, and impact energy are unique for a drop tester, and therefore, it should be characterized prior to the reliability tests. The studies also help to determine the requirements of new impact pulse quickly. The bending mode shapes and frequencies of PCB are extracted from dynamic strains and images token by high-speed camera. A real-time dynamic resistance monitoring method is developed to study the solder joint reliability. The solder joint failure process, i.e. crack initiation, propagation, and opening, is well understood from the behavior of dynamic resistance. It is found experimentally that the mechanical shock causes multiple PCB bending or vibration which induces the solder joint crack failure. Cyclic changes of dynamic resistance indicate that the solder joint crack opens and closes when PCB bends up and down.

落下衝撃による基板のたわみの変化とはんだ接合部の破壊メカニズム(OS1b 電子デバイス実装・電子材料と計算力学)

落下衝撃による基板のたわみの変化とはんだ接合部の破壊メカニズム(OS1b 電子デバイス実装・電子材料と計算力学)