Fabrication Of High Aspect Ratio Research Articles

High aspect ratio and low capacitance through-silicon-vias (TSVs) with polymer insulation layers

► TSVs using poly (propylene carbonate) (PPC) polymer as insulators have been developed. ► The TSV capacitance density is as low as 2.45 nF/cm 2 , about one tenth of TSVs using SiO 2 insulators. ► The leakage current at 5 V biased voltage is as low as 40 nA/cm 2 . Polymer insulation layers (liners) have several potential advantages in terms of capacitance and reliability over conventional silicon dioxide for through-silicon-via (TSV) applications. This paper reports the development and measurement results of a TSV using poly (propylene carbonate) (PPC) polymer as the insulation layers. To address the challenge in coating thin and uniform PPC liners on the sidewalls of high aspect-ratio vias, a spin-on technique using vacuum treatment and solvent refill is developed to prevent formation of air bubbles in the vias, and using this technique circular vias with aspect-ratio as high as 9:1 have been coated with uniform PPC layers. Based on these results, TSVs with thick PPC polymer liners have been fabricated and the capacitance and the current leakage are measured. Thanks to the relatively large thickness and the low dielectric constant of PPC liners, the TSV capacitance density is about 2.45 nF/cm 2 and the leakage current is around 40 nA/cm 2 at 5 V voltage, indicating that replacing silicon dioxide with PPC as liners considerably reduces TSV capacitance. The preliminary results demonstrate the feasibility of fabrication of high aspect ratio and low capacitance TSVs with polymer liners.

Fabrication of high-aspect ratio SU-8 micropillar arrays

SU-8 is the preferred photoresist for development and fabrication of high aspect ratio (HAR) three dimensional patterns. However, processing of SU-8 is a challenging task, especially when the film thickness as well as the aspect ratio is increasing and the size of the features is close to the resolution limit of photolithography. This paper describes process optimization for the fabrication of dense SU-8 micropillar arrays (2.5@mm spacing) with nominal height >=20@mm and nominal diameter = =8). Two approaches, differing in temperature, ramping rate and duration of the baking steps were compared as part of the photolithographic processing, in order to evaluate the effect of baking on the pattern resolution. Additionally, during the post-processing, supercritical point drying and hard baking were introduced yielding pillars with diameter 1.8@mm, AR=11 and an improved temporal stability.

Analysis of fabrication of arrayed micro-rods on tungsten carbide using reverse micro-EDM

Reverse micro-EDM (R-MEDM) has evolved as process for the fabrication of high aspect ratio arrayed micro-features. A detailed characterisation of R-MEDM process has been carried out using Taguchi method-based experimentation in the fabrication of micro-rods of size ф 80 μm and ф 200 μm of 1.5 mm length on WC. Response parameters were erosion rate, tool wear, surface finish and dimensional accuracy, whereas voltage, capacitance, threshold, feed and electrode thickness were the processing parameters. Erosion rate of process improves over a period of time. A lower thickness plate electrode was found to provide better erosion rates and better surface finish on the fabricated micro-rods; reducing the plate thickness from 500 μm to 300 μm results in 20% and 11% improvement in the surface finish at the tip of 80 μm and 200 μm rods, respectively. Notable differences were observed in the dimensional accuracy and surface finish of the fabricated.

High-aspect-ratio MEMS deformable mirrors for next-generation telescopes

The next generation of extremely large telescopes (ELTs) that will be built on a scale of 30–50 meters in diameter necessarily require an increased ability to correct wavefront errors. Currently, wavefront correction is achieved through the use of a deformable mirror (DM). The degree and amount of correction depends on amechanical displacement of segments of themirror (stroke), and the number of actuators in the mirror surface (order). An effective ELTwill require a high-stroke (10microns) and high-order (100X100 actuators) mirror, a costly prospect using current technology.1 Lowering the cost while improving the performance of DMs is possible using microelectromechanical systems (MEMS) technology. However, current surface machining processes used to fabricate MEMS deformable mirrors, such as the Sandia ultra-planar multilevel MEMS technology (SUMMiT) and MEMSCAP’s PolyMUMPS process, limit a DM’s stroke due to the use of thin-film sacrificial layers (which are dissolved away after the etching process to free up micromechanical components in the actuators).2, 3 Commercially available surface micromachined MEMS mirrors are limited in stroke to approximately 5.5 microns, about half of the stroke required by ELTs. A high aspect ratio fabrication process capable of depositing thick layers will allow the DM’s to provide both high-stroke and highorder corrections, thus bypassing the need for a complex dual woofer (high stroke, low order)/tweeter (high order, low stroke) DM configuration.4 In our work, we tested different actuator designs with a bonded faceplate constructed using the LIGA (German acronym for lithography, electroplating, and molding) process, enabling multilayer fabrication of MEMS devices.5 Various types of high-stroke gold actuators consisting of folded springs with Figure 1. Diagram showing the final release of the monolithic fabricated structure created using our technique. The gap for the Xbeam electrostatic actuators is 20 microns, enabling a mirror stroke of 10 microns. WMS-15: specific glass-ceramic substrate. Not to scale.

Fabrication of High Aspect Ratio TSV and Assembly With Fine-Pitch Low-Cost Solder Microbump for Si Interposer Technology With High-Density Interconnects

Fabrication of high aspect ratio through silicon vias (TSVs) in a Si interposer and fine pitch solder microbumps on a top Si die is discussed in this paper. Chip stacking result of the Si interposer and the top Si die is also presented. TSVs with 25 μm in pitch and aspect ratio higher than 10 are etched with BOSCH process. To avoid difficulties in wetting the sidewall of the TSVs, bottom-up plating method is used to fill the TSVs with Cu. In order to fill the TSVs from bottom, the TSVs are first sealed from the bottom by plated Cu with plating current of 1 A. The plated Cu is used as a seed layer and bottom-up plating is then conducted with plating current of 0.1 A. Good filling without voids or with only tiny voids has been achieved. Electroless nickel/immersion gold is plated on top of the TSVs as under bump metallurgy pads. On the top Si die, Cu pillars/Sn caps with 16 μm in diameter and 25 μm in pitch are fabricated with electroplating method. After chip stacking, interconnections are formed between them through the solder microbumps and the TSVs.

Nanotrench for nano and microparticle electrical interconnects

We present a simple and versatile patterning procedure forthe reliable and reproducible fabrication of high aspect ratio (104) electrical interconnects that have separation distances down to 20 nm and lengths ofseveral hundreds of microns. The process uses standard optical lithography techniques andallows parallel processing of many junctions, making it easily scalable and industriallyrelevant. We demonstrate the suitability of these nanotrenches as electrical interconnectsfor addressing micro and nanoparticles by realizing several circuits with integrated species.Furthermore, low impedance metal–metal low contacts are shown to be obtained whentrapping a single metal-coated microsphere in the gap, emphasizing the intrinsic goodelectrical conductivity of the interconnects, even though a wet process is used. Highlyresistive magnetite-based nanoparticles networks also demonstrate the advantageof the high aspect ratio of the nanotrenches for providing access to electricalproperties of highly resistive materials, with leakage current levels below 1 pA.

Probe Tips Functionalized with Colloidal Nanocrystal Tetrapods for High‐Resolution Atomic Force Microscopy Imaging

Probe Tips Functionalized with Colloidal Nanocrystal Tetrapods for High‐Resolution Atomic Force Microscopy Imaging

SU‐8 2000 rendered cytocompatible for neuronal bioMEMS applications

Microfabrication advances have resulted in small, cheap, and precise devices for biological microelectromechanical systems (bioMEMS). SU-8/SU-8 2000 is an attractive material for these applications because of its high-aspect ratio fabrication capability, dielectric properties, and thermochemical stability. Despite these advantages, the potential toxicity of SU-8 2000 may limit its use in cell-based applications. We show that <10% of primary neurons survived when cultured adjacent to or on top of untreated SU-8 2000. We evaluated the efficacy of various detoxification and surface treatments for SU-8 2000 in neuronal cultures after 7-21 days in vitro. Viability was improved to 45.8% +/- 4.5% (mean +/- standard error of the mean) following 3-day heat treatment (150 degrees C) under vacuum, while UV exposure and CO2 supercritical extraction did not improve survival. Furthermore, parylene coating (25 microm), in combination with heat and sonication (in isopropanol) treatments effectively masked the SU-8 2000 and led to 86.4% +/- 1.9% viability. Glow discharge (oxygen plasma) treatment rendered the SU-8 2000 surface more hydrophilic and improved neuronal viability, possibly through improved cell adhesion. No organic leachants were detected by mass spectrometry before or after heat treatment or after sonication. However, XPS analysis revealed the presence of potentially neurotoxic elements, fluorine and antimony. Strategies to improve the cytocompatibility of SU-8 2000 with primary neurons will allow longer culture times and have applications for cell-based microfabrication.

Fabrication and characterization of fine pitch on-chip copper interconnects for advanced wafer level packaging by a high aspect ratio through AZ9260 resist electroplating

In this paper, we report the fabrication of high aspect ratio, highly dense, very fine pitch on-chip copper-pillar-based interconnects for advanced packaging applications. Photoresist molds up to a thickness of 80 µm and having feature sizes as small as 5 µm were fabricated using multi-step coating of the positive tone AZ9260 photoresist. Spin coating and lithography parameters were optimized to achieve smooth and vertical sidewalls. Copper interconnects having an aspect ratio up to 6 and a pitch size of 25 µm were electroplated in the fabricated resist mold. Due to a very small pitch size, the total number of interconnects per cm2 chip area is 160 000, which is much larger than the conventional solder-based interconnects. The electrical resistance of the electroplated copper interconnects was measured by 4-probe kelvin measurement configuration and was found to be in the range of 8–10 mΩ and the corresponding electrical resistivity was calculated as 2.4 µΩ cm. Such low resistive interconnects can carry much larger electrical current without significant electrical loss, which is ideally suitable for next generation packaging applications. X-ray diffraction has shown the presence of the (2 2 0) texture along the length of electroplated copper pillars. Transmission electron microscope reveals the presence of nanoscale copper twins along the length of copper interconnects.

Fabrication of High Aspect Ratio 35 μm Pitch Through-Wafer Copper Interconnects by Electroplating for 3-D Wafer Stacking

We report the fabrication of high aspect ratio (-15) ultradense (∼80000/cm 2 ) through-wafer copper interconnects by a special aspect ratio dependent electroplating technique. In this approach, electroplating process parameters were continuously varied along with varying unfilled via depth, to maintain the uniform current distribution and thus uniform metal deposition. Copper interconnects, with diameters as small as 12 μm and a pitch of 35 μm, were electroplated without any voids. Due to ultrafine pitch and extremely high number of I/Os per cm 2 , these interconnects were found to have significant potential in three-dimensional (3-D) wafer stacking and other high-density electronic packaging applications.

3D polymeric microfluidic device fabrication via contact liquid photolithographic polymerization (CLiPP)

In this contribution, a new method for the fabrication of complex polymeric microfluidic devices is presented. The technology, contact liquid photolithographic polymerization (CLiPP), overcomes many of the drawbacks associated with other rapid prototyping schemes, such as limited materials choices and time-consuming microassembly protocols. CLiPP shares many traits with other photolithographic methods, but three distinct features: (i) liquid photoresists in contact with the photomask, (ii) readily removed sacrificial materials, and (iii) living radical processes, enable multiple polymeric chemistries and mechanical properties while simultaneously enabling facile fabrication of 3D geometries and surface chemistry control. This contribution details fabrication techniques and methods for the fabrication of high aspect ratio posts covalently bonded to a polymeric substrate, an array of independently stacked bars on top of perpendicular bars, multiple undercut structures fabricated simultaneously, and a complex 3D geometry with intertwined channels.

Electroless Nickel-Plated UV-Embossed Microstructured Surface with Very High Aspect Ratio Channels

The very high aspect ratio (14) and deep (132 μm) channels of an UV-embossed polymeric microstructured surface were successfully metallized by electroless nickel plating. A submicron conformal and highly adherent nickel coating was uniformly deposited on all the hydrophobic silicone-enriched surfaces of the channels. The nickel surface layer acts as a diffusion barrier and also allows for easy subsequent chemical modification by chemical grafting, electroplating, or electropolymerization for diverse applications in micromolding, microfluidics, sensors, microreactors, biomedical devices, and so forth. Hence, electroless nickel plating combined with UV embossing allows easy fabrication of high aspect ratio metallized polymeric microstructures with tailored surfaces.

Fabrication of high-aspect ratio, micro-fluidic channels and tunnels using femtosecond laser pulses and chemical etching

We present novel results obtained in the fabrication of high-aspect ratio micro-fluidic microstructures chemically etched from fused silica substrates locally exposed to femtosecond laser radiation. A volume sampling method to generate three-dimensional patterns is proposed and a systematic SEM-based analysis of the microstructure is presented. The results obtained gives new insights toward a better understanding of the femtosecond laser interaction with fused silica glass (a-SiO(2)).

Fabrication of High Aspect Ratio Poly(ethylene glycol)-Containing Microstructures by UV Embossing

The fabrication of high aspect ratio (5 and above) microstructures based upon UV embossing of mixtures containing poly(ethylene glycol) diacrylate (PEGDA) is described. UV embossing is a quick and convenient replication technique using low pressure and room temperature. The biocompatibility and cell- and protein-resistance of PEGDA make deep three-dimensional (3-D) micropatterned PEGDA films potentially useful for many biological applications such as protein delivery, tissue engineering, drug delivery, and biosensors. Microarrays of deep microchannels and microcups separated by PEGDA walls with aspect ratios of 7 and 5, respectively, were successfully embossed. UV embossing was found to faithfully replicate the lateral periodicity and height of the mold. We also successfully UV embossed a mixture having equal weight proportions of hydrophilic PEGDA and hydrophobic poly(propylene glycol) diacrylate and demonstrated the use of this microarray of microcups for encapsulation of a model protein (bovine serum albumin) within a UV cured PEGDA hydrogel; a protein encapsulated within a hydrogel 3-D microarray was fabricated. Although high aspect ratio UV embossing has many attractive features, it is a difficult process to implement, requiring precise control and optimization of mold, process, and material parameters. Successful high aspect ratio UV embossing was achieved using two molds: a rigid nickel mold and a silicone rubber mold. The latter did not require any surface treatment, but the nickel mold was found to require coating with a cured silicone resin to obtain a suitable nonstick surface. The UV exposure time was controlled to optimize the hardened resin strength while avoiding excessive brittleness. Peel-off of the hardened microstructures was performed at a small angle to avoid breakage of the molded structures. A mold release additive was necessary for successful demolding. Trimethylolpropane triacrylate, a high shrinkage monomer, also facilitated demolding.

Modeling and identification of induction micromachines in microelectromechanical systems applications

Microelectromechanical systems (MEMS), which integrate motion microstructures, radiating energy microdevices, controlling and signal processing integrated circuits (ICs), are widely used. Rotational and translational electromagnetic based micromachines are used in MEMS as actuators and sensors. Brushless high performance micromachines are the preferable choice in different MEMS applications, and therefore, synchronous and induction micromachines are the best candidates. Affordability, good performance characteristics (efficiency, controllability, robustness, reliability, power and torque densities et cetera) and expanded operating envelopes result in a strong interest in the application of induction micromachines. In addition, induction micromachines can be easily fabricated using surface micromachining and high aspect ratio fabrication technologies. Thus, it is anticipated that induction micromachines, controlled using different control algorithms implemented using ICs, will be widely used in MEMS. Controllers can be implemented using specifically designed ICs to attain superior performance, maximize efficiency and controllability, minimize losses and electromagnetic interference, reduce noise and vibration, etc. In order to design controllers, the induction micromachine must be modeled, and its mathematical model parameters must be identified. Using microelectromechanics, nonlinear mathematical models are derived. This paper illustrates the application of nonlinear identification methods as applied to identify the unknown parameters of three phase induction micromachines. Two identification methods are studied. In particular, nonlinear error mapping technique and least squares identification are researched. Analytical and numerical results, as well as practical capabilities and effectiveness, are illustrated, identifying the unknown parameters of a three phase brushless induction micromotor. Experimental results fully support the identification methods.

Post-CMOS processing for high-aspect-ratio integrated silicon microstructures

Presents a new fabrication sequence for integrated-silicon microstructures designed and manufactured in a conventional complementary metal-oxide-semiconductor (CMOS) process. The sequence employs a post-CMOS deep silicon backside etch, which allows fabrication of high aspect ratio (25:1) and flat (greater than 10 mm radius of curvature) MEMS devices with integrated circuitry. A comb-drive resonator, a cantilever beam array and a z-axis accelerometer were fabricated using this process sequence. Electrical isolation of single-crystal silicon was realized by using the undercut of the reactive ion etch (RIE) process. Measured out-of-plane curling across a 120-/spl mu/m-wide 25-/spl mu/m-thick silicon released plate was 0.15 /spl mu/m, which is about ten times smaller than curl of the identical design as a thin-film CMOS microstructure. The z-axis DRIE accelerometer structure is 0.4 mm by 0.5 mm in size and has a 25-/spl mu/m-thick single-crystal silicon proof mass. The measured noise floor is 1 mG//spl radic/Hz, limited by electronic noise. A vertical electrostatic spring hardening effect was theoretically predicted and experimentally verified.

Active material micro-actuator arrays fabricated with SU-8 resin

Active materials such as piezoelectric ceramics and shape memory metal alloys commonly actuate active control and intelligent material systems. Commercially available piezoelectric materials exhibit small actuation stroke and shape memory metal alloys have limited bandwidth. The proposed micro-actuator array design and fabrication process increases the actuation stroke of piezoceramic material by a factor of 1.5 for a 2 × 2 array; two active material segments connected in parallel and two in series, and doubles the response time of a 1 × 4 shape memory alloy driven array; four active materials segments connected in series. A high aspect ratio fabrication method incorporating SU-8 resin and conventional lithography is the process that forms the array linkages. The SU-8 resin array structures are 300 μm tall.

Recent Advances in Surface Micromachining

Surface micromachining is the fabrication of micromechanical structures from deposited thin films. Although the process dates to the 1960s, this paper will survey its rapid extension over the past few years and its application to batch-fabrication of micromechanisms and of monolithic micro electromechanical systems (MEMS). Two central issues in surface micromachining are: (i) the understanding and control of the material properties of microstructural films, such as polycrystalline silicon, and (ii) the release of the microstructure, for example by wet-etching silicon dioxide sacrificial films, followed by the drying and surface passivation of the microstructure. Recent developments in hinged structures for post-release assembly and high-aspect ratio fabrication of molded parts from deposited thin films promise to extend greatly the capabilities of surface micromachining technology.

High aspect ratio fabrication method using O2 RIE and electroplating

A polyimide-based process for the fabrication of vertical structures with high aspect ratio has been developed. O2 reactive ion etching (O2 RIE) has been employed in the polyimide processing. Achieved etching characteristics of the O2 RIE system are: 4.0 μm/min etching rate, 15 aspect ratio, 75 μm etching depth. Polyimide has excellent chemical and thermal properties which makes it a good building material for micromachines. Polyimide could be also used as molds for electroplating. Electroplated copper structures were formed in the polyimide molds and metal gears were fabricated by these fabrication technologies. New possibilities for micromachining were opened by the use of O2 RIE and electroplating.

Fabrication of high aspect ratio silicon pillars of &amp;lt;10 nm diameter

We report the fabrication of high aspect ratio, sub-10 nm size, structures in silicon without involving any wet chemical etching. A 50 nm thick double layer of low and high molecular weight polymethylmethacrylate resist was exposed with an 80 kV electron beam of diameter smaller than 5 nm. After exposure the resist was developed in 3:7 cellusolve: methanol with ultrasonic agitation during development. A 5 nm thick AuPd film was deposited by ionized beam evaporation and a metal pattern was obtained by liftoff. Sub-10 nm AuPd dots were recorded with a scanning electron microscope. The AuPd pattern was then used as a mask on the Si substrate which was etched with reactive ion etching. Silicon nanocolumns with diameters ranging from 5 to 7 nm and an aspect ratio of height to diameter of about 7:1 were obtained.