Fabrication Of Si Nanowires Research Articles

Fabrication and Characterization of a Self-Powered n-Bi2Se3/p-Si Nanowire Bulk Heterojunction Broadband Photodetector.

In the present study, vacuum evaporation method is used to deposit Bi2Se3 film onto Si nanowires (NWs) to form bulk heterojunction for the first time. Its photodetector is self-powered, its detection wavelength ranges from 390 nm to 1700 nm and its responsivity reaches its highest value of 84.3 mA/W at 390 nm. In comparison to other Bi2Se3/Si photodetectors previously reported, its infrared detection length is the second longest and its response speed is the third fastest. Before the fabrication of the photodetector, we optimized the growth parameter of the Bi2Se3 film and the best Bi2Se3 film with atomic steps could finally be achieved. The electrical property measurement conducted by the physical property measurement system (PPMS) showed that the grown Bi2Se3 film was n-type conductive and had unique topological insulator properties, such as a metallic state, weak anti-localization (WAL) and linear magnetic resistance (LMR). Subsequently, we fabricated Si NWs by the metal-assisted chemical etching (MACE) method. The interspace between Si NWs and the height of Si NWs could be tuned by Ag deposition and chemical etching times, respectively. Finally, Si NWs fabricated with the Ag deposition time of 60 s and the etching time of 10 min was covered by the best Bi2Se3 film to be processed for the photodetector. The primary n-Bi2Se3/p-Si NWs photodetector that we fabricated can work in a self-powered mode and it has a broadband detection range and fast response speed, which indicates that it can serve as a promising silicon-based near- and mid-infrared photodetector.

Optimizing interferences of DUV lithography on SOI substrates for the rapid fabrication of sub-wavelength features

Scalable fabrication of Si nanowires with a critical dimension of about 100 nm is essential to a variety of applications. Current techniques used to reach these dimensions often involve e-beam lithography or deep-UV (DUV) lithography combined with resolution enhancement techniques. In this study, we report the fabrication of <150 nm Si nanowires from SOI substrates using DUV lithography (λ = 248 nm) by adjusting the exposure dose. Irregular resist profiles generated by in-plane interference under masking patterns of width 800 nm were optimized to split the resulting features into twin Si nanowires. However, masking patterns of micrometre size or more on the same photomask does not generate split features. The resulting resist profiles are verified by optical lithography computer simulation based on Huygens−Fresnel diffraction theory. Photolithography simulation results validate that the key factors in the fabrication of subwavelength nanostructures are the air gap value and the photoresist thickness. This enables the parallel top-down fabrication of Si nanowires and nanoribbons in a single DUV lithography step as a rapid and inexpensive alternative to conventional e-beam techniques.

Thermal atomic layer etching of germanium-rich SiGe using an oxidation and “conversion-etch” mechanism

The thermal atomic layer etching (ALE) of germanium-rich SiGe was demonstrated using an oxidation and “conversion-etch” mechanism with oxygen (O2) or ozone (O3), hydrofluoric acid (HF), and trimethylaluminum [TMA, Al(CH3)3] as the reactants. The crystalline germanium-rich SiGe film was prepared using physical vapor deposition and had a composition of Si0.15Ge0.85. In situ spectroscopic ellipsometry was employed to monitor the thickness of both the SiGe film and the surface oxide layer on the SiGe film during thermal ALE. Using a reactant sequence of O2-HF-TMA, the etch rate of the SiGe film increased progressively with temperatures from 225 to 290 °C. At 290 °C, the SiGe film thickness decreased linearly at a rate of 0.57 Å/cycle with a surface oxide thickness of 18–19 Å. This etch rate was obtained using reactant pressures of 25, 0.2, and 0.4 Torr and doses of 1.5, 1.0, and 1.0 s for O2, HF, and TMA, respectively. The TMA and HF reactions were self-limiting and the O2 reaction was reasonably self-limiting at 290 °C. Using an O3-HF-TMA reaction sequence, the SiGe ALE etch rate was 0.42 Å/cycle at 290 °C. This etch rate was obtained using reactant pressures of 15, 0.2, and 0.4 Torr and dose times of 0.5, 1.0, and 1.0 s for O3, HF, and TMA, respectively. The O3, TMA, and HF reactions were all self-limiting at 290 °C. Atomic force microscopy images revealed that thermal ALE with the O2-HF-TMA or O3-HF-TMA reaction sequences did not roughen the surface of the SiGe film. The SiGe film was etched selectively compared with Si or Si3N4 at 290 °C using an O2-HF-TMA reaction sequence. The etch rate for the SiGe film was &amp;gt;10 times faster than Si(100) or Si3N4 that was prepared using low-pressure chemical vapor deposition. This selectivity for the SiGe film will be useful to fabricate Si nanowires and nanosheets using SiGe as the sacrificial layer.

The high cycling performance of ultra-thin Si nanowires fabricated by metal-assisted chemical etching method as lithium-ion batteries anode

Abstract The main method for the fabrication of Si nanowires (SiNWs) includes chemical vapor deposition (CVD) and metal-assisted chemical etching (MCE). In the conventional MCE method, Ag catalysts are generated in a Ag+ solution. Because of the anisotropic growth of crystalline Ag, the size of the SiNWs is limited. To etch thinner SiNWs, compact and porous catalysts have been fabricated by fast-ion sputtering on Si substrates. Then, ultra-thin SiNWs (approximately 10 nm) can be etched by HF and H2O2 solution. The SiNWs fabricated by the two different methods above are assembled in a CR2025 coin cell. The 2nd discharge capacity of ultra-thin SiNWs and conventional SiNWs is 2483 and 2187 mAh/g, respectively. After 100 cycles, the discharge capacity is 1823 and 1156 mAh/g, that means the conventional SiNWs decays about 47% and ultra-thin SiNWs decays about 27%. It shows that the ultra-thin SiNWs exhibit higher cycling performance and electrochemical activity.

Fabrication and tensile characterization of FIB doped Si nanostructures

This paper describes the fabrication method of Silicon (Si) nanowires to evaluate the mechanical properties of Si, which is widely used as a based material in Micro Electro Mechanical System (MEMS). Nanoscale Si nanowires are fabricated by gallium (Ga) ion doping on monocrystalline silicon using Focus Ion Beam (FIB) and alkaline etching using Tetra methyl ammonium hydroxide (TMAH). In addition, fabricate Si nanowires with changed the various conditions of FIB ion dope and determine optimal conditions for fabricate Si nanowires.

Enhanced Surface Properties of Light-Trapping Si Nanowires Using Synergetic Effects of Metal-Assisted and Anisotropic Chemical Etchings

Metal-assisted chemical etching (MACE) has been widely explored for developing silicon (Si)-based energy and optical devices with its benefits for low-cost and large-area fabrication of Si nanostructures of high aspect ratios. Surface structures and properties of Si nanostructures fabricated through MACE are significantly affected by experimental and environmental conditions of etchings. Herein, we showed that surfaces and interfacial energy states of fabricated Si nanowires can be critically affected by oxidants of MACE etching solutions. Surfaces of fabricated Si nanowires are porous and their tips are fully covered with lots of Si nano-sized grains. Strongly increased photoluminescence (PL) intensities, compared to that of the crystalline Si substrate, are observed for MACE-fabricated Si nanowires due to interfacial energy states of Si and SiOx of Si nano-sized grains. These Si grains can be completely removed from the nanowires by an additional etching process of the anisotropic chemical etching (ACE) of Si to taper the nanowires and enhance light trapping of the nanowires. Compared with the MACE-fabricated Si nanowires, ACE-fabricated tapered Si nanowires have similar Raman and PL spectra to those of the crystalline Si substrate, indicating the successful removal of Si grains from the nanowire surfaces by the ACE process.

Monolithic Fabrication of Silicon Nanowires Bridging Thick Silicon Structures

A monolithic process is developed for the fabrication of Si nanowires within thick Si substrates. A combination of anisotropic etch and sidewall passivation is utilized to protect and release Si lines during the subsequent deep etch. An etch depth of 10 μm is demonstrated with a future prospect for 50 μm opening up new possibilities for the deterministic integration of nanowires with microsystems. Nanowires with in-plane dimensions as low as 20 nm and aspect ratios up to 150 are obtained. Nanomechanical characterization through bending tests further confirms structural integrity of the connection between nanowires and anchoring Si microstructures.

Nanofabrication of silicon nanowires with high aspect ratio for photo-electron sensing

Nanoscale silicon wires with high aspect ratio are beneficial in light harvesting for high responsivity in photoelectronic detectors. Reduction of wire width increases the surface-to-volume ratio, but introduces inelastic electron-boundary scattering caused by line edge roughness, limiting the photoconductivity at the same time. This paper is motivated by these structural effects on the device performance, aiming to develop the photoelectronic detectors with ultra-fine Si nanowires with high aspect ratio. Electron beam lithography assisted by Monte Carlo simulation was carried out on HSQ, which was used as etch mask for forming high aspect ratio Si nanowires by reactive ion etch. As narrow as 5 nm HSQ lines with the line edge roughness of sub-3.6 nm was achieved. Masked by the replicated HSQ lines, silicon nanowires with the width from 75 nm down to sub-10 nm and the aspect ratio of 30:1 were achieved through a dry etch process. Characterization of photo-electronic responsivity of the fabricated Si nanowires in visible wavelength demonstrates the maximum responsivity can be achieved in an optimized width with which the surface-to-volume ratio is balanced by the sidewall roughness. The milestone established in this work covers not only the technical advances of Si nanowires with high aspect ratio but also physical understanding of the structural effect on the device performance.

Fabrication of Si-nanowires controlled by spontaneously formed nanoholes on annealed Au thin films

Si nanowires (Si-NWs) were fabricated by a simple process that consists of deposition of Au thin films, annealing of the Au films to form porous structure and Si wet-etching using the kinetically appearing porous Au films as a template. The deformation behavior of the Au thin films was investigated by scanning electron microscopy and atomic force microscopy. The nanohole diameter and density of the Au films can be controlled by selecting Au film thickness, annealing temperature and annealing time. The formation mechanism of these porous Au films can be explained by a model that consists of nanohole formation at the grain boundaries of the Au films and ridge formation by Au atom diffusion to the hole periphery. The ridge structure suppresses further deformation of the Au films and keeps the nanohole structure kinetically stable. When a thermal energy larger than the activation energy to destroy the ridge structure is supplied, it transforms to the island structure.

Control of the micrometric scale morphology of silicon nanowires through ion irradiation-induced metal dewetting

Abstract We propose ion-induced dewetting of Au thin films as a mechanism to modify and control the morphology of Si nanowires formed through metal-assisted chemical etching. We show that the patterns formed upon irradiation resemble those typical of dewetting phenomena, with a characteristic length in the nanometer range. Irradiated Au films are then used as a template for the fabrication of Si nanowires, and we show that a long-range order exists also in etched substrates, although at much longer length scales in the micrometer range. Investigation of the optical properties reveals that the Si nanowires emit broadband photoluminescence peaked at 700 nm. The proposed synthesis method allows tuning the morphological features of the nanowire bundles at the nanoscale without affecting the optical properties. This approach can be exploited for the engineering of nanowires-based devices where the morphological features become important.

Controlled Fabrication of Si Nanowires with Nanodots Using Nanosphere Lithography.

In this paper, we introduce an easy method for fabricating Si nanowires with nanodots using nanosphere lithography. First, a self-assembly ordered single layer of polystyrene nanospheres with a diameter of 220 nm was prepared on Si substrate. Secondly, the polystyrene spheres monolayer was etched by 02 with different time from 10 s to 35 s. After this etching process, the polystyrene nanowires between polystyrene spheres were fabrication. If the etching time was longer than 35 s, there were no polystyrene nanowires. Thereafter, the following etching process with carbon fluoride was performanced. The polystyrene nanowires and nanosphers were worked as masks. Finally, the Si nanowires with nanodots were formed. The size and morphology can be controlled by etching process. This technique for forming nanostructure arrays using nanosphere lithography can be applied in many areas of science and technology.

Chemical and Electrochemical Deposition of Ag onto Si for Fabrication of Si Nanowires and the Seebeck Effect Characterization

Chemical and Electrochemical Deposition of Ag onto Si for Fabrication of Si Nanowires and the Seebeck Effect Characterization

Intense violet and blue light emission from Si nanowires fabricated via solid–liquid–solid growth from amorphous Si films

Violet and blue luminescent Si nanowires were fabricated by annealing an amorphous Si film on a Ni-coated Si substrate via solid–liquid–solid growth. The fabricated Si nanowires have an average diameter of 50 nm. The wire stem is composed of a crystalline Si core of several nanometers and an amorphous oxide sheath. The Si nanowires are capable of emitting strong violet and blue luminescence in the spectral region ranging from 380 to 500 nm, which has a very short decay time of tens of nanoseconds, and is remarkably different in spectral region and luminescence time from the luminescence emitted by Si nanocrystals.

Height reversal of Si micro dot and well patterns during Si nanowire formation by Ag-assisted chemical etching

The Si nanowire (Si-NW) formation process has been studied to develop a new anode material for lithium ion batteries. Si-NWs were prepared by a combination of electroless metal deposition (EMD) of Ag and metal-assisted chemical etching (Mac etching) on Si substrates that have micro dot and well patterns with respect to their height. During the fabrication of Si-NWs, height reversal occurred in the micro dot and well patterns, and Si micro- and nano-hybrid systems were fabricated. We also observed structural changes of the Si micro- and nano-hybrid structures during the electrochemical charge/discharge process of lithium ions, and showed that this hybrid system is robust for the volume change accompanied with the lithiation/delithiation reaction.

Monolithic Fabrication of Silicon Nanowires Bridging Thick Silicon Structures

A monolithic process is developed for the fabrication of Si nanowires within thick Si substrates. A combination of anisotropic etch and sidewall passivation is utilized to protect and release Si lines during the subsequent deep etch. An etch depth of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$10~\mu \text{m}$ </tex-math></inline-formula> is demonstrated with a future prospect for 50 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> opening up new possibilities for the deterministic integration of nanowires with microsystems. Nanowires with in-plane dimensions as low as 20 nm and aspect ratios up to 150 are obtained. Nanomechanical characterization through bending tests further confirms structural integrity of the connection between nanowires and anchoring Si microstructures.

High-Aspect-Ratio Silicon Microwire Arrays By Metal-Assisted Chemical Etching for Photovoltaic Applications

Vertically aligned silicon microwire (MW) arrays have been extensively investigated as a means for developing highly efficient and low cost solar cells. Silicon surface which is patterned with the MW arrays leads to broadband antireflection as well as enhanced light trapping efficiency. Among several methods for the fabrication of Si MWs, deep reactive ion etching (DRIE) process has demonstrated an anisotropic etch profile with a high aspect ratio. However, DRIE process forms rough surface with scallops along the sidewall of Si MWs because the process uses alternating etching steps of etching (SF6) and passivation (C4F8). In addition, plasma-induced surface damage during the process could induce a lifetime shortening of minority carriers. Metal-assisted chemical etching (MACE) is an attractive method as an alternative to the DRIE method owing to its low cost process and wafer-scale fabrication. The surface of Si is very smooth and clean because the MACE is a simple redox process of H2O2, HF, and Si with metal catalyst. However, most studies of the MACE have focused on the fabrication of Si nanowires (NWs) and their applications, so far. Figure 1a shows the scanning electron microscopy (SEM) images of Si NWs fabricated from the Si substrate (p-type, 1-10 Ωcm). The Si NWs were etched using thin Au film (10-nm-thick) under the typical MACE condition with a mixture 4.8 M HF and 0.44M H2O2 at room temperature for 1 h. We found that 10-nm-thick Au film consisting of particle-linked structure produced vertically-aligned Si NWs with a length of about 23.8 μm. Compared with the fabrication of Si NWs, it is still unclear to fabricate Si MWs with desired length and diameter using the MACE method. As a preliminary experiment to fabricate Si MWs, we prepared a continuous gold film with the thickness of 30 nm onto the lithography-patterned Si substrate with ordered photoresist dots as a etch mask. The morphology of the etched structures would usually be dependent on the morphology of the metal catalyst prepared on the Si substrate. However, Si MWs etching using 30-nm-thick gold film under the same conditions as the fabrication of Si NWs showed an over-etched features (Figure 1b), indicating that it is necessary to optimize the etching conditions for fabrication of long and vertical Si MWs. In this report, we present a systematic study of the MACE process to fabricate Si MWs. Several models on efficient redox reactions of reactants with silicon though the metal catalyst were studied by controlling the MACE parameters such as the morphology of metal thin film and electrolyte (HF and H2O2) concentration. To obtain vertically aligned Si MWs, the deposition rate and thickness of Au film should be controlled as the critical parameters. We found that the appropriate deposition rate and thickness of Au film were 2-3 Å/s and 30-40 nm, respectively. As a result, by optimizing MACE conditions, we successfully fabricated high-quality Si MWs with lengths up to 17 μm as shown in Figure c and d. The minority carrier lifetime of these MWs, measured by the microwave photoconductive decay, is much higher than that of MWs etched by DRIE process. The MACE method of high-quality Si MWs would offer great opportunities to develop cost-effective and highly efficient solar cells.Figure caption. Cross-sectional SEM images of vertical Si nanowires and microwires etched using (a) 10-nm-thick, (b) 30-nm-thick Au film in mixture of 4.8 M HF and 0.44M H2O2 at room temperature for 1 h. (c and d) 45 ̊ tilted SEM images of vertically-aligned Si MWs etched under the optimized MACE condition.

Advanced fabrication of Si nanowire FET structures by means of a parallel approach

In this paper we present fabricated Si nanowires (NWs) of different dimensions with enhanced electrical characteristics. The parallel fabrication process is based on nanoimprint lithography using high-quality molds, which facilitates the realization of 50 nm-wide NW field-effect transistors (FETs). The imprint molds were fabricated by using a wet chemical anisotropic etching process. The wet chemical etch results in well-defined vertical sidewalls with edge roughness (3σ) as small as 2 nm, which is about four times better compared with the roughness usually obtained for reactive-ion etching molds. The quality of the mold was studied using atomic force microscopy and scanning electron microscopy image data. The use of the high-quality mold leads to almost 100% yield during fabrication of Si NW FETs as well as to an exceptional quality of the surfaces of the devices produced. To characterize the Si NW FETs, we used noise spectroscopy as a powerful method for evaluating device performance and the reliability of structures with nanoscale dimensions. The Hooge parameter of fabricated FET structures exhibits an average value of 1.6 × 10−3. This value reflects the high quality of Si NW FETs fabricated by means of a parallel approach that uses a nanoimprint mold and cost-efficient technology.

Large initial compressive stress in top-down fabricated silicon nanowires evidenced by static buckling

Single crystal silicon nanowires with a width down to 25 nm and a length-to-width (L/w) aspect ratio up to 177 were fabricated by surface micromachining of thin SOI wafers. It is demonstrated that these top-down fabricated clamped-clamped nanowires are laterally buckled when L/w is larger than about 44. This is attributed to an unexpected high compressive residual pre-stress estimated to be in the −270 to −335 MPa range from a simple nonlinear post-buckling model. The origin of this stress is investigated by considering several axial stress generation mechanisms in the silicon nanowires such as thermomechanical stresses, surface layers and deformation stresses of dies induced by patterning or die attachment. It is shown that none of these mechanisms can generate the observed initial compressive stress and high temperature steps during SOI wafers fabrication and/or thinning are likely to be the main cause of high compressive stress generation. Possible occurrence of a large stress in top-down fabricated Si nanowires is often ignored and must be considered in future works notably for electrical and thermal transport investigations.

Vertical Si nanowire with ultra-high-aspect-ratio by combined top-down processing technique

Vertical Si nanowires with ultra-high-aspect-ratio were fabricated using a combined process of deep reactive ion etching and sacrificial oxidation. The combined process starts with etching the Si substrates by the Bosch process to form micrometer-scale structures. The etched micrometer-scale structures are shrunk to nanometer-scale by sacrificial oxidation. The fabricated Si nanowires that were aligned vertically to the substrate had a diameter of less than 200 nm and a length greater than 10 μm. One of the fabricated Si nanowires had a diameter of 110 nm and a length of 11 μm. The resulting aspect-ratio reached 100, which is a value that is significantly high for vertical Si nanowires fabricated by using a top-down approach.

Synthesis of Si Nanowires by Electroless Etching Technique and Their Integration Into I-III-VI2 Thin Films For Solar Cells

ABSTRACTSi nanowires (NWs) have been fabricated by Ag-assisted electroless etching technique using an HF/AgNO3 aqueous solution. Scanning electron microscopy (SEM) measurements have revealed that a highly dense array of Si NWs with length of ∼1.4 μm is formed over the surface of both n-type and p-type Si (100) substrates. Following the fabrication of Si NWs, electron-beam evaporated p-type AgGa0.5In0.5Se2 thin film was deposited on the n-type Si NWs to form p-n heterojunction solar cells. The fabricated solar cells yield a 5.50% power conversion efficiency under AM (1.5) illumination.