Execution Architecture Research Articles

Scalable selective re-execution for EDGE architectures

Pipeline flushes are becoming increasingly expensive in modern microprocessors with large instruction windows and deep pipelines. Selective re-execution is a technique that can reduce the penalty of mis-speculations by re-executing only instructions affected by the mis-speculation, instead of all instructions. In this paper we introduce a new selective re-execution mechanism that exploits the properties of a dataflow-like Explicit Data Graph Execution (EDGE) architecture to support efficient mis-speculation recovery, while scaling to window sizes of thousands of instructions with high performance. This distributed selective re-execution (DSRE) protocol permits multiple speculative waves of computation to be traversing a dataflow graph simultaneously, with a commit wave propagating behind them to ensure correct execution. We evaluate one application of this protocol to provide efficient recovery for load-store dependence speculation. Unlike traditional dataflow architectures which resorted to single-assignment memory semantics, the DSRE protocol combines dataflow execution with speculation to enable high performance and conventional sequential memory semantics. Our experiments show that the DSRE protocol results in an average 17% speedup over the best dependence predictor proposed to date, and obtains 82% of the performance possible with a perfect oracle directing the issue of loads.

Artificial Intelligence and Systems Theory: Applied to Cooperative Robots

This paper describes an approach to the design of a population of cooperative robots based on concepts borrowed from Systems Theory and Artificial Intelligence. The research has been developed under the SocRob project, carried out by the Intelligent Systems Laboratory at the Institute for Systems and Robotics - Instituto Superior Técnico (ISR/IST) in Lisbon. The acronym of the project stands both for “Society of Robots” and “Soccer Robots”, the case study where we are testing our population of robots. Designing soccer robots is a very challenging problem, where the robots must act not only to shoot a ball towards the goal, but also to detect and avoid static (walls, stopped robots) and dynamic (moving robots) obstacles. Furthermore, they must cooperate to defeat an opposing team. Our past and current research in soccer robotics includes cooperative sensor fusion for world modeling, object recognition and tracking, robot navigation, multi-robot distributed task planning and coordination, including cooperative reinforcement learning in cooperative and adversarial environments, and behavior-based architectures for real time task execution of cooperating robot teams.

A declarative approach to composing web services in dynamic environments

A recent trend in E-business is the deployment of a variety of web services by product and service vendors to facilitate B2B and B2C E-commerce. To utilize these web services effectively, customer's have to (a) locate each of these services from service directories and retrieve brief service descriptions, (b) analyze service features and evaluate their applicability to the task at hand dynamically, and finally (c) invoke these services in a certain sequence to complete an overall business or personal need. Alternatively, intermediaries execute the aforementioned steps manually and provide a composite service for access from a single service platform. Both these approaches are highly tedious (either for the customer or intermediary) and non-scalable due to the volatility and size of the web. The dynamic nature of the availability and features of web services, real-time requirements on service composition and the large number of alternative combinations of service choices to fulfill a service need makes major demands on the service composition process. This paper presents a novel declarative approach to facilitate dynamic and scalable web service composition called Integrated Service Planning and Execution (ISP&E) based on AI planning techniques. Implementation of an architecture for dynamic web service composition and execution based on a domain-independent AI planning framework called Hierarchical Task Network (HTN) planning is described in this paper. Simulated experiments highlight the effectiveness of our proposed approach which interleaves service composition and execution, to cope with dynamic service capabilities and service volatility.

Mobile robot assistants

This article discusses dependable navigation as a basic feature for operating mobile robots among humans. The importance of each navigation module according to the previously mentioned dependability components and resulting specifications for the development of such modules is analyzed. The technical implementations of dependable localization, path planning, and obstacle avoidance systems are also presented. A discussion on the dependable execution of fetch-and-carry tasks among humans is also provided. The crucial components for accomplishing this task are specified and the requirements for the implementation are developed. A modular control architecture for task planning and execution is described, and a new method for sensor-based object manipulation is introduced. Experimental results including the long-term installation of three entertainment robots in a museum in Berlin and several short-term installations of Fraunhofer IPA's robots, Care-O-bot I and II, are also presented and evaluated.

Seven pitfalls to avoid on the hunt for best practices

A recent US Defense Science Board study recommended the identification and implementation of best practices as a critical need for successful acquisition programs. Practices in this sense go beyond the development-related guidance of the popular Capability Maturity Models, including approaches organizations use to manage others creating software for them under contract. The study identified several traditional project-management practices such as configuration management and risk management, as well as newer practices such as executable architectures and limiting development time.

Arden/J: an architecture for MLM execution on the Java platform.

The Arden Syntax was introduced more than 10 years ago, but it is still not in widespread use. One reason might be that for each particular architecture and information system, a different Arden Syntax compiler must be written as well as a program for the runtime execution of the medical logic modules (MLMs). The authors have designed and implemented an architecture that increases the portability of Arden Syntax rules, using the Java platform. The portability to a target information system is achieved by the addition of appropriate adapter components, which they call mappers. These mappers are dynamically selected using explicit and implicit elements of MLMs. Furthermore, they can help translate data from the clinical information system representation into the representation needed by an MLM. This was validated by an experiment in two clinical units. Also, the authors propose a convention to name signals that trigger other MLMs (called intermediate states) so that they remain unique to each institution. The authors implemented this architecture in their clinical system and in an XML-based medical record application that has been used experimentally in their urology and nephrology departments. The Tetrasys company that provided the medical record was able to incorporate their runtime without modifications, and typical MLM execution time was less than 1 sec.

Adapting Tomasulo's algorithm for bytecode folding based Java processors

A novel processor architecture for hardware execution of Java bytecodes is presented. Stack dependency is resolved by the use of a hardware bytecode folding algorithm coupled with Tomasulo's scheduling algorithm. In this paper, we present a framework for adapting Tomasulo's algorithm for bytecode folding based Java processors. We discuss a set of architectural features that are tailored for Java execution as well as for general-purpose Java-independent codes. A comprehensive example is included to illustrate these features graphically.

The GrADS Project: Software Support for High-Level Grid Application Development

Advances in networking technologies will soon make it possible to use the global information infrastructure in a qualitatively different way—as a computational as well as an information resource. As described in the recent book The Grid: Blueprint for a New Computing Infrastructure, this Grid will connect the nation’s computers, databases, instruments, and people in a seamless web of computing and distributed intelligence, which can be used in an on-demand fashion as a problem-solving resource in many fields of human endeavor—and, in particular, science and engineering. The availability of grid resources will give rise to dramatically new classes of applications, in which computing resources are no longer localized but, rather, distributed, heterogeneous, and dynamic; computation is increasingly sophisticated and multidisciplinary; and computation is integrated into our daily lives and, hence, subject to stricter time constraints than at present. The impact of these new applications will be pervasive, ranging from new systems for scientific inquiry, through computing support for crisis management, to the use of ambient computing to enhance personal mobile computing environments. To realize this vision, significant scientific and technical obstacles must be overcome. Principal among these is usability. The goal of the Grid Application Development Software (GrADS) project is to simplify distributed heterogeneous computing in the same way that the World Wide Web simplified information sharing over the Internet. To that end, the project is exploring the scientific and technical problems that must be solved to make it easier for ordinary scientific users to develop, execute, and tune applications on the Grid. In this paper, the authors describe the vision and strategies underlying the GrADS project, including the base software architecture for grid execution and performance monitoring, strategies and tools for construction of applications from libraries of grid-aware components, and development of innovative new science and engineering applications that can exploit these new technologies to run effectively in grid environments.

A Java/CORBA virtual machine architecture for remote execution of optimization solvers in heterogeneous networks

Virtual machines for remote execution are a useful tool for utilizing light user interfaces and intensive application cores in different physical machines connected through the Internet. In a virtual machine, application cores are distributed in a network. Specific locations, operating systems and hardware characteristics are hidden by virtual machines. They make it possible to use a PC to execute user interfaces and (a few) high-performance computers for application cores. We present a Java/CORBA-based brokerage platform that allows remote execution of optimization solvers from a client running on any platform. The system offers a dynamic library of available problem solvers, and a graphic interface to browse several defined properties and metadata on available solvers. In addition, an embedded file compression module to reduce data transfer time is included as a plug-in feature of the proposed virtual machine. Analogous systems could be constructed for applications in which interaction traffic time is much lower than execution time. Copyright © 2001 John Wiley & Sons, Ltd.

Fast Implementation of Binary Morphological Operations on Hardware-Efficient Systolic Architectures

In this paper we present novel systolic architectures for the fast execution of common morphological operations, that is dilation, erosion, closing, and opening. Their novelty stems from the fact that the same unit, the combined Erosion-Dilation Architecture (EDA), is used to perform either dilation, or erosion, or both of them in parallel (depending on control signals). The proposed architectures show a major advantage on using reduced resources for storing the structuring element (SE), lead to full resource utilization, and provide high processing rates. We concentrate on 1-dim structuring elements and present an improved architecture, that performs dilation and erosion in half the time compared to other architectures, using a workload partitioning technique. Furthermore, the amenability of the EDA to VLSI implementation is exemplified by a processor that performs binary morphological operations with 1 × 3 structuring sets. Finally, we show that the modularity of the proposed architectures allows the direct extension to 2-dim morphology.

A chip-multiprocessor architecture with speculative multithreading

Much emphasis is now being placed on chip-multiprocessor (CMP) architectures for exploiting thread-level parallelism in applications. In such architectures, speculation may be employed to execute applications that cannot be parallelized statically. In this paper, we present an efficient CMP architecture for the speculative execution of sequential binaries without source recompilation. We present software support that enables the identification of threads from a sequential binary. The hardware includes a memory disambiguation mechanism that enables the detection of interthread memory dependence violations during speculative execution. This hardware is different from past proposals in that it does not rely on a snoopy-based cache-coherence protocol. Instead, it uses an approach similar to a directory-based scheme. Furthermore, the architecture includes a simple and efficient hardware mechanism to enable register-level communication between on-chip processors. Evaluation of this software-hardware approach shows that it is quite effective in achieving high performance when running sequential binaries.

Analyzing the execution architecture of mobile phone software with colored Petri nets

Analyzing the execution architecture of mobile phone software with colored Petri nets

Synchronized multimedia for the WWW

We propose temporal extensions to HTML that allow seamless integration of synchronized multimedia into WWW documents. The extensions are based on three concepts: hypertime links for temporal composition, common time bases for close lip-sync synchronization between media objects, and dynamic layout. We have designed a flexible execution architecture to support the concepts and exprimented with play back of simple synchronized presentations.

A behaviour-based blackboard architecture for reactive and efficient task execution of an autonomous robot

Mobile robot control architectures have matured in two major directions: hierarchical and behaviour-based. Behaviour-based architectures enable rapid response to environment changes and they feature robustness in real worlds. Earlier behaviour-based systems have suffered from difficulties in system modularity, state representation and integration of world models. In this paper we present a behaviour-based mobile robot system for task execution. The behaviour model of this system consists of a number of motion behaviours, including reflexes and voluntary motion behaviours, and knowledge acquisition modules providing supporting information. Execution of a task is regarded as a problem-solving process. A blackboard model is introduced to overcome some shortcomings of the behaviour-based architectures, especially concerning modularity and task execution capability. The concept of attention is introduced in the behaviour control, which is more advantageous than the behaviour control mechanisms presented in the literature. Its introduction results in situation-dependent behaviour coordination. For efficient task execution, environment knowledge is maintained in the memory. Task-achieving behaviour is designed to make use of the memory when available.

Top‐down driven architecture design

Argues that senior management must be involved in the IT architecture process in a directly participatory manner. Describes the process of executive architecture design, complete with the essential components of both top‐down and bottom‐up driven architecture. Describes the characteristics of five levels of maturity in the development of IT architectures, from a business competitor’s perspective.

High-speed parallel implementation of a modified PBR algorithm on DSP-based EH topology

Algebraic Reconstruction Technique (ART) is an age-old method used for solving the problem of three-dimensional (3-D) reconstruction from projections in electron microscopy and radiology. In medical applications, direct 3-D reconstruction is at the forefront of investigation. The simultaneous iterative reconstruction technique (SIRT) is an ART-type algorithm with the potential of generating in a few iterations tomographic images of a quality comparable to that of convolution backprojection (CBP) methods. Pixel-based reconstruction (PBR) is similar to SIRT reconstruction, and it has been shown that PBR algorithms give better quality pictures compared to those produced by SIRT algorithms. In this work, we propose a few modifications to the PBR algorithms. The modified algorithms are shown to give better quality pictures compared to PBR algorithms. The PBR algorithm and the modified PBR algorithms are highly compute intensive, Not many attempts have been made to reconstruct objects in the true 3-D sense because of the high computational overhead. In this study, we have developed parallel two-dimensional (2-D) and 3-D reconstruction algorithms based on modified PBR. We attempt to solve the two problems encountered by the PBR and modified PBR algorithms, i.e., the long computational time and the large memory requirements, by parallelizing the algorithm on a multiprocessor system. We investigate the possible task and data partitioning schemes by exploiting the potential parallelism in the PBR algorithm subject to minimizing the memory requirement. We have implemented an extended hypercube (EH) architecture for the high-speed execution of the 3-D reconstruction algorithm using the commercially available fast floating point digital signal processor (DSP) chips as the processing elements (PEs) and dual-port random access memories (DPR) as channels between the PEs. We discuss and compare the performances of the PBR algorithm on an IBM 6000 RISC workstation, on a Silicon Graphics Indigo 2 workstation, and on an EH system. The results show that an EH(3,1) using DSP chips as PEs executes the modified PBR algorithm about 100 times faster than an LBM 6000 RISC workstation. We have executed the algorithms on a 4-node IBM SP2 parallel computer. The results show that execution time of the algorithm on an EH(3,1) is better than that of a 4-node IBM SP2 system. The speed-up of an EH(3,1) system with eight PEs and one network controller is approximately 7.85.

A real-time oriented system for vehicle detection

Starting from the analysis of the specific requirements of automotive on-board equipments, this work presents a system for vehicle detection in a monocular video sequence. The system is composed of a pipeline of two different engines: PAPRICA, a massively parallel architecture for the efficient execution of low-level image processing tasks, improved by the integration of a specific feature for direct data I/O; and a traditional serial architecture running medium-level tasks aimed to the detection of the vehicles' position in the sequence. A preliminary version of the system has been demonstrated on MOB-LAB land vehicle, while a fully optimized one is currently under tuning in laboratory.

Cimosa Model Execution Based on Petri Nets

In this paper, an extended Color Petri net called Control and Integration Net (CIN) is put forward. The proposed CIN method is used as the kernel interpreter for a model execution system. The executed model is built according to the modeling methodologies of the Computer Integrated Manufacturing Open Systems Architecture (CIMOSA). The model execution system's architecture and computational view for the model execution are given. The demonstration system structure for the implementation of the model execution system is also presented.

Encoding of Production Rules in a Connectionist Network

The task of implementing a simple rule-based production system in a connectionist architecture is discussed. To implement a connectionist-based production system, it is essential to be capable of representing explicit rules by means of simple neuronlike computing units. The architecture described here uses a local representation based upon the instance oriented symbolic/connectionist expert system SC net. The problems of variable binding and variable value instantiation are solved in the context of this system. The network is built such that only one value is bound to a variable during each rule firing cycle. Issues regarding serialization and working memory consistency are also solved. An example implementation, the Farmer's Dilemma planning problem, is given to illustrate the potential of this approach. The article shows how many different rule bases may be mapped onto a connectionist architecture for parallel execution.

Resource-bounded sensing and planning in autonomous systems

This paper is concerned with the implications of limited computational resources and uncertainty on the design of autonomous systems. To address this problem, we redefine the principal role of sensor interpretation and planning processes. Following Agre and Chapman's plan-as-communication approach, sensing and planning are treated as computational processes that provide information to an execution architecture and thus improve the overall performance of the system. We argue that autonomous systems must be able to trade off the quality of this information with the computational resources required to produce it. Anytime algorithms, whose quality of results improves gradually as computation time increases, provide useful performance components for time-critical sensing and planning in robotic systems. In our earlier work, we introduced a compilation scheme for optimal composition of anytime algorithms. This paper demonstrates the applicability of the compilation technique to the construction of autonomous systems. The result is a flexible approach to construct systems that can operate robustly in real-time by exploiting the tradeoff between time and quality in planning, sensing and plan execution.