Ethernet Network Interface Card Research Articles

Why Can Some Advanced Ethernet NICs Cause Packet Reordering?

Intel Ethernet Flow Director is an advanced network interface card (NIC) technology. It provides the benefits of parallel receive processing in multiprocessing environments and can automatically steer incoming network data to the same core on which its application process resides. However, our analysis and experiments show that Flow Director cannot guarantee in-order packet delivery in multiprocessing environments. Packet reordering causes various negative impacts. E.g., TCP performs poorly with severe packet reordering. In this paper, we use a simplified model to analyze why Flow Director can cause packet reordering. Our experiments verify our analysis.

HERO: High-speed enhanced routing operation in Ethernet NICs for software routers

Software/open routers, PCs (personal computers) running open-source OSs (operating systems) and equipped with Ethernet network interface cards (NICs), are receiving increasing attention in the research community, because they can offer multi-gigabit-per-second packet forwarding speed, performance comparable to those of low-to-medium end commercial routers. However, commercially available NICs lack programmability. Furthermore, the use of standard NICs implies that each packet crosses the bus twice, and is processed and routed in software by the OS, thus reducing forwarding performance. In this paper, we discuss the design and the implementation of an FPGA-based NIC that permits overcoming the performance bottleneck and the lack of flexibility of commercial NICs. Performance and limitations of the proposed approach are thoroughly discussed.

Performance of 1 and 10 Gigabit Ethernet cards with server quality motherboards

System administrators often assume that just by plugging in a Gigabit Ethernet Interface, the system will deliver line rate performance; sadly this is not often the case. The behaviour of various 1 and 10 Gigabit Ethernet Network Interface cards (NICs) has been investigated using server quality motherboards. The latency, throughput, and the activity on the PCI buses and Gigabit Ethernet links were chosen as performance indicators. The tests were performed using two PCs connected back-to-back and sending UDP/IP frames from one to the other. This paper shows the importance of having a good combination of memory and peripheral bus chipset, Ethernet Interface, CPU power, good driver, and operating system designs and proper configuration to achieve and sustain gigabit transfer rates. With these considerations taken into account, and suitably designed hardware, transfers can operate at gigabit and multi-gigabit speeds. Some recommendations are given for high performance data servers.

Isolating the performance impacts of network interface cards through microbenchmarks

Many factors can prevent a Gigabit Ethernet network interface card (NIC) from achieving line rate in a modern web server. In fact, the various commercially available NICs have different performance characteristics that lead to throughput differences for actual web servers. For example, Figure 1 shows the performance achieved by the thttpd web server for client traces extracted from the Rice University computer science department (CS), a NASA web site (NASA), and the 1998 soccer World Cup tournament (World Cup). The latter two traces are available from the Internet Traffic Archive (http://ita.ee.lbl.gov/). The server system tested includes an AMD Athlon 2600+ XP processor running the FreeBSD 4.7 operating system, 2 GB of DDR SDRAM, a 64-bit/66 MHz PCI bus, and a single 40 GB IDE disk (none of the workloads are disk intensive). The tested systems differ only in their NIC, with the Intel Pro-1000/MT Server and Desktop, Alteon AceNIC with parallelized firmware [2], Netgear GA622T, 3Com 3C996B, and Alteon AceNIC with released firmware arranged from left to right. There are substantial performance differences across the NICs in the web environment, as the fastest NIC consistently achieves 40–60% more throughput than the slowest. A web server interacts with the network in two primary ways: receiving client HTTP requests and sending HTTP responses. Requests are typically quite small, on the order of 200 bytes of ASCII text, while responses vary from empty files to several hundred megabytes. Since web clients and servers communicate using TCP, the server must acknowledge requests, leading to minimum-sized (64-byte) Ethernet frames. Response data must be segmented and encapsulated in Ethernet frames, which allow up to 1460 bytes of TCP content in a maximum-sized (1518-byte) frame. Then, those segments are sent out according to TCP flow control policies based on the receipt of acknowledgments. A high-performance server NIC must thus support data volumes dominated by sends of large

High‐speed bulk data transfer architecture for Gbit/s throughput

AbstractWhen bulk data is transferred between end hosts over an IP network, a known problem is the limited throughput obtained at the application level due to the memory copy processing load between the kernel buffer and the user buffer depending on the operating system. To solve this problem, in this paper we propose a high‐speed bulk data transfer architecture called Network Direct Memory Access (Network DMA) and describe its design, implementation, and test results. The purpose of Network DMA is to be a transport function installed on a network interface card (NIC) and to achieve high‐speed and reliable data transfers over a network between the user buffers of the end hosts without requiring operating system‐specific processing. An application will use the data transfer function provided by a new interface capable of directly specifying the send destination host and the target transfer buffer. Based on the proposed architecture, we developed a 622‐Mbit/s ATM NIC and Gigabit Ethernet NIC incorporating the Network DMA. The ATM NIC we developed achieved a continuous transfer throughput of 540 Mbit/s (99% bandwidth usage efficiency at the application level) in data transfer tests between general‐purpose PCs. The Gigabit Ethernet NIC achieved an 800 Mbit/s continuous transfer throughput. © 2003 Wiley Periodicals, Inc. Electron Comm Jpn Pt 1, 86(11): 57–65, 2003; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/ecja.10107

Testing ethernet networks for the ATLAS data collection system

This paper reports recent work on ethernet traffic generation and analysis. We use gigabit ethernet network interface cards (NICs) running customized embedded software and custom-built 32-port fast ethernet boards based on field programmable gate arrays (FPGAs) to study the behavior of large ethernet networks. The traffic generation software is able to accommodate many traffic distributions with the ultimate goal of generating traffic that resembles the data collection system of the ATLAS experiment at CERN, Geneva, Switzerland. Each packet is time stamped with a global clock value and, therefore, we are able to compute an accurate measure of the network latency. Various other information collected from the boards is displayed in real time on a graphical interface. This work provides the tools to study a test bed representing a fraction of the 1600 ATLAS detector readout buffers and 600 Level 2 trigger central processing units (CPUs) using a combination of the fast ethernet boards and the gigabit ethernet NICs.

Cable: it's not just for TV

Hybrid fiber-coaxial-cable systems can download data from the Internet at up to 30 Mb/s while also carrying multiple telephone channels and broadcast radio and TV signals-both analog and digital. This paper concentrates on single-access technology-cable modems. The cable modem packs the Internet data in the form of 10BASE-T frames, which are fed over an Rj-45 connection to the Ethernet network interface card (NIC) in a computer. The phone connections at the cable modem are for Internet protocol (IP) telephony, which has yet to come to residences in a big way. The connection between a cable modem and the Internet is packet-switched and so the link is always active. The standards for cable modems are discussed as is the sending of digitised voice over a packetised system.

Pressure-tolerant network interface cards for sensor arrays

Pressure-tolerant ATM and Ethernet network interface cards (NICs) were developed for towed array data acquisition and telemetry. The card functions include sensor signal conditioning, analog-to-digital conversion, network protocol processors, and network interface transceivers. Design and fabrication techniques were developed to achieve space constraints, power constraints, and operation at 2500-psi pressure in oil or saltwater submersion without the use of pressure vessel housings. The development included the testing of candidate electronic components and NIC assemblies for pressure, temperature, and oil tolerance. Components and assemblies which failed testing were analyzed, and design rules were established for future designs. Generally, the elimination or minimization of voids by proper component selection and fabrication was found to be critical. Pressure-tolerant fabrication techniques were developed such as temperature cycle screening, encapsulation in low-viscosity polyurethane, pressurized curing, and compression sealed wires. High-density printed circuit boards and minimalist circuit designs were used to minimize NIC size. Low-voltage components, selective component location, and thermally conductive packaging were used to minimize operating temperatures. Commercially available components and open standard interfaces were used to minimize costs.