Trench Etching Research Articles

Micromachining applications of porous silicon

Besides its exciting electro-optical properties, porous silicon shows some interesting features for micromechanical applications. Owing to the doping sensitivity of the porous silicon formation, a wide range of pore and crystallite sizes can be formed easily. Because of their high aspect ratio, macropores from n-type silicon can be used for the etching of trenches or vias into the wafer. Mesoporous silicon created from heavily doped silicon has a smooth surface suitable for further thin-film processes, such as silicon nitride and carbide deposition, to be performed on it. In the smallest size range, nanostructures are formed with structure sizes beyond 10 nm without electron-beam lithography. Another important point is the high surface-to-volume ratio. After impregnation of the porous layer with a catalyst, it can be applied in gas and humidity sensors. For the most common micromachining applications, free-standing membranes, cantilevers and bridges are needed. In contrast to the surface micromachining method, where a thin film of silicon dioxide (< 10 μm) is dissolved as a sacrificial layer, by means of porous silicon technology, thick sacrificial layers can be produced (up to 100 μm). This results — after their dissolution — in a high distance of membranes and bridges to the bulk silicon, which is an important aspect for the sensitivity of thermal transducers. The capabilities of porous silicon application in micromachining will be demonstrated by some examples, e.g. thin-film bolometers and polysilicon hot-wire anemometers.

Scaling of Si and GaAs trench etch rates with aspect ratio, feature width, and substrate temperature

The scaling of etch rates with feature dimensions is an important issue in the fabrication of microelectronic and photonic devices. Because etch rates depend on circuit layouts and design rules, considerable effort is spent to modify processes each time changes in design are made. Knowing how etch rates scale with design parameters should accelerate the introduction of new designs into manufacturing while minimizing the cost of doing so. Recently it has been shown that etch rates for a variety of conditions scale with the depth/width or aspect ratio and not on width or depth alone. While various mechanisms might be responsible for such scaling, isolating one mechanism from another is not straight forward. Nonetheless, it is important to understand the underlying mechanisms so that differences in etch chemistry and etch reactor design can be accounted for when scaling plasma processes from one design or reactor to another. To assess the effects of etch chemistry alone, the trench etch rates of Si and GaAs are compared under constant plasma conditions. Substrate temperature is varied to further assess the relative importance of surface vs transport phenomena during the etching process. At higher temperatures, both Si and GaAs trench etch rates scale only with aspect ratio in an Ar/Cl2 electron cyclotron resonance plasma. The results are consistent with an ion-neutral synergy model based on Langmuir adsorption kinetics where the scaling can be explained by the aspect ratio dependence of the neutral reactant transport into the trench: charging effects, ion shadowing, and Knudsen transport are not consistent with the data. At −45 °C, the etch rate no longer scales with aspect ratio alone, but now also depends on trench width. The data at this lower temperature are well described by a model incorporating the deposition of an etch inhibiting layer. While the trench etch rates for GaAs and Si scale in similar ways with aspect ratio and trench width, the dependence on feature dimensions of the Si etch rate is much stronger than that for GaAs at all substrate temperatures because the steady-state surface coverage of Cl is smaller for Si. This results in a greater sensitivity to the incoming, aspect ratio dependent, neutral fluxes. The implications of the models on the goal of aspect ratio independent etching are also discussed.

Study of silicon etching in CF4/O2 plasmas to establish surface re-emission as the dominant transport mechanism

This article describes an investigation of the etching of polysilicon in a CF4/O2 plasma. The ‘‘undercut’’ observed in etch profiles is related to the surface transport of reaction precursors. The possible mechanisms for this transport include surface re-emission and surface diffusion of the precursors. Simulations of profile evolution, conducted with both mechanisms, are compared with experimental results. The surface reemission simulations are found to predict experimental profile evolution accurately, whereas surface diffusion simulations require unphysical values for the surface diffusion length. Novel test structures have been fabricated and etched under the same conditions as used for trench etching. Surface re-emission simulations accurately predict the etch rate deep inside the shadowed cavity of different structures. On the other hand, simulations assuming surface diffusion to be dominant do not capture even the qualitative trends in test structure etching. This is strong evidence that surface re-emission is the dominant mechanism for transport of etch precursors in CF4/O2 plasmas.

Offset Trench Isolation

Feasibility of a new, recessed isolation technique that utilizes an offset, shallow trench in combination with thermal oxidation for achieving near zero final encroachment with excellent planarity is demonstrated. Etch of the shallow trench is offset from the original hardmask by an oxide sidewall spacer. After trench etch, HF is used to remove the hardmask oxide and sidewall spacers and to form a cavity which is self‐aligned to the nitride edge. Exposed silicon regions are then reoxidized and encapsulated with polysilicon. Field oxide is then grown. The final field oxide profile exhibits steep sidewall angles without inducing substrate defects as evidenced by low diode leakage. Other isolation sensitive device parametrics such as gate oxide quality and metal oxide semiconductor field effect transistor threshold voltage stability are presented and exhibit good characteristics.

Silicon trench etching in a multi-frequency discharge reactor

In this work we investigated dry etching of the trench structures in a gas CCl 2F 2 in a multi-frequency discharge reactor. The influence of the changes of the etching parameters (low and high frequencies, power and pressure) on the etching process properties (etch rate and selectivity) was investigated. Using a planar diode system with low frequency, 10–100 kHz, applied to the work support and high frequency, 13.56 MHz, to the facing electrode, Si etch rates of 400 nm min − were achieved with selectives of >100:1 for silicon oxide.

Analytic models for plasma-assisted etching of semiconductor trenches

The etching of semiconductor wafers is modeled for etching by radicals (isotropic etching) and etching by both radicals and vertically incident cold ions (anisotropic etching) in a glow-discharge plasma. Explicit analytical expressions for evolving two-dimensional etched surfaces are found by the method of characteristics. These parametric relations are expressed in terms of the position along the initial exposed wafer surface. Exact surface equations are given for the radical etching with two different ansatz for the evolution equation. The superposition of radical etching and etching due to vertically incident, bombarding ions is solved by approximate analytical expressions for the etched surface. Two-dimensional etched surfaces are displayed graphically for various times.

Intrinsic and Passivation‐Induced Trench Tapering during Plasma Etching

Sidewall tapering is often observed during plasma trench etching. In this paper, two types of trench tapering, intrinsic tapering and passivation‐induced tapering, are discussed based on numerical simulations and theory of surface evolution. Intrinsic tapering occurs when the etch rate decreases rapidly as the slope angle θ approaches that of the vertical surface (i.e., ). It is the dominant mechanism for the formation of tapered sidewalls when the sticking coefficient ℒ is small. For a larger sticking coefficient, passivation‐induced tapering becomes more dominant. Quantitative relations between etched trench profiles and some system parameters such as sticking coefficients, etch rates, and re‐emission distributions are also presented.

Reactive ion etching (RIE) techniques for micromachining applications

Abstract Plasma etching is important for the fabrication of micromechanical structures in silicon with fine feature size. In this paper two reactive ion etching (RIE) processes for given micromachining applications are described. The first is a multi-step RIE process for patterning of polysilicon/silicon nitride/polysilicon sandwiched structural layers, while stopping on the lower polysilicon layer. The first step of the process involves etching the top polysilicon layer using a gas mixture of 70 sccm CF4 + 10 sccm SF6 + 10 sccm O2. Then the gas mixture is changed, in situ, to 5 sccm CHF3+45 sccm N2 as the second step in order to etch the nitride layer, with an etching selectivity of 15 for nitride over the polysilicon and improved uniformity in the nitride etching. Therefore, the top two layers of the sandwich structure can be etched with good uniformity with the two-step process, while the integrity of the lower polysilicon layer is maintained. The second is a silicon trench etching process for applications involving refill with selective epitaxial growth (SEG) silicon, using 210 sccm CF4 with 10 sccm Cl2 addition. Crystal silicon can be etched anisotropically with vertical sidewall using this chemistry. It was found that by adding 10 sccm Cl2, both the etch rate and sidewall profile of the silicon trench are improved. Photoresist is shown to be essential to provide sufficient polymer-forming reaction product for sidewall protection. However, when the Cl2 addition exceeds 50 sccm, bowing and crevices appear in the sidewall profile.

Tungsten trench etching in a magnetically enhanced triode reactor

The problem of polymer contamination in W trench etching is studied for fluorocarbon plasmas. Polymer contamination of narrow trenches has been observed on samples where isolated positive-relief structures (mesas) are clean. This effect is linked to sidewall sputtering by ions backscattered at low angles from the substrate: the sidewalls of a mesa are bombarded by reflected ions originating over a larger area of the substrate than the sidewalls of a trench. The presence of a blast of backscattered ions is confirmed (in an SF6/Br2 plasma) by images where sidewalls adjacent to large substrate areas etch isotropically while those in the shadow of an adjacent feature etch anisotropically. Finally, it is shown that ultrathin, durable polymer coatings which protect mesa sidewalls without contaminating nanometer-scale trenches can be formed in a magnetically enhanced, triode etching system using a CF4/O2 source gas: 40 nm wide, 300 nm deep trenches are shown.

Characterization of the cell leakage of a stacked trench capacitor (STT) cell

The cell leakage of a stacked trench capacitor (STT) cell has been investigated. The major leakage mechanisms of the STT are trench-to-trench leakage, trench junction leakage, and LOCOS isolation leakage. It is shown that compared to a conventional trench capacitor, the trench-to-trench leakage current is reduced and high punchthrough voltage is obtained. Therefore, the trench-to-trench spacing can be reduced 0.1 /spl mu/m shorter than that of the trench capacitor. These reductions result from the STT structure itself. The surface leakage current, which is the dominant leakage current in the trench capacitor, does not flow in the STT. This paper also describes the effect of the sidewall damage caused by trench etching on the trench junction leakage. Reactive ion etching (RIE) produces deep levels just beneath the trench surface. But, the trench junction of the STT is not influenced by these deep levels because the trench surface is covered by a n/sup -/diffused layer. This paper also investigates the relationship between the cell leakage and the retention time. At DRAM operation temperatures, LOCOS isolation leakage is dominant rather than trench junction leakage. Therefore, the deeper trench can increase the storage capacitance and improve the retention time. >

Highly anisotropic selective reactive ion etching of deep trenches in silicon

Abstract Reactive ion etching (RIE) of single crystal silicon using a gas mixture of SF 6 and C 2 Cl 3 F 3 in parallel plate electrode reactor was investigated. A detailed study of etching characteristics as functions of gas composition, rf power, pressure, self-bias voltage was performed. The results were explored in order to optimize deep trench RIE process. The optimized process resulted in a high etch rate, a good selectivity silicon-to-photoresist, a high anisotropy, a nearly vertical etch profile, and smooth surface morphology. This process was successfully used to fabricate silicon preforms for a replication technology of polymer-based devices.

Influence of reactant transport on fluorine reactive ion etching of deep trenches in silicon

The reactive ion etching of silicon by fluorine in high-aspect ratio features was modeled to assess the relative importance of reactant transport on etching rate at the bottom of rectangular trenches. The flux of ions to the feature bottom was found by summing two components: ions arriving directly from the plasma and ions reflected from the sidewalls before reaching the bottom. The transport of neutral reactants within the feature was modeled with diffuse scattering and reaction rates following the kinetics reported by Gray et al. [J. Vac. Sci. Technol. B 11, 1243 (1993)] at all surfaces. The etching rate was found to depend most strongly upon the ion flux under typical process conditions, because of relatively low fluorine reaction probability and low reactant depletion within the feature. Reactant transport limitations are expected to be more important under conditions of low fluorine to ion flux ratio, high-substrate temperature, and high-ion energy.

Effect of ion angular distributions on microloading in oxygen reactive-ion etching of submicrometer polymer trenches

The etch rate of the resist by energetic reactive ions (O+, O+2) from a 13.56 MHz plasma was studied as a function of the aspect ratio. Using a trilevel sequence, submicrometer grooves with widths of 500, 200, 100, and 50 nm are etched with an oxygen rf plasma in a parallel-plate reactor. Pattern transfer into the polymer photoresist proceeds via a thin silicon nitride mask. With increasing aspect ratio a decrease in etch rate is observed for increasing etch time resulting in a diminished etch depth for small width grooves. This effect is commonly called microloading and its origin is subject to many discussions. With the assumption that lower local etch rates are caused by the characteristics of particle fluxes entering the structures it is necessary to consider the ion energy distributions and the ion angular distributions of O+ and O+2 emerging from the oxygen rf plasma bombarding the surface to be structured. The measurement of ion angular impact energy distributions of O+ and O+2 is performed in an apparatus simulating a parallel-plate rf reactor. Through a small orifice in the rf-powered electrode ions are sampled and are analyzed in a quadrupole mass spectrometer equipped with an energy filter. Tilting the detection system with the vertex lying in the orifice, mass selected ion energy distributions are measured at each angle. O+2 energy distributions consist of the well-known peaked structures caused by charge-exchange collisions in the plasma sheath. The angular distributions are characterized by mace-shaped structures with an angular width of about 2° accompanied by wings with intensity maxima at about ±2° for most of the experimental conditions considered. O+ energy distributions consist of bimodal split high-energy peaks and continuous intensities between 50 eV and the maximal energy defined by the potential drop across the sheath. The angular distributions of the high-energy O+ ions have widths between 2° and 6° while the continuous part of the ion energy distributions exhibits angular widths between 7° and 11°. The phenomena observed in the ion energy distributions and ion angular distributions are a result of scattering mechanisms of ions with O2 parent gas molecules in the plasma sheath. The experimental ion angular distributions are used to model the effect of lower local etch rates. Assuming that direct impingement of particles onto the bottom surface of a structure is the dominant ablation mechanism it is possible to correlate the effect of lower local etch rates with the angularly broadened flux of O+ ions.

Anisotropic etching of deep trench for silicon monolithic microwave integrated circuit

The anisotropic etching of deep trenches in bulk Si for isolating global buried collectors in Si monolithic microwave integrated circuits has been successfully developed with SF6/C2CIF5 gas mixtures. Using photoresist as the etching mask, deposition of polymer thin film on the sidewalls of the trench occurred, hence inhibiting lateral etching and made the process anisotropic. Under optimal processing conditions, an etching anisotropy of 0.98 and an etching selectivity of silicon to photoresist higher than 28 were observed.

Resonant inductive plasma etching evaluation of an industrial prototype

The development of the resonant inductive plasma etcher was undertaken in order to satisfy the ultra large scale integrated manufacturing requirements. We present in this article an evaluation of this equipment, based upon test processes as support for pointing out the specific advantages and limitations of the reactor. Plasma chemistries such as SF6 and HBr have been studied. Silicon trench etching and polysilicon gate etching results are reported. Studies have been made at both low-pressure range (1 μbar), and at higher pressure range (7 μbar), even though the equipment was not optimized for this operating pressure range. We present successful results for polysilicon gate etching at low pressure; whereas for trench etching, we show that a higher pressure is more suited to satisfying the requirements of such a process.

SOI pressure sensor

Abstract A single-crystal silicon piezoresistor has a high sensitivity to strain but has the problem of leakage at the pn junction at elevated temperatures. This usually limits the applications of these devices to less than ≈ 150 °C. This paper presents a technique for fabricating a single-crystal silicon-on-oxide (SOI) pressure sensor for high-temperature applications. The SOI structure is formed from the substrate by a combination of trench etching and anisotropic etching techniques. The desired SOI island is under-etched using an anisotropic etch and then separated from the substrate by an oxidation step. The problems associated with etching convex corners have been avoided by using two trench etchings. The remaining cavities are refilled by polysilicon deposition. By using this technique, a good-quality single crystal can be achieved, without requiring lengthy or expensive processing.

Low temperature etching of silicon trenches with SF6 in an electron cyclotron resonance reactor

Trenches were etched in silicon with SF6 in an electron cyclotron resonance reactor. Etch rate and etch anisotropy were increased with radio-frequency substrate bias. Etch anisotropy was also improved by lowering the temperature of the substrate to −100 °C. Optical emission spectroscopy was used to measure the concentration of free fluorine in the plasma stream. Etch rate measurements were correlated to fluorine concentrations.

Pd/Si plasma immersion ion implantation for selective electroless copper plating on SiO2

Selective deposition of copper in SiO2 trenches has been carried out using Pd/Si plasma immersion ion implantation and electroless Cu plating. To form the seed layer for electroless Cu plating on SiO2, sputtered Pd and Si atoms were partially ionized by the Ar plasma and then deposited at bottoms of SiO2 trenches; Ar ion beam was then applied to assist the mixing of the deposited Pd/Si films with the SiO2 substrate by recoil implantation. We found a threshold Pd dose of 2×1014/cm2 is required to initiate the electroless plating of Cu. By careful control of the anisotropic etching of the oxide trenches and proper choice of the Pd dose, 1-μm wide Cu filled lines with flat surfaces suitable for planarized multilevel metallization were successfully fabricated.

Silicon trench undercutting caused by the preferential plasma etching of surface-implanted-regions

It is shown that the residual surface damage present in heavily implanted n/sup +/ regions causes severe undercutting during the reactive ion etching (RIE) of silicon trenches in a SiCl/sub 4/-N/sub 2/ plasma. The trench sidewall undercutting was not observed when the trenches were etched in unimplanted silicon wafers. For specific implant does of arsenic and phosphorus, optimal thermal activation cycles were identified that resulted in negligible trench undercutting. The trench undercutting profiles traced the n/sup +/ junction profiles and the undercutting was more pronounced in phosphorus-implanted samples.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

新しい表面反応モデルを取り入れたドライエッチングシミュレーション

A new macroscopic surface reaction model, which takes into account the adsorbed particle layer on the substrate, has been developed to calculate topological deformations in dry-etching microfabrication processes. The model is applied to silicon-dioxide trench etching. The following several kinds of reactions are well simulated on the basis of the unified surface reaction model. The first is the phenomenological differences between reaction-rate-limited and transport-limited cases in thermally induced chemical reaction. The second is a vertical profile formation of trench structures. This is based on the balance among chemical reactions, ion-assisted etching and polymer deposition on the side wall of trenches.