Error-correcting Codes Research Articles

Asynchronous verifiable information dispersal protocol of achieving optimal communication

The evolution of distributed systems necessitates robust protocols to facilitate secure and efficient data storage and retrieval amid challenges like asynchronous communication and adversarial threats. However, achieving the theoretical lower bounds of communication cost in Asynchronous Verifiable Information Dispersal (AVID) protocols remains an unresolved issue, prompting the need for innovation in this domain.In this paper, we propose a new AVID protocol designed to optimize communication cost. In contrast to previous approaches, we leverage vector commitment (VC) technology combined with erasure codes, replacing conventional hash tree structures or error correction codes. This approach results in significant O(logn) communication savings. Additionally, our research reveals that while ensuring simultaneous output from all honest nodes is desirable to satisfy Totality, it is not necessary for all nodes to receive corresponding shares or proofs during the Dispersal phase. This insight allows us to circumvent the common O(n2κ) communication overhead.Our AVID protocol achieves an optimal dispersal cost of O(|M|+n2) compared to the prior best of O(|M|+κn2). Furthermore, each node in our protocol incurs a storage cost of O(|M|/n+κ) bits, while the retrieval cost per client is O(|M|+nκ).

Characterizing and Optimizing LDPC Performance on 3D NAND Flash Memories

With the development of NAND flash memories’ bit density and stacking technologies, while storage capacity keeps increasing, the issue of reliability becomes increasingly prominent. Low-density parity check (LDPC) code, as a robust error-correcting code, is extensively employed in flash memory. However, when the RBER is prohibitively high, LDPC decoding would introduce long latency. To study how LDPC performs on the latest 3D NAND flash memory, we conduct a comprehensive analysis of LDPC decoding performance using both the theoretically derived threshold voltage distribution model obtained through modeling (Modeling-based method) and the actual voltage distribution collected from on-chip data through testing (Ideal case). Based on LDPC decoding results under various interference conditions, we summarize four findings that can help us gain a better understanding of the characteristics of LDPC decoding in 3D NAND flash memory. Following our characterization, we identify the differences in LDPC decoding performance between the Modeling-based method and the Ideal case. Due to the accuracy of initial probability information, the threshold voltage distribution derived through modeling deviates by certain degrees from the actual threshold voltage distribution. This leads to a performance gap between using the threshold voltage distribution derived from the Modeling-based method and the actual distribution. By observing the abnormal behaviors in the decoding with the Modeling-based method, we introduce an Offsetted Read Voltage ( Δ RV) method, for optimizing LDPC decoding performance by offsetting the reading voltage in each layer of a flash block. The evaluation results show that our Δ RV method enhances the decoding performance of LDPC on the Modeling-based method by reducing the total number of sensing levels needed for LDPC decoding by 0.67% to 18.92% for different interference conditions on average, under the P/E cycles from 3000 to 7000.

The Timing of Gaze Direction Perception: ERP Decoding and Task Modulation

Distinguishing the direction of another person's eye gaze is extremely important in everyday social interaction, as it provides critical information about people's attention and, therefore, intentions. The temporal dynamics of gaze processing have been investigated using event-related potentials (ERPs) recorded with electroencephalography (EEG). However, the moment at which our brain distinguishes the gaze direction (GD), irrespectively of other facial cues, remains unclear. To solve this question, the present study aimed to investigate the time course of gaze direction processing, using an ERP decoding approach, based on the combination of a support vector machine and error-correcting output codes. We recorded EEG in young healthy subjects, 32 of them performing GD detection and 34 conducting face orientation tasks. Both tasks presented 3D realistic faces with five different head and gaze orientations each: 30°, 15° to the left or right, and 0°. While the classical ERP analyses did not show clear GD effects, ERP decoding analyses revealed that discrimination of GD, irrespective of head orientation, started at 140 ms in the GD task and at 120 ms in the face orientation task. GD decoding accuracy was higher in the GD task than in the face orientation task and was the highest for the direct gaze in both tasks. These findings suggest that the decoding of brain patterns is modified by task relevance, which changes the latency and the accuracy of GD decoding.

Optimized wireless communication for 6G signal processing using memory‐augmented deep unfolding network

SummaryIn this manuscript, optimized wireless communication for 6G signals processing using memory‐augmented deep unfolding network (WC‐6G‐SP‐MADUN) is proposed. The aim of this work is to give a memory‐augmented deep unfolding network approach with a focus on belief propagation decoding of error correction codes and multiple‐input multiple‐output (MIMO) wireless systems. In contrast, compares and tabulates the performance of memory‐augmented deep unfolding methodologies with classic principled procedures, which could potentially enable 6G. Here, the wireless communication for 6G signal processing methods was used for a variety of receiver functions, including self‐interference cancelation, signal estimation and detection using memory‐augmented deep unfolding Network (MADUN), and advanced error correction by clouded leopard optimization algorithm (CLOA). Furthermore, outline the general framework of memory‐augmented deep unfolding method for any kind of signal processing application and talk about cutting edge research paths that will make it possible to build communication networks in the future. The proposed approach is implemented in MATLAB; the performance is analyzed with performance metrics such as reliability, complexity, SNR gain, convergence rate, hardware efficiency, and quantization bit width. The proposed approach attains higher SNR gain 17.96%, 24.75%, and 30.09%; lower complexity 17.92%, 23.41%, and 30.13%; and higher convergence 18.01%, 25.41%, and 31.39% when analyzed with existing techniques such as redefined wireless communication for 6G: signal processing meets deep learning and deep unfolding (RWC‐6G‐SP‐DU), lower complication deep unfolded neural network receiver for MIMO under probability data association detector (LC‐DUNN‐MIMO‐PDAD), and deep learning in physical layer communications: evolution with prospects on 5G and 6G networks (DL‐PLC‐6G), respectively.

Fuzzy Tree t -Spanners of Ratio Labelled Butterfly Network

Background/Objectives: The reliability and optimality of a communication system depend on the network that has a minimum distance. The minimum distance is the shortest path between the vertices. Even in error correction codes, the minimum Hamming distance ensures data integrity. Hence to have efficient routing protocols, the network is preferred to be a spanning tree that connects all the nodes of the communication system. As tree t- spanner is the optimization technique in determining minimum spanning tree, finding tree t-spanners of a ratio labelled fuzzy graph for the Butterfly network BF(n) is notion of this study. Methods: This study has introduced a new labelling called Ratio Labelling (RL) for examining the fuzziness in a crisp graph. Using the RL method, the crisp graphs were examined for the admittance of fuzziness and were thereby found, to have a tree t-spanners of ratio labelled fuzzy graphs. Findings: The quality of a network can be measured using the stretch factor of the network. The issues of network survival or link failures in a communication networks can be rectified by approximating the best flow spanner. As the optimal connectivity between the nodes is ensured by interconnection networks, the fuzzy tree t- spanners of undirected fuzzy Butterfly Network BF(n) are examined by labelling the vertices and edges using ratio labelling. The Breadth First Search (BFS) algorithm enhances the process of minimizing the spanning tree for an unweighted graph. Since the edge weightage is unique for all the edges of BF(n) under RL, searching for an edge with minimum weight by Kruskal’s algorithm or Prim’s algorithm are less meaningful. Hence, the BFS algorithm is adopted in finding the spanning tree T of Ratio Labelled BF(n). The bounds for the stretch factor t of a fuzzy tree t- spanner of ratio labelled BF(n) were obtained. Novelty: The literature survey shows that various classes of graphs were examined for the admissibility of tree t-spanners. Finding a tree t-spanner for a fuzzy graph was not found in literature, as per our knowledge. Extending the problem of finding a tree t -spanner of a ratio labelled fuzzy graph is an advancement in the field of fuzzy graphs. Keywords: Fuzzy Graph, Fuzzy distance, Ratio Labelling, Tree t- spanner, Butterfly Network

Secure ECDSA SRAM-PUF Based on Universal Single/Double Scalar Multiplication Architecture.

Physically unclonable functions (PUFs) are crucial for enhancing cybersecurity by providing unique, intrinsic identifiers for electronic devices, thus ensuring their authenticity and preventing unauthorized cloning. The SRAM-PUF, characterized by its simple structure and ease of implementation in various scenarios, has gained widespread usage. The soft-decision Reed-Muller (RM) code, an error correction code, is commonly employed in these designs. This paper introduces the design of an RM code soft-decision attack algorithm to reveal its potential security risks. To address this problem, we propose a soft-decision SRAM-PUF structure based on the elliptic curve digital signature algorithm (ECDSA). To improve the processing speed of the proposed secure SRAM-PUF, we propose a custom ECDSA scheme. Further, we also propose a universal architecture for the critical operations in ECDSA, elliptic curve scalar multiplication (ECSM), and elliptic curve double scalar multiplication (ECDSM) based on the differential addition chain (DAC). For ECSMs, iterations can be performed directly; for ECDSMs, a two-dimensional DAC is constructed through precomputation, followed by iterations. Moreover, due to the high similarity of ECSM and ECDSM data paths, this universal architecture saves hardware resources. Our design is implemented on a field-programmable gate array (FPGA) and an application-specific integrated circuit (ASIC) using a Xilinx Virtex-7 and an TSMC 40 nm process. Compared to existing research, our design exhibits a lower bit error rate (2.7×10-10) and better area-time performance (3902 slices, 6.615 μs ECDSM latency).

VSD: A Novel Method for Video Segmentation and Storage in DNA Using RS Code

As data continue to grow in complexity and size, there is an imperative need for more efficient and robust storage solutions. DNA storage has emerged as a promising avenue to solve this problem, but existing approaches do not perform efficiently enough on video data, particularly for information density and time efficiency. This paper introduces VSD, a pioneering encoding method for video segmentation and storage in DNA, leveraging the Reed–Solomon (RS) error correction code. This method addresses these limitations through an innovative combination of segmentation and encoding, accompanied by RS coding to bolster error resilience. Additionally, the method ensures that the GC-content of the resultant DNA sequences remains around 50%, which further enhances the storage robustness. The experimental results demonstrate the method has commendable encoding efficiency and offers a solution to the prevailing issue of time inefficiency and error correction rates in DNA storage. This groundbreaking approach paves the way for the practical and reliable storage of large-scale video data in DNA, heralding a new era in the domain of information storage.

Bilateral fault-tolerant qudit teleportation in multi-hop quantum networks

In this paper, we present one general fault-tolerant multi-hop teleportation scheme for arbitrary unknown qudit system, exploring a strategy for distilling high-dimensional EPR pairs within the operational errors channel, where the introduced auxiliary pairs don’t have to be in high-fidelity. These errors can be detectable and traceable in quantum networks, promising that the accumulation of the operational errors can be rectified by the final receiver during the teleportation, avoiding the error correction implemented by the intermediate nodes. Moreover, we extend the strategy to the non-maximally entangled EPR channels. In the end, we discuss the potential strategy to improve our scheme including eliminating the encoding step for the error correction codes. Even through the operational errors may occur at the repeater nodes, the performance analysis demonstrates that the scheme significantly preserves the valuable entangled resources and reduces the operational complexity, illustrating the robustness to against the operational errors in repeater nodes.

Set-Coloring Ramsey Numbers via Codes

For positive integers 𝑛, 𝑟, 𝑠 with 𝑟 > 𝑠, the set-coloring Ramsey number 𝑅(𝑛; 𝑟, 𝑠) is the minimum 𝑁 such that if every edge of the complete graph 𝐾𝑁 receives a set of 𝑠 colors from a palette of 𝑟 colors, then there is guaranteed to be a monochromatic clique on 𝑛 vertices, that is, a subset of 𝑛 vertices where all of the edges between them receive a common color. In particular, the case 𝑠 = 1 corresponds to the classical multicolor Ramsey number. We prove general upper and lower bounds on 𝑅(𝑛; 𝑟, 𝑠) which imply that 𝑅(𝑛; 𝑟, 𝑠) = 2Θ(𝑛𝑟) if 𝑠/𝑟 is bounded away from 0 and 1. The upper bound extends an old result of Erdős and Szemerédi, who treated the case 𝑠 = 𝑟 − 1, while the lower bound exploits a connection to error-correcting codes. We also study the analogous problem for hypergraphs.

Engineering 3D Floquet Codes by Rewinding

Floquet codes are a novel class of quantum error-correcting codes with dynamically generated logical qubits arising from a periodic schedule of noncommuting measurements. We utilize the interpretation of measurements in terms of condensation of topological excitations and the rewinding of measurement sequences to engineer new examples of Floquet codes. In particular, rewinding is advantageous for obtaining a desired set of instantaneous stabilizer groups on both toric and planar layouts. Our first example is a Floquet code with instantaneous stabilizer codes that have the same topological order as the three-dimensional (3D) toric code(s). This Floquet code also exhibits a splitting of the topological order of the 3D toric code under the associated sequence of measurements, i.e., an instantaneous stabilizer group of a single copy of the 3D toric code in one round transforms into an instantaneous stabilizer group of two copies of the 3D toric code up to nonlocal stabilizers in the following round. We further construct boundaries for this 3D code and argue that stacking it with two copies of the 3D subsystem toric code allows for a transversal implementation of the logical non-Clifford controlled-controlled-Z gate. We also show that the coupled-layer construction of the X-cube Floquet code can be modified by a rewinding schedule such that each of the instantaneous stabilizer codes is finite depth equivalent to the X-cube model up to toric codes; the X-cube Floquet code exhibits a splitting of the X-cube model into a copy of the X-cube model and toric codes under the measurement sequence. Our final 3D example is a generalization of the 2D Floquet toric code on the honeycomb lattice to three dimensions, which has instantaneous stabilizer codes with the same topological order as the 3D fermionic toric code. Published by the American Physical Society 2024

Enhancing quantum adversarial robustness by randomized encodings

The interplay between quantum physics and machine learning gives rise to the emergent frontier of quantum machine learning, where advanced quantum learning models may outperform their classical counterparts in solving certain challenging problems. However, quantum learning systems are vulnerable to adversarial attacks: adding tiny carefully crafted perturbations on legitimate input samples can cause misclassifications. To address this problem, we propose an effective approach to protect quantum learning systems from adversarial attacks by randomly encoding the legitimate data samples through unitary or quantum error correction encoders that are unknown to the attackers. In particular, we rigorously prove that both global and local random unitary encoders lead to exponentially vanishing gradients (i.e., barren plateaus) for any variational quantum circuits that aim to add adversarial perturbations, independent of the input data and the inner structures of adversarial circuits and quantum classifiers. In addition, we prove a rigorous bound on the vulnerability of quantum classifiers under local unitary adversarial attacks. We show that random black-box quantum error correction encoders can protect quantum classifiers against local adversarial noises and their robustness increases as we concatenate error correction codes. To quantify the robustness enhancement, we adapt quantum differential privacy as a measure of the prediction stability for quantum classifiers. Our results establish versatile defense strategies for quantum classifiers against adversarial perturbations, which provide valuable guidance to enhance the reliability and security for both near-term and future quantum learning technologies. Published by the American Physical Society 2024

Efficient DNA-based data storage using shortmer combinatorial encoding

Data storage in DNA has recently emerged as a promising archival solution, offering space-efficient and long-lasting digital storage solutions. Recent studies suggest leveraging the inherent redundancy of synthesis and sequencing technologies by using composite DNA alphabets. A major challenge of this approach involves the noisy inference process, obstructing large composite alphabets. This paper introduces a novel approach for DNA-based data storage, offering, in some implementations, a 6.5-fold increase in logical density over standard DNA-based storage systems, with near-zero reconstruction error. Combinatorial DNA encoding uses a set of clearly distinguishable DNA shortmers to construct large combinatorial alphabets, where each letter consists of a subset of shortmers. We formally define various combinatorial encoding schemes and investigate their theoretical properties. These include information density and reconstruction probabilities, as well as required synthesis and sequencing multiplicities. We then propose an end-to-end design for a combinatorial DNA-based data storage system, including encoding schemes, two-dimensional (2D) error correction codes, and reconstruction algorithms, under different error regimes. We performed simulations and show, for example, that the use of 2D Reed-Solomon error correction has significantly improved reconstruction rates. We validated our approach by constructing two combinatorial sequences using Gibson assembly, imitating a 4-cycle combinatorial synthesis process. We confirmed the successful reconstruction, and established the robustness of our approach for different error types. Subsampling experiments supported the important role of sampling rate and its effect on the overall performance. Our work demonstrates the potential of combinatorial shortmer encoding for DNA-based data storage and describes some theoretical research questions and technical challenges. Combining combinatorial principles with error-correcting strategies, and investing in the development of DNA synthesis technologies that efficiently support combinatorial synthesis, can pave the way to efficient, error-resilient DNA-based storage solutions.

Two-Dimensional Protection Code for Virtual Page Information in Translation Lookaside Buffers

Severe conditions such as high-energy particle strikes may induce soft errors in on-chip memory, like cache and translation lookaside buffers (TLBs). As the key component of virtual-to-physical address translation, TLB directly affects processor performance. To protect the virtual page information stored in TLB, several studies have introduced error detection or correction codes. However, most schemes proposed for data TLB cannot support the detection of multi-bit upsets, which is reported as a serious issue in modern fault-tolerant processors due to the downscaling of CMOS process technology. In this paper, we propose a new two-dimensional protection technique, called the matrix protection tag (MaP-Tag), to provide stronger error detection and correction capability to TLB virtual page information. Our proposal reorganizes virtual page information into a matrix and employs adjacent check bits and interleaved check bits for error detection. The two-dimensional design offers one-bit error detection, burst multi-bit error detection, and even multi-bit error correction in some cases. The simulation results show that our proposal can detect almost all error patterns when injected with up to eight bit-flips. Furthermore, the technique provides a better error correction rate than conventional single error correction (SEC) codes. The reliability calculation shows that our proposal is powerful in both error detection and correction with affordable storage overhead.

Single Photon Detection Technology in Underwater Wireless Optical Communication: Modulation Modes and Error Correction Coding Analysis

Single Photon Detection Technology in Underwater Wireless Optical Communication: Modulation Modes and Error Correction Coding Analysis

A Generalization of the Four Qubits Single Insertion Error-Correcting Code

A Generalization of the Four Qubits Single Insertion Error-Correcting Code

Protecting information via probabilistic cellular automata.

Probabilistic cellular automata describe the dynamics of classical spin models, which, for sufficiently small temperature T, can serve as classical memory capable of storing information even in the presence of nonzero external magnetic field h. In this article, we study a recently introduced probabilistic cellular automaton, the sweep rule, and map out a region of two coexisting stable phases in the (T,h) plane. We also find that the sweep rule belongs to the weak two-dimensional Ising universality class. Our work is a step towards understanding how simple geometrically local error-correction strategies can protect information encoded into complex noisy systems, such as topological quantum error-correcting codes.

A Quasi-Cyclic LDPC Based Low Complexity and Area-Efficient Communication System for IEEE 802.11n

Low-density parity-check (LDPC) code, which has an excellent error-correcting performance that is close to the Shannon limit, is the most often used error correction code (ECC) for reliable and effective communication. Despite higher performance and lower decoding complexity, the main disadvantage of LDPC codes is their high encoding complexity. A significant problem is the VLSI implementation of the LDPC encoder and decoder. In this paper, structured LDPC codes—also known as quasi-cyclic low-density parity check codes—have been used since it is good bit error ratio (BER) performance and adaptable hardware execution characteristics. The Complete (Encoder-Channel-Decoder) communication system with a 1/2 code rate, 648 bits codeward length, and sub-block size of z = 27 has been constructed for the IEEE 802.11n wireless standard.

저지연 LDPC 복호기의 하드웨어 구현 및 검증

In this investigation, we developed the hardware for a low-latency low-density parity check (LDPC) decoder and validated its error-correction performance. The LDPC code was chosen as the error-correction code conforming to the international portable Internet standard IEEE 802.16e. The LL-LDPC code, implemented in this study, efficiently minimizes the number of coded calculations through the utilization of a type of Structured-LDPC code defined by the physical layer description in IEEE 802.16e. The low-delay LDPC decoder employs a parallel decoding method to mitigate the decoding delay associated with repetitive decoding. Comprising four SISO modules based on four coding repetitions in the coder, the low-delay LDPC decoder significantly reduces delay times. The four SISO modules operate in parallel, enabling simultaneous decoding and thereby decreasing the delay time by 1/4 compared to alternative approaches.

A commentary of “Prolonging the lifetime of logic qubits by Bosonic error-correcting code —realizing the break-even point of quantum error correction”: Top 10 Scientific Advances of 2023, China

A commentary of “Prolonging the lifetime of logic qubits by Bosonic error-correcting code —realizing the break-even point of quantum error correction”: Top 10 Scientific Advances of 2023, China

Explicit error-correction scheme and code distance for bosonic codes with rotational symmetry

Explicit error-correction scheme and code distance for bosonic codes with rotational symmetry