Envelope Elimination And Restoration Research Articles

A review of different structures of power amplifiers to improve linearity and efficiency

<p>This review paper presents a comprehensive study of commonly used power amplifier (PA) structures. In recent years, with the development of modern wireless telecommunications and their dramatic challenges, new requirements are needed. In addition, some applications, like cell phones and tablets for example, need new considerations, especially in terms of power consumption. Also, linearity is another major factor in designing a PA. Furthermore, fabrication technologies such as complementary metal-oxide semiconductor (CMOS), silicon on insulator (SOI), gallium nitride (GaN), gallium arsenide (GaAs), etc., play a crucial role in terms of power consumption. Therefore, it is necessary for PAs to meet these considerations. This paper reviews design considerations, fabrication technologies and common PA structures including envelope tracking (ET), envelope elimination and restoration (EER), Doherty, linear amplification with nonlinear components (LINC), feedback and feedforward linearization techniques with their pros and cons. This review focuses on the significant achievements, techniques, structures and characteristics of each. Also, this review focuses on the significant achievements, techniques, structures and characteristics of each. Also, this paper tries to provide a brief overview of the various methods with the advantages and disadvantages of each. This review paper tries to make readers familiar with common structures so that readers know the advantages and disadvantages of each and choose the desired structure based on their priorities.</p>

Theoretical Comparison of Different Envelope Elimination and Restoration Transmitter PWM Modulator Configurations to Expand the Possible Antenna Mismatch

The main characteristics of high-efficiency switching-mode solid-state power amplifiers with envelope elimination and restoration (EER) methods depend on all their elements. In this article, we study the influence of the types and parameters of the envelope path low-pass filters (LPFs) on the EER transmitter out-of-band emissions. This article presents for the first time an analysis of EER transmitter operation where the output impedance of the PWM modulator is not equal to zero, as usual (with a one-sided loaded LPF), but is matched with the low-pass filter and the load (with a double-sided loaded LPF). Theoretical comparisons of EER transmitters’ out-of-band emissions were carried out with four envelope path LPF configurations (one-sided and double-sided loaded LPFs with a smooth and sharp transition, respectively), for both the nominal load (broadband antenna) and resonant antennas with a limited bandwidth. The analysis showed that for the case of transmitter operation on a resonant antenna with a limited bandwidth, the preferable option was the use of a sixth-order double-sided loaded LPF with a smooth transition. The use of the proposed modulator configuration allowed the transmitter to operate on an antenna with VSWR = 1.07 at the edges of the transmitted signal band with a minimum LPF bandwidth equal to 5.8 bands of the amplified signal. This could significantly expand its application capabilities and allow one to reduce the PWM clock frequency and increase efficiency.

Methods of reducing antenna bandwidth requirements for envelope elimination and restoration transmitter

The task of radio transmitting path efficiency increasing is relevant both for stationary high-power applications and for autonomous low-power devices. The highest efficiency can be achieved in switching operating modes (classes D, E, F). For the amplification of modern spectrally efficient broadcast and telecommunication signals with variable amplitude, for example, with OFDM, the use of switching operating modes is possible only with the use of "synthetic" amplification methods. The most promising for application can be considered Envelope Elimination and Restoration (EER) method, which is successfully used in the field of high-power broadcasting in the LF, MF and HF bands, and is the object of a large number of studies aimed at expanding its scope. Transmitting devices of radio communication and broadcasting systems in some cases are forced to work with an electrically short antenna. However, when operating with OFDM signals to a narrow-band load, high-efficiency EER transmitters require matching with an antenna circuit with an SWR of at least 1.05 in the signal frequency band. Thus, the task of antenna bandwidth requirements reducing for EER transmitter is relevant. To solve it, a simulation model was previously developed and verified to study the operation of EER switching RF power amplifiers for a narrow-band load. With its help, the dependence of output signal distortion level on the envelope path LPF parameters was studied. This article proposes and analyzes hardware circuit solutions aimed at reducing the transmitter sensitivity to antenna bandwidth. The analysis of hardware methods for reducing the EER transmitter sensitivity to the resonant antenna SWR (passband) showed the following: 1. The damping circuit, together with a double-sided loaded envelope path LPF, allows you to reduce antenna SWR requirements to a maximum value of 1.22, while the allowable antenna bandwidth can be reduced to five signal bands. 2. The high-pass filter diplexer proposed in this paper, together with a double-sided loaded envelope path LPF, makes it possible to reduce antenna SWR requirements to a maximum value of 1.47, and the allowable antenna bandwidth can be reduced to 2.5 signal bands. The disadvantages of this method include the need, depending on the antenna used, for individual design and manufacture of high-pass filter diplexers installed in the low-frequency path of each amplifying cell of the transmitter. To expand the range of antennas used, it is possible to switch capacitors of the high-pass filter diplexer from a set of 2 ... 3 pieces. Data on the production of transmitters with the proposed HPF diplexer has not been found to date. 3. Multi-phase PWM when using a 2nd order unilaterally loaded low-pass filter and installing 2nd harmonic rejectors of the operating frequency in the cells of the RF path allows you to work on antennas with a bandwidth of up to half the signal bandwidth. Restrictions on the antenna bandwidth and its SWR are imposed only by the uneven antenna frequency response in the transmitted signal band. The disadvantages of this method include the need to install narrow-band rejectors that block the power supply circuit of each RF cell in terms of the 2nd harmonic, which makes such a transmitter a custom product for a fixed operating frequency. 4. The most promising solution should be considered the use of a high-pass filter diplexer, which allows relatively simple means to expand the permissible SWR of a narrow-band antenna in the signal band from the initial value of 1.05 to 1.47.

Зависимость уровня искажений выходного сигнала передатчика современных телекоммуникационных сигналов с разделением составляющих от параметров фильтра тракта огибающей

The article investigates the dependence of the envelope elimination and restoration (EER) transmitter out-of-band emissions on the parameters of its envelope path LPF. LPFs of the sixth order with the Cauer structure, having the same degree of clock frequency unwanted products suppression, unilaterally and bilaterally loaded, and optimized LPFs with a smooth transition of the frequency response from the passband to the stopband are considered. It is shown that when the transmitter is operating at a nominal load (broadband antenna), a sharp transition from the passband to the stopband in the envelope path LPF leads to an increase in out-of-band emissions that are separated from the center frequency of the transmitter by the LPF cutoff frequency. The minimum envelope path allowable bandwidth is at least 5 transmitted signal bandwidths when using a Cauer-type LPF with a standard approximation and at least 3.5 bandwidths for an optimized LPF with a smooth transition. For the case of a transmitter operating on a resonant antenna with a limited bandwidth, the dependences of the minimum envelope path filter required bandwidth on the antenna bandwidth and the VSWR value at the edges of the amplified signal band are revealed. It is shown that the use of two-sided loaded filters in the envelope path allows the transmitter to work on antennas with half the bandwidth and reduce the antenna SWR requirements from 1.03 to 1.07. The use of smooth transition filters allows you to reduce the minimum required bandwidth of the LPF by 20% compared to standard filters. The most preferable is the use of a two-sided loaded LPF of the 6th order with a smooth transition, which ensures the operation of the transmitter to the antenna with VSWR = 1.07 at the edges of the transmitted signal band with a minimum LPF bandwidth equal to 5.8 signal bands.

ИМИТАЦИОННАЯ МОДЕЛЬ ДЛЯ ИССЛЕДОВАНИЯ РАБОТЫ КЛЮЧЕВЫХ ВЧ УСИЛИТЕЛЕЙ МОЩНОСТИ С РАЗДЕЛЬНЫМ УСИЛЕНИЕМ СОСТАВЛЯЮЩИХ НА УЗКОПОЛОСНУЮ НАГРУЗКУ

Introduction: High-efficiency switching mode envelope elimination and restoration (EER) RF power amplifiers (PA) are the most promising of a number of "synthetic" power amplification methods for a wide variety of applications. However, when they operate on a mismatched narrow-band load, for example, an electrically short antenna, additional out-of-band emission occurs, which limits the EER PA scope. The purpose of the work is to develop a simulation model for studying the EER switching mode RF PA operation for a narrow-band load. The choice of transient analysis method and use of the freely distributed simulation environment Micro-Cup 12 are substantiated. A number of original solutions are proposed to reduce the computation time. The description of developed model is given, which makes it possible to study the features of the EER PA operation on a narrow-band antenna on a real signal with amplitude& phase modulation fragment. As an example, a DRM digital radio OFDM signal with 10 kHz bandwidth is used. Studies conducted using this model can be proportionally scaled for any frequency band and will allow further development of technical requirements for the EER PA blocks characteristics. Some calculations results showing the developed model adequacy are presented. Practical significance: the use of this model for the subsequent search for solutions to ensure the possibility of EER PA operation for a narrower band load will expand the scope of these high-efficiency power amplifiers.

A multi-band high-efficiency envelope elimination and restoration CMOS power amplifier

A multi-band CMOS power amplifier has been realized to be used in high-efficiency handset applications. The proposed PA is based on class-E stage linearized using envelope elimination and restoration (EER) technique. In order to cover multiple frequency bands, a wide-band passive output matching network is designed and combined with band-select feature. This allows switching between two wide-band output matching networks; increasing frequency coverage and yet satisfying the criteria of high rejection of out-of-band emissions. A design methodology is introduced to optimize the values required for the wide-band passive network. The design has been implemented using CMOS 0.13 μm technology. Simulation results show frequency coverage from 800 MHz to 2.2 GHz with peak efficiency more than 60% (before taking the effect of supply modulator) and 47% after taking the losses of the supply modulator into account. The designed EER system achieves excellent linearity performance. The test and validation process includes LTE test signal with 16 QAM modulation scheme and signal bandwidth of 20 MHz.

System Linearity-Based Characterization of High-Frequency Multilevel DC–DC Converters forS-Band EER Transmitters

In modern telecommunications systems, the requirements for the amount and speed of transmitted data are increasing rapidly. For better spectral efficiency, complex-type modulations [quadrature amplitude modulation (QAM) and orthogonal frequency-division multiplexing (OFDM)] are used, resulting in high peak-to-average power ratio (PAPR) signals. As a consequence, when conventional linear amplifiers (classes A and AB) are used in transmitters, both prominent linearity and poor efficiency are assured. The efficiency of the transmitters can be significantly improved using some of the popular techniques: Kahn envelope elimination and restoration (EER) principle, envelope tracking (ET) technique, Doherty amplifier, and Chireix’s amplifier. In this article, two different approaches in supplying a 2.4-GHz class-E power amplifier (PA) ( ${S}$ -band) based on the EER technique are analyzed and compared. The consistent part of the EER transmitters is a switched-capacitor-based voltage divider combined with a switching structure—analog multiplexer, in the envelope amplifiers (EAs) and a class-E PA. The analog multiplexer is assisted with a series linear regulator in the first system and a fourth-order ${LC}$ filter in the second system, providing supply modulation for the PA. The systems are compared in terms of efficiency and system linearity using the standard metrics [error vector magnitude (EVM) and adjacent channel power ratio (ACPR)]. Special consideration is devoted to the characterization of how the EAs affect the quality of the RF output signal. It is shown that the tested EER transmitters can reproduce 16-QAM and 64-QAM signals up to 2.5 MHz, manifesting an average efficiency of about 32% with the first transmitter, and 16-QAM signals up to 660 kHz RF bandwidth and average efficiency of 44% with the second transmitter. A software tool that accurately estimates the EA linearity is utilized and successfully tested on both EER transmitters.

Efficient Supply Modulator for Wide-Band Envelope Elimination and Restoration Power Amplifiers

A fast transient response supply modulator has been realized and verified in envelope elimination and restoration (EER) power amplifier. The analysis and detailed design of the proposed architecture is presented. Simulation results, in 130-nm CMOS technology, show that the proposed supply modulator achieves better linearity and efficiency compared to the conventional hybrid mode supply modulators or hybrid EER when signal frequency increases. Adjacent channel leakage ratio requirements are met for an LTE signal with 5 MHz, 10 MHz, and 20 MHz BW with error vector magnitude less than 3% and efficiency of 79%, 73%, and 67%, respectively at an output power of 0.45 W. Post-layout simulations are performed across different process corners and the effects of real off-chip components and routes are taken into consideration to verify the robustness of the proposed solution.

A Review of Envelope Tracking Power Supply for Mobile Communication Systems

In modern mobile communication systems, spectral efficient modulation formats have been widely used, which results in the envelope of the radio frequency (RF) signal is variable and having large peak to average power ratio (PAPR). In order to amplify the RF signal without distortion, the linear power amplifier (LPA) is adopted, which is less efficient when powered by constant voltage. Three popular techniques, i.e., Doherty, envelope elimination and restoration (EER), and envelope tracking (ET) techniques, to greatly improve the efficiency of the power amplifiers are analyzed and compared in this paper, and it is shown that the ET technique is the most suitable for future mobile communication systems. In the ET systems, the ET power supply is the key equipment, which dominates the system efficiency. With the development of the mobile communication systems, the bandwidth and the PAPR of the envelope signals are increasing rapidly, which pose severe challenges on the design of the ET power supply. This paper summarizes and sorts the ET power supplies in the literatures, and a detailed comparison is presented to guide the selection of ET power supplies for different applications. Finally, the methods, including soft-switching, slow envelope, and band separation are proposed for further increasing the efficiency of the ET power supply.

Optimized Design of GaN Switched-Capacitor-Converter-Based Envelope Tracker for Satellite Application

Envelope tracking and envelope elimination and restoration (EER) are two important techniques used to improve efficiency of power amplifiers. They employ a power supply called envelope tracker to provide a dynamic voltage that tracks the envelope of the transmitted signal. This paper presents an implementation of the envelope tracker based on a multilevel converter in series with a linear regulator for satellite application. In order to have highly efficient and light solution, a switched-capacitor-converter-based multilevel converter is proposed. For the multilevel converter, duty cycle, switching frequency, capacitors, and inductors are optimized based upon the precise power loss model. Two prototypes (GaN-based and Si-based) are fabricated, aiming for a 5-MHz radio frequency envelope signal tracking with a maximum output power of 40 W. The experimental results verify the effectiveness of the proposed configuration with 96.2% efficiency of the multilevel converter and 75% of the envelope tracker. Besides, comparison experiments are performed between the Si-based and GaN-based transistors, which show that the GaN transistors offer better efficiency and, therefore, are preferred for satellite application.

Hybrid Envelope Elimination and Restoration Technique for Enhancing the Linearity of Switchmode Envelope Amplifiers

This letter shows a new technique for enhancing the linearity of switchmode envelope amplifiers used in Envelope Elimination and Restoration (EER) amplifiers. The proposed solution increases the linearity of EER amplifiers using switchmode converters as envelope amplifiers avoiding additional hardware for compensating their inherent distortion at low output voltage levels. This technique combines hybrid EER (H-EER) and drive modulation techniques applied to a radio frequency (RF) amplifier operating in mixed mode. It is illustrated by means of an L-Band suboptimum Class-E power amplifier using GaN HEMTs linearized by a multi-phase switchmode envelope amplifier.

The Design of a Multilevel Envelope Tracking Amplifier Based on a Multiphase Buck Converter

Envelope tracking (ET) and envelope elimination and restoration (EER) are techniques that have gained in importance in the last decade in order to obtain highly efficient radio frequency power amplifier that transmits signals with high peak-to-average power ratio. In this study, a multilevel multiphase buck converter is presented as a solution for the envelope amplifier used in ET and EER. The presented multiphase buck converter generates multilevel voltage using “node” duty cycles and nonlinear control. In this way, the multilevel is implemented using only one simple power stage. However, the complexity of the multilevel converter implementation has been shifted from complicated power topologies to complicated digital control. Detailed discussion regarding the influence of the design parameters (switching frequency, output filter, and time resolution of the digital control) on the performance of the proposed envelope amplifier is presented. The design of the output filter is conducted fulfilling the constraints of the envelope slew rate and minimum driver pulse that can be reproduced. In the cases when these two constraints cannot be fulfilled, they may be relieved by the modified control that is presented and experimentally validated. Finally, in order to validate the concept, a prototype has been designed and integrated with a nonlinear class F amplifier. Efficiency measurements showed that by employing EER, it is possible to save up to 15% of power losses, comparing to the case when it is supplied by a constant voltage. Additionally, adjacent channel power ratio has been measured. The obtained results showed the value higher than 30 dB for signals up to 5 MHz of bandwidth, without using a predistortion technique.

Double‐frequency buck converter as a candidate topology for integrated envelope elimination and restoration applications in power supply of RFPAs

SummaryThis paper proposes the use of double‐frequency (DF) buck converter architecture consisting of a merged structure of high and low frequency buck cells as a candidate topology for envelope elimination and restoration (EER) applications and integrated power supply of RF power amplifiers (RFPA) to obtain favorable tradeoffs in terms of efficiency, switching ripple, bandwidth, and tracking capability. It is shown that having two degrees of freedom in designing the DF buck helps to achieve high efficiency, low output ripples, and tracking capability with low ripples, simultaneously. A comparison analysis is done with regards to the mentioned performance indexes with the standard and three‐level buck converters; in addition, the results are validated in HSPICE in BSIM3V3 0.35‐µm CMOS process. Copyright © 2015 John Wiley & Sons, Ltd.

A 1.95 GHz Fully Integrated Envelope Elimination and Restoration CMOS Power Amplifier Using Timing Alignment Technique for WCDMA and LTE

A fully integrated envelope elimination and restoration (EER) CMOS power amplifier (PA) has been developed for WCDMA and LTE handsets. EER is a supply modulation technique that first divides modulated RF signal into envelope and phase signals and then restores it at a switching PA output. Supply voltage of the switching PA is modulated by the envelope signal through a high-speed supply modulator. EER PA is highly efficient due to the switching PA and the supply modulation. However, it generally has difficulty, especially for a wide bandwidth baseband application like LTE, achieving a wide bandwidth for phase signal path and highly accurate timing between envelope and phase signals. To overcome these challenges, an envelope/phase generator based on a mixer and a limiter was proposed to generate the wide bandwidth phase signal, and a timing aligner based on a delay locked loop with a variable high-pass filter (HPF) was proposed to compensate for the timing mismatch. The chip was implemented in 90 nm CMOS technology. Measured power-added efficiency (PAE) and adjacent channel leakage ratio (ACLR) were 39% and -41 dBc for WCDMA, and measured PAE and ACLR E-UTRA1 were 32% and -33 dBc for 20 MHz-BW LTE.

Design of a Two-Phase Buck Converter With Fourth-Order Output Filter for Envelope Amplifiers of Limited Bandwidth

The use of techniques such as envelope tracking (ET) and envelope elimination and restoration (EER) can improve the efficiency of radio frequency power amplifiers (RFPA). In both cases, high-bandwidth DC/DC converters called envelope amplifiers (EA) are used to modulate the supply voltage of the RFPA. This paper addresses the analysis and design of a modified two-phase Buck converter optimized to operate as EA. The effects of multiphase operation on the tracking capabilities are analyzed. The use of a fourth-order output filter is proposed to increase the attenuation of the harmonics generated by the PWM operation, thus allowing a reduction of the ratio between the switching frequency and the converter bandwidth. The design of the output filter is addressed considering envelope tracking accuracy and distortion caused by the side bands arising from the nonlinear modulation process. Finally, the proposed analysis and design methods are supported by simulation results, as well as demonstrated by experiments obtained using two 100-W, 10-MHz, two-phase Buck EAs capable of accurately tracking a 1.5-MHz bandwidth OFDM signal.

Filter Design Methodology and Application of GaN HEMTs in High-Frequency DC/DC Converter

ABSTRACTOptimization of the radio frequency (RF) transmitter performance in envelope tracking (ET) and envelope elimination and restoration (EER) techniques directly implies optimization of the envelope amplifier (EA) design. Since EA should have fast dynamic response together with high efficiency, synchronous buck is a suitable topology for this kind of application. The key issues for optimization of the converter design are the characteristics of the switching devices, the LC filter design, and the driving circuit for the switches. In this paper, design optimization of the LC filter for sinusoidal output voltage together with new technological solution for switching devices based on gallium nitride is proposed, while the applied drivers are commercially available ones, suitable for aforementioned GaN switches. Design of the output filter in synchronous buck converter for high-frequency application is important from two points of view: the first one is sufficient attenuation of the unwanted harmonics of the switching frequency so that envelope reference has minimum level of distortion and the second one is the overall impact of the filter design on the converter's efficiency. In order to increase the efficiency, the LC filter should be designed in a way to obtain compromise between the conduction and switching losses of the buck converter. In the case of sinusoidal output voltage, filter design parameter has been defined as the ratio between the maximum values of the inductor current and load current and power losses dependence on this parameter has been obtained. Theoretically obtained optimum design has been confirmed through experimental measurements, where four different designs were built and tested. On the other hand, application of new switching devices based on gallium nitride provided significant efficiency enhancement in comparison to Si MOSFETs and laterally diffused MOS transistors, due to the lower values of the gate charge and on-resistance. Tests with 64QAM and wideband code division multiple access (WCDMA) RF signals showed that these devices are the best choice for this kind of application, where the main challenge is to increase the efficiency of the signal transmission simultaneously with the bandwidth.

Linearized Multi-Level $\Delta\Sigma$ Modulated Wireless Transmitters for SDR Applications Using Simple DLGA Algorithm

This paper proposes a new linearization algorithm, discrete level gain adjustment (DLGA), for linearized high efficiency multi-level delta sigma modulator (ΔΣM)-based transmitter architectures adequate for wideband multi-standard software defined radio (SDR) applications. The new simple linearization DLGA algorithm is deployed instead of using a full digitally predistorted to maintain the linearity of the employed switching-mode power amplifier (SMPA) with a considerable decrease in the complexity of the digital signal processing (DSP) unit. The proposed architecture includes a multi-level envelope ΔΣM (EΔΣM) concurrently with a linearized SMPA, in order to achieve a better trade-off of power efficiency versus linearity. Based on DLGA, instead of envelope elimination and restoration (EER) configuration, three-level envelope LPΔΣM-based transmitter in phase elimination and restoration (PER) configuration was implemented. The bandwidth constraint of the EER configuration was relaxed. First, a multi-level Envelope EΔΣM-based transmitter was studied to determine the optimal number of quantizer levels that could be used. Through MATLAB simulation and measurement results, it was shown that the best performance was achieved with a discrete level signal that has three different power levels, including zero and regardless the phase. From the measurements, the linearized three-level PER-LPEΔΣM transmitter shows an efficiency of 36%, signal-to-noise distortion ratio of 43.8 dB and adjacent channel power ratio of 45 dB.

High-Gain and High-Efficiency EER/Polar Transmitters Using Injection-Locked Oscillators

The envelope elimination and restoration (EER) approach developed by Kahn and its modern derivative, a polar transmitter, are well recognized as highly efficient amplification schemes. This paper presents an EER/polar dual-mode transmitter using injection-locked oscillators (ILOs). For an EER operation, an ILO that is combined with a mixer and a low-pass filter in the proposed architecture extracts an envelope signal and a phase-modulated RF signal from an input RF signal with complex modulation. The phase-modulated RF signal is then amplified efficiently by a class-E power amplifier (PA). Additionally, the envelope signal is reconstructed at the PA output by modulating the supply voltage of the PA. For a polar operation, the necessary phase modulation and envelope modulation are generated in the digital domain instead. Moreover, the phase-modulated RF signal is injected into an ILO and the ILO output is amplified by a class-E PA while supply-modulated with the envelope signal. For wideband code-division multiple access (WCDMA) signals, the implemented prototype transmitter achieves a 20.8-dB gain and 44% power-added efficiency (PAE) at an average output power of 25.8 dBm. For enhanced data rates for GSM evolution signals, it delivers 26.6 dB of gain and 48.7% PAE at an average output power of 26.6 dBm. Furthermore, to compensate for the AM-AM and AM-PM distortions of the PA, the linearity is improved using static digital predistortion. Experimental results demonstrate that the proposed EER/polar transmitter using ILOs has a high gain, high efficiency, and good linearity.

Three-Level Cell Topology for a Multilevel Power Supply to Achieve High Efficiency Envelope Amplifier

This paper presents an envelope amplifier solution for envelope elimination and restoration (EER), that consists of a series combination of a switch-mode power supply (SMPS), based on three-level voltage cells and a linear regulator. This cell topology offers several advantages over a previously presented envelope amplifier based on a different multilevel topology (two-level voltage cells). The topology of the multilevel converter affects to the whole design of the envelope amplifier and a comparison between both design alternatives regarding the size, complexity and the efficiency of the solution is done. Both envelope amplifier solutions have a bandwidth of 2 MHz with an instantaneous maximum power of 50 W. It is also analyzed the linearity of the three-level cell solution, with critical importance in the EER technique implementation. Additionally, considerations to optimize the design of the envelope amplifier and experimental comparison between both cell topologies are included.

Impact of Switching Glitches in Class-G Power Amplifiers

Envelope elimination and restoration (EER) based transmitters have attracted attention recently for two reasons: 1) The desire for increased spectral efficiency has mandated modulation standards that have large peak-to-average ratios (PAR). The increase in spectral efficiency is traded off against a decrease in average power-added-efficiency (PAE) when a linear power amplifier is used; however, when EER is used, it is decoupled somewhat from spectral efficiency. 2) Through the use of fast on-chip signal processing, the natural advantage of scaled CMOS is exploited by enabling switching power amplifier classes (e.g., class-E). This letter examines limitations associated with voltage supply switching glitches in class-G power amplifiers.