Envelope Amplifier Research Articles

High-Efficiency GaN-Based Power Amplifiers for Envelope Nonlinearities’ Mitigation in VHF Wideband Polar-Mode Transmitters

Space-based communications at the very high frequency (VHF) band for air traffic management is a new technology application under development that requires energy-efficient architectures to mitigate the power limitations of satellite platforms. The usage of high-efficiency radiofrequency (RF) transmitters can help reduce the power consumption, but nonlinearities concerning the amplified signal in wide fractional bandwidth systems are a problem to solve. This paper proposes a high-efficiency (RF) power amplifier (PA) for satellite communications at the VHF band that aims to reduce the envelope distortion inherent to wide fractional bandwidth multicarrier polar-mode transmitters. Its design is based on a solution called hybrid-coupled switching voltage PA in combination with gallium nitride (GaN) high electron mobility transistor (HEMT) technology. The developed VHF PA prototype delivers up to 95 W from a 28 V power supply, with a drain efficiency about 80% within the 118 MHz to 138 MHz operating band. To test its linearity performance, operating in a polar-mode configuration, a GaN-based wideband envelope amplifier (EA) has been developed to modulate the RF PA supply port. This EA improves its power efficiency by combining it with a slow envelope power supply (SEPS). Some measurements have been taken for a 100 W peak envelope power (PEP) and 10 MHz (maximum carrier spacing) four-tone digitally-modulated test signal, where any distortion product is attenuated 46 dB below the average power of the amplified signal without applying any digital predistortion (DPD) technique.

Broadband and Efficient Envelope Amplifier for Envelope Elimination and Restoration/Envelope Tracking Higher-Efficiency Power Amplifiers

Increasing the efficiency of transmitters, as the largest consumers of energy, is relevant for any wireless communication devices. For higher efficiency, a number of methods are used, including envelope tracking and envelope elimination and restoration. Increasing the bandwidth of used frequencies requires expanding envelope modulators bandwidth up to 250-500 MHz or more. The possibility of using amplifiers with input signal quantization (AISQ), as an alternative to the most common hybrid envelope tracking modulators, is considered. An approach has been developed for optimizing AISQ characteristics according to the criterion of minimum loss when amplifying modern telecommunication signals with Rayleigh envelope distribution. The optimal quantization levels are determined and the energy characteristics of AISQ are calculated. AISQ loss power is shown to decrease by 1.66 times with two-level quantization, by 2.4 times with three-level quantization, and by a factor of 3.0-3.7 for four-five quantization levels compared to a class B amplifier. With these parameters, AISQ becomes competitive with respect to hybrid envelope tracking modulators but does not have electromagnetic interference from the pulse width modulation (PWM) path.

Guest Editorial: Special Issue on Power Converters and Control Techniques for Very Fast Response Applications

Efficient power converters capable of changing their output voltage at very high speeds (submicrosecond scale) are mandatory for very fast response (VFR) applications. They are necessary to regulate loads that demand very fast voltage changes and to supply high-frequency-pulsed loads for data processing, communication, and portable equipment. VFR converters likewise become necessary for applications in which the efficient generation of high-frequency waveforms is mandatory: envelope amplifiers (EAs) for envelope tracking (ET) techniques, visible light communication (VLC) transmitters using light-emitting diodes (LEDs), switched-mode radio frequency power amplifiers and high-frequency inverters, among others.

Adapting Techniques to Improve Efficiency in Radio Frequency Power Amplifiers for Visible Light Communications

It is well known that modern wireless communications systems need linear, wide bandwidth, efficient Radio Frequency Power Amplifiers (RFPAs). However, conventional configurations of RFPAs based on Class A, Class B, and Class AB exhibit extremely low efficiencies when they manage signals with a high Peak-to-Average Power Ratio (PAPR). Traditionally, a number of techniques have been proposed either to achieve linearity in the case of efficient Switching-Mode RFPAs or to improve the efficiency of linear RFPAs. There are two categories in the application of aforementioned techniques. First, techniques based on the use of Switching-Mode DC–DC converters with a very-fast-output response (faster than 1 µs). Second, techniques based on the interaction of several RFPAs. The current expansion of these techniques is mainly due to their application in cellphone networks, but they can also be applied in other promising wireless communications systems such as Visible Light Communication (VLC). The main contribution of this paper is to show how Envelope Tracking (ET), Envelope and Elimination (EER), Outphasing, and Doherty techniques can be helpful in developing more efficient VLC transmitters capable of reaching high bit-rates (higher than 1 Mbps) by using advance modulation schemes. Finally, two examples based on the application of the Outphasing technique and the use of a Linear-Assisted Envelope Amplifier (EA) to VLC are presented and experimentally verified.

Design of a Wideband Constant-on-Time Control Envelope Amplifier for Wireless Basestation Envelope Tracking Power Amplifiers

Envelope tracking (ET) technology provides the potential for achieving high efficiency in power amplifiers (PAs) with high peak-to-average ratio (PAR) signals. Envelope amplifiers with high fidelity, high efficiency, and wide bandwidth are critical components for the widespread application of envelope tracking. This paper presents the design of a linear-assisted switching buck converter for use in an envelope amplifier. To effectively leverage the high efficiency of buck converters and the wide bandwidth capabilities of linear amplifiers, a parallel combination of these two devices is employed in this work. A novel current-sense constant-on-time (COT) controller is proposed to coordinate this hybrid power supply. The combination mainly enables the switching converter to provide the average power required by the PA with high efficiency, while the wideband linear amplifier provides a wide range of dynamic voltages. The technique improves the efficiency of the envelope amplifier, especially for applications requiring high PAR with wider bandwidth signals. Measurement of the envelope amplifier showed an efficiency of approximately 77% with 10 W output power using LTE downlink signals. The overall ET system was demonstrated by using a GaN PA. The measured average power-added efficiency of the amplifier reached above 45% for an LTE modulated signal with 20 MHz bandwidth and PAR of 8.0 dB, at an average output power of 5 W and gain of 10.1 dB. The measured normalized RMS error is below 2.1% with adjacent channel leakage ratio of -48 dBc at an offset frequency of 20 MHz.

System Linearity-Based Characterization of High-Frequency Multilevel DC–DC Converters forS-Band EER Transmitters

In modern telecommunications systems, the requirements for the amount and speed of transmitted data are increasing rapidly. For better spectral efficiency, complex-type modulations [quadrature amplitude modulation (QAM) and orthogonal frequency-division multiplexing (OFDM)] are used, resulting in high peak-to-average power ratio (PAPR) signals. As a consequence, when conventional linear amplifiers (classes A and AB) are used in transmitters, both prominent linearity and poor efficiency are assured. The efficiency of the transmitters can be significantly improved using some of the popular techniques: Kahn envelope elimination and restoration (EER) principle, envelope tracking (ET) technique, Doherty amplifier, and Chireix’s amplifier. In this article, two different approaches in supplying a 2.4-GHz class-E power amplifier (PA) ( ${S}$ -band) based on the EER technique are analyzed and compared. The consistent part of the EER transmitters is a switched-capacitor-based voltage divider combined with a switching structure—analog multiplexer, in the envelope amplifiers (EAs) and a class-E PA. The analog multiplexer is assisted with a series linear regulator in the first system and a fourth-order ${LC}$ filter in the second system, providing supply modulation for the PA. The systems are compared in terms of efficiency and system linearity using the standard metrics [error vector magnitude (EVM) and adjacent channel power ratio (ACPR)]. Special consideration is devoted to the characterization of how the EAs affect the quality of the RF output signal. It is shown that the tested EER transmitters can reproduce 16-QAM and 64-QAM signals up to 2.5 MHz, manifesting an average efficiency of about 32% with the first transmitter, and 16-QAM signals up to 660 kHz RF bandwidth and average efficiency of 44% with the second transmitter. A software tool that accurately estimates the EA linearity is utilized and successfully tested on both EER transmitters.

A design methodology of envelope tracking power amplifier based on harmonic impedance tuning

AbstractA design methodology of utilizing the harmonic impedance tuning for the envelope tracking (ET) power amplifier (PA) is proposed in this letter. Owing to the assistance of harmonic tuning, the PA efficiency can be enhanced obviously. Experimental results show that PA prototype exhibits higher than 60% efficiency in the 7‐dB backoff power region and 36% average efficiency including envelope amplifier (EA) when driven by a 7‐dB PAPR long‐term evolution (LTE) signal.

Hybrid Envelope Elimination and Restoration Technique for Enhancing the Linearity of Switchmode Envelope Amplifiers

This letter shows a new technique for enhancing the linearity of switchmode envelope amplifiers used in Envelope Elimination and Restoration (EER) amplifiers. The proposed solution increases the linearity of EER amplifiers using switchmode converters as envelope amplifiers avoiding additional hardware for compensating their inherent distortion at low output voltage levels. This technique combines hybrid EER (H-EER) and drive modulation techniques applied to a radio frequency (RF) amplifier operating in mixed mode. It is illustrated by means of an L-Band suboptimum Class-E power amplifier using GaN HEMTs linearized by a multi-phase switchmode envelope amplifier.

Interference cancellation for higher harmonics of supply-modulated efficient RF power amplifier systems

In building highly efficient transmitters of today, one is forced to sacrifice linearity for efficiency. Some of the highest power amplifier efficiency figures are reported by envelope tracking (ET) amplifiers. These amplifiers can generate strong higher-order harmonics, which can lead to interference with receivers operating at the harmonic frequencies. Using non-linear interference cancellation, we can help to remove the interference being caused in those receivers. This paper looks at the problem of modeling the third and second-order harmonic emission from an ET amplifier. It derives the non-linear kernel for estimating such interference. This kernel has been rigorously expanded to show its correlation with the various harmonics and its effectiveness in predicting the harmonic content. We then set up an envelope amplifier test-bench to capture harmonic signal content and cancel it using the derived kernel model. The experiment yields excellent agreement with theory and provides a validation of the system and concept.

The Design of a Multilevel Envelope Tracking Amplifier Based on a Multiphase Buck Converter

Envelope tracking (ET) and envelope elimination and restoration (EER) are techniques that have gained in importance in the last decade in order to obtain highly efficient radio frequency power amplifier that transmits signals with high peak-to-average power ratio. In this study, a multilevel multiphase buck converter is presented as a solution for the envelope amplifier used in ET and EER. The presented multiphase buck converter generates multilevel voltage using “node” duty cycles and nonlinear control. In this way, the multilevel is implemented using only one simple power stage. However, the complexity of the multilevel converter implementation has been shifted from complicated power topologies to complicated digital control. Detailed discussion regarding the influence of the design parameters (switching frequency, output filter, and time resolution of the digital control) on the performance of the proposed envelope amplifier is presented. The design of the output filter is conducted fulfilling the constraints of the envelope slew rate and minimum driver pulse that can be reproduced. In the cases when these two constraints cannot be fulfilled, they may be relieved by the modified control that is presented and experimentally validated. Finally, in order to validate the concept, a prototype has been designed and integrated with a nonlinear class F amplifier. Efficiency measurements showed that by employing EER, it is possible to save up to 15% of power losses, comparing to the case when it is supplied by a constant voltage. Additionally, adjacent channel power ratio has been measured. The obtained results showed the value higher than 30 dB for signals up to 5 MHz of bandwidth, without using a predistortion technique.

Linear Regulator Design Considerations of the Serial Linear-Assisted Switching Converter Used as Envelope Amplifier

Envelope elimination and restoration technique and envelope tracking technique are proposed to enhance efficiency of radio frequency power amplifier (RFPA), and both of them take envelope amplifier (EA) as a high slew-rate variable voltage source. Serial linear-assisted switching converter, one of the solutions of EA, has benefits in high tracking bandwidth, high tracking accuracy, and relatively low switching losses. Among those many types of linear-assisted switching converter, the design of a linear regulator is rarely mentioned. This paper proposes a new design of linear regulator to supply a higher voltage and maintain high tracking bandwidth by dividing a linear regulator into four different parts. Beyond that, an input filter is recommended to increase the power supply rejection ratio (PSRR) of a linear regulator in high frequency, which is able to reduce the glitch caused by multilevel voltage power supply. An EA prototype is composed of the proposed linear regulator, the PSRR improvement filter, and the multilevel voltage power supply. To align signals, circular convolution is suggested as a modified algorithm. Experiments show that this prototype has a maximum output of 40 V, a tracking bandwidth of about 2 MHz for a full-range sinusoidal signal, and a tracking ability for OFDM envelope signal with a subcarrier up to 5 MHz.

Ultra‐low power current mode all‐ MOS ASK demodulator for radio frequency identification applications

An ultra-low power amplitude shift keying (ASK) demodulator for radio frequency identification (RFID) tags is presented. On the basis of a fast averaging stage, the proposed ASK-demodulator uses a current domain switching envelope amplifier which yields low-power operation. More importantly, it removes the need for a conventional voltage comparator. Designed and fabricated in a 0.18 µm complementary metal–oxide–semiconductor process on about 3000 µm2 silicon area, the proposed demodulator consumes only 7.5 µA from a magnetically coupled induced power. Operating with a 13.56 MHz carrier frequency, the circuit supports modulation indices from 7 up to 100%. The demodulator may as well be used in passive biomedical devices where power efficiency is crucial.

Envelope Tracking of an RF High Power Amplifier With an 8-Level Digitally Controlled GaN-on-Si Supply Modulator

This paper presents an envelope tracking (ET) transmitter architecture based on the combination of a novel 3-bit $(N = 3)$ supply modulator and digital predistortion (DPD). The proposed power converter is based on a direct digital-to-analog conversion architecture that implements the binary-coded sum of $N$ isolated dc voltages, allowing the synthesis of an output waveform with $L = 2^{N}$ voltage levels, with a binary distribution in the range $\Delta V = V_{M} - V_{O}$ (maximum voltage $V_{M}$ , offset voltage $Vo$ ). This solution provides a better voltage resolution $V_{S} = \Delta V/(2^{N}-1)$ with respect to typical multilevel switched-sources topologies $(V_{S} = \Delta V/N)$ . The improved voltage resolution enables the correction of the residual discretization error in the ET transmitter by means of DPD of the RF signal without the need of an auxiliary linear envelope amplifier. The proposed ET solution has been tested with an L-band 30-W lateral-diffused MOS RF high power amplifier (RF HPA) with 1.4- and 10-MHz long-term-evolution signals. In these conditions the converter demonstrated 92% and 83% efficiency, respectively, whereas the congregate efficiency of the transmitter are 38.3% and 23.9% at 5.5 and 1.9 W of average RF output power, respectively. These performances correspond to an improvement of 17.2 and 17.9 points for the power-added efficiency of the RF HPA and to 13.4 and 13 points of improvement for the efficiency of the entire transmitter with respect to fixed bias operation.

Broadband CMOS Stacked RF Power Amplifier Using Reconfigurable Interstage Network for Wideband Envelope Tracking

In this paper, a two-stage broadband CMOS stacked FET RF power amplifier (PA) with a reconfigurable interstage matching network is developed for wideband envelope tracking (ET). The proposed RF PA is designed based on Class-J mode of operation, where the output matching is realized with a two-section low-pass matching network. To overcome the bandwidth (BW) limitation from the high- Q interstage impedance, a reconfigurable matching network is proposed, allowing a triple frequency mode of operation using two RF switches. The proposed RF PA is fabricated in a 0.32- μm silicon-on-insulator CMOS process and shows continuous wave (CW) power-added efficiencies (PAEs) higher than 60% from 0.65 to 1.03 GHz with a peak PAE of 69.2% at 0.85 GHz. The complete ET PA system performance is demonstrated using the envelope amplifier fabricated on the same process. When measured using a 20-MHz BW long-term evolution signal, the overall system PAE of the ET PA is higher than 40% from 0.65 to 0.97 GHz while evolved universal terrestrial radio access adjacent channel leakage ratios are better than -33 dBc across the entire BW after memoryless digital pre-distortion. To our knowledge, this study represents the highest overall system performance in terms of PAE and BW among the published broadband ET PAs, including GaAs HBT and SiGe BiCMOS.

Dynamic Stack-Controlled CMOS RF Power Amplifier for Wideband Envelope Tracking

In this paper, a dynamic stack-controlled CMOS FET RF power amplifier (PA) is developed to enhance the efficiency of the envelope tracking power amplifier (ET PA) system for low-voltage operation. The power cell used in the two-stage PA is a quadruple-stacked FET structure with dynamic stacking controller to reconfigure the power cell into the quasi-triple or quasi-double stacks according to the magnitude of the input envelope signal. The proposed power cell boosts the peak efficiency in the low V DD region by bypassing the stack entering the triode region and reoptimizing the load impedance so that all the FETs operate under the saturation and the optimum load conditions. A detailed analysis is presented to understand the gain and phase step discontinuities at the stack switching points, and the circuit techniques to equalize the gain and phase between the adjacent stack configurations are developed. The proposed two-stage stack-controlled PA is fabricated with a 0.32-μm silicon-on-insulator (SOI) CMOS process together with the envelope amplifier (EA). Full long-term evolution (LTE) characterization is performed using LTE signals with a peak-to-average power ratio (PAPR) of 6.7 dB and signal bandwidths (BW) of 10 and 20 MHz. With 10-MHz signals, dynamic stacking provides 3.5% power added efficiency (PAE) improvement over the static stack at 25.7 dBm, resulting in 47.5% PAE with 26.6-dB gain. A 20-MHz LTE test shows an overall PAE of 45.9% with an evolved universal terrestrial radio access (E-UTRA) adjacent channel leakage ratio (ACLR) of -33 dBc with memoryless digital predistortion. Even with the lower efficiency of the EA compared with the state-of-the-art results, the measured overall system efficiency with 3.4 V maximum voltage is comparable with those reported using GaAs HBT's with 5 V supplies, which clearly demonstrates the advantages of the proposed dynamic stack control.

Design of a Two-Phase Buck Converter With Fourth-Order Output Filter for Envelope Amplifiers of Limited Bandwidth

The use of techniques such as envelope tracking (ET) and envelope elimination and restoration (EER) can improve the efficiency of radio frequency power amplifiers (RFPA). In both cases, high-bandwidth DC/DC converters called envelope amplifiers (EA) are used to modulate the supply voltage of the RFPA. This paper addresses the analysis and design of a modified two-phase Buck converter optimized to operate as EA. The effects of multiphase operation on the tracking capabilities are analyzed. The use of a fourth-order output filter is proposed to increase the attenuation of the harmonics generated by the PWM operation, thus allowing a reduction of the ratio between the switching frequency and the converter bandwidth. The design of the output filter is addressed considering envelope tracking accuracy and distortion caused by the side bands arising from the nonlinear modulation process. Finally, the proposed analysis and design methods are supported by simulation results, as well as demonstrated by experiments obtained using two 100-W, 10-MHz, two-phase Buck EAs capable of accurately tracking a 1.5-MHz bandwidth OFDM signal.

The Ripple Cancellation Technique Applied to a Synchronous Buck Converter to Achieve a Very High Bandwidth and Very High Efficiency Envelope Amplifier

This paper presents a single-stage converter for a high-bandwidth and high-efficiency envelope amplifier. In the proposed application, due to the high peak-to-average-power ratio, high bandwidth, and the power level requirements, the envelope amplifier has low efficiency. Therefore, many efforts have been made to increase the efficiency of the envelope amplifier. To achieve this improvement, the current ripple cancellation technique is applied in this paper to a synchronous buck converter to cancel the output current ripple and to decrease the switching frequency without a reduction in the large signal bandwidth, for open-loop operation and for the envelope elimination and restoration technique. The advantages of the proposed design are presented and validated experimentally. The transfer function of the output filter of the buck converter with a ripple cancellation circuit has been modeled and compared to measurements, showing a good correspondence. Experimental validation is provided at 4 MHz of switching frequency, for dc and for variable output voltage, applying a sinusoidal reference and a 64-QAM signal. Experimental validation of the efficiency improvement is provided, compared to the equivalent design of the conventional buck converter in terms of the output voltage ripple rejection ratio and large signal bandwidth.

A CMOS Envelope-Tracking Transmitter With an On-Chip Common-Gate Voltage Modulation Linearizer

This letter presents a fully integrated CMOS envelope-tracking transmitter with an on-chip common-gate voltage modulation linearizer that achieves an average output power of 26/23.5 dBm with a PAE of 33/28%, an ACLR of -33 / -32.5 dBc at a frequency of 1.9 GHz for 3.84 MHz BW 3.5 dB PAPR WCDMA and 5 MHz BW 7.5 dB PAPR LTE signals in an 0.18-μm CMOS process. The CMOS ET transmitter is integrated with an envelope amplifier, two pairs of saturated power amplifiers, and an on-chip linearizer. The total chip size is 2.5 × 1.5 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> with the input/output on-chip transformers and matching networks.

Filter Design Methodology and Application of GaN HEMTs in High-Frequency DC/DC Converter

ABSTRACTOptimization of the radio frequency (RF) transmitter performance in envelope tracking (ET) and envelope elimination and restoration (EER) techniques directly implies optimization of the envelope amplifier (EA) design. Since EA should have fast dynamic response together with high efficiency, synchronous buck is a suitable topology for this kind of application. The key issues for optimization of the converter design are the characteristics of the switching devices, the LC filter design, and the driving circuit for the switches. In this paper, design optimization of the LC filter for sinusoidal output voltage together with new technological solution for switching devices based on gallium nitride is proposed, while the applied drivers are commercially available ones, suitable for aforementioned GaN switches. Design of the output filter in synchronous buck converter for high-frequency application is important from two points of view: the first one is sufficient attenuation of the unwanted harmonics of the switching frequency so that envelope reference has minimum level of distortion and the second one is the overall impact of the filter design on the converter's efficiency. In order to increase the efficiency, the LC filter should be designed in a way to obtain compromise between the conduction and switching losses of the buck converter. In the case of sinusoidal output voltage, filter design parameter has been defined as the ratio between the maximum values of the inductor current and load current and power losses dependence on this parameter has been obtained. Theoretically obtained optimum design has been confirmed through experimental measurements, where four different designs were built and tested. On the other hand, application of new switching devices based on gallium nitride provided significant efficiency enhancement in comparison to Si MOSFETs and laterally diffused MOS transistors, due to the lower values of the gate charge and on-resistance. Tests with 64QAM and wideband code division multiple access (WCDMA) RF signals showed that these devices are the best choice for this kind of application, where the main challenge is to increase the efficiency of the signal transmission simultaneously with the bandwidth.

A Linear Assisted Switching Envelope Amplifier for a UHF Polar Transmitter

Spectrally efficient wireless communication standards impose stringent linearity specifications, which would require traditional IQ transmitters to operate with back-offed and power inefficient linear RF power amplifiers (PAs). In order to overcome such a significant limitation, alternative architectures have been proposed, as those based on the envelope elimination and restoration technique. An example of the application of this technique is the polar transmitter. In this paper, a UHF polar transmitter is presented, combining switching and linear stages in the envelope amplifier as to achieve both wide bandwidth and high efficiency, when drain modulating a GaN HEMT Class E RF PA. Several tests, using EDGE, TETRA, and WCDMA standards have been performed with good results.