Enhancement-mode Pseudomorphic High Electron Mobility Transistor Research Articles

Design and Development of Two-stage Low-noise Amplifier (LNA) using E-pHEMT Technology for C-band Application

The low-noise amplifier (LNA) is a vital part of the radio frequency (RF) transceiver system. It amplifies weak signals with minimal distortion. The LNA performance is mainly determined by its noise figure (NF), gain, and power consumption. In this paper, the design of a 6 GHz low-noise amplifier (LNA) using enhancement-mode pseudomorphic high-electron-mobility transistor (E-pHEMT) technology is presented. In order to attain high gain with low S-parameters losses, a two-stage LNA configuration with single-stub matching is devised. The same bias conditions are applied to both of the LNA stages, V DS = 2.7 V and I DS = 10 mA. The LNA design is simulated and optimised by using electromagnetic (EM) software. To further improve the overall LNA performances, high impedance inductors and series resonators are implemented into the circuit. Simulated results of the designed LNA indicate a power gain, S 21 of 25.2 dB and NF of 2.4 dB at 6 GHz with 27 mW dissipation per stage. The circuit layout is fulfilled with an E-pHEMT technology (ATF-55143) on the FR4 substrate. The LNA is powered by a 3 V DC power supply.

Design of C-band Low-noise Amplifier (LNA) Using E-pHEMT Device for Satellite Communication System

A low-noise amplifier (LNA) plays an indispensable role in a communication system for amplification purposes at the transceiver. LNA design in radio frequency (RF) circuits involve various key attributes, namely noise figure (NF), gain, and power consumption. This paper focuses on the design of a C-band LNA for satellite communication system with a centre frequency of 6 GHz using ATF-55143 enhancement-mode pseudomorphic high-electron-mobility transistor (E-pHEMT) technology. The LNA performance is augmented by adding inductors to the drain and gate of the ATF-55143 transistor. Smith chart impedance matching technique is implemented to foster a more precise matching for input and output of the LNA. In this work, the C-band LNA is biased at VDS of 2.7 V and IDS of 10 mA. Electromagnetic (EM) software is used to design and simulate the performance of the LNA circuit layout. Simulation results indicate NF of 2.66 dB and power gain (S21) of 12.29 dB. The LNA consumes 27 mW from a 3 V DC supply.

High-performance, low-noise enhancement-mode pseudomorphic high-electron-mobility transistor with gate recession by citric acid/hydrogen peroxide selective etching

An enhancement-mode pseudomorphic high-electron-mobility transistor (E-PHEMT) using a citric acid/hydrogen peroxide etching solution for gate recession is developed. The etch selectivity between GaAs and Al0.2Ga0.8As is more than 165 at 22°C, while the maximum transconductance for the fabricated device with the gate dimension of 160×0.25μm2 reaches 502mS∕mm at Vds=2.7V. Furthermore, at 12GHz, the 1dB compression output power and gain can reach 13.2dBm and 17.9dB, respectively. Operating at 12GHz, the minimum noise figure at the bias conditions of Vds=2V and Ids=11mA decreases to 0.45dB with the associated gain of 12.95dB, which is comparable to, or even better than that of, reported low-noise depletion- or enhancement-mode PHEMT devices. The standard deviation of the pinch-off voltage for the E-PHEMT across a 4in. diameter wafer could be as low as 50mV.

In0.49GaP/Al0.45GaAs Barrier Enhancement-Mode Pseudomorphic High Electron Mobility Transistor with High Gate Turn-on Voltage and High Linearity

We present an In0.49GaP/Al0.45GaAs barrier enhancement-mode pseudomorphic high electron mobility transistor (E-pHEMT) with a high gate forward turn-on voltage and a high drain current linearity. Device simulation shows that the normally observed transconductance reduction at a high VGS in E-pHEMT with a high gate turn-on voltage is closely related to the low electron carrier density of the gate side recess region to the source. We insert Al0.45GaAs into the barrier for a higher gate forward turn-on voltage and adopt In0.49GaP as an etch stop, which has less surface defects, for a higher transconductance at a high gate bias. The fabricated 0.5 µm E-pHEMT exhibits a gate forward turn-on voltage of 1.05 V, a drain current of 450 mA/mm at Vgs=1.5 V, a high transconductance of 470 mS/mm and a high linearity with gate swing for a transconductance flat region of 0.7 V.

Transconductance Linearity Improvement of Enhancement-Mode Pseudomorphic HEMT with High Gate Forward Turn-On Voltage

In this paper we discuss the sources of the transconductance reduction of enhancement-mode pseudomorphic high electron mobility transistor (E-pHEMT) at a high gate bias and methods of improving the transconductance at a high gate bias. E-pHEMT usually suffers from severe transconductance reduction at a high gate bias. Our simulation showed that this reduction is mainly due to the low channel carrier density and high access resistance of the ungated region rather than the parasitic MESFET phenomenon. An epi structure that facilitates electron transfer through the barrier layer of the ungated region and self align gate (SAG) process lead to an improvement in transconductance linearity.

The epHEMT gate at microwave frequencies

This paper examines the high-frequency behavior of the enhancement-mode pseudomorphic high electron-mobility transistor (epHEMT) gate. During this study, no bias was applied between the drain and source. Rather, the gate was forward biased with either the drain, source, or channel (drain and source connected together) grounded. While applying positive voltage V/sub g/ to the gate, one-port S-parameters were measured from 0.1 to 10 GHz and then converted to Z-parameters. Plotting the real part R of the impedance reveals two sharp peaks. The first peak occurs near the device threshold voltage for conduction in the InGaAs well. A second peak occurs at higher voltages where conduction begins to occur in the surface AlGaAs layer. An equivalent-circuit model is proposed to account for the epHEMT gate's high-frequency behavior and the proposed model is shown to be in good agreement with the experimental data.

High power Al0.3Ga0.7As∕In0.2Ga0.8As enhancement-mode PHEMT for low-voltage wireless communication systems

A 20 mm-wide enhancement-mode pseudomorphic high-electron-mobility transistor (E-PHEMT) has been developed. The device has high transconductance of 490 mS/mm, and high maximum drain current of 350 mA/mm due to the use of an Al0.3Ga0.7As/ In0.2Ga0.8As-based structure for carrier confinement. At 1.9 GHz and3.0 V, the E-PHEMT shows 34.1 dBm (128 mW/mm) output power with power-added efficiency (PAE) of 64.5%. At 2.4 V, the maximum saturated output power is 32.25 dBm and maximum PAE is 78.5%. The E-PHEMT demonstrates excellent power performance at 1.9 GHz and below 3 V.

A new model for enhancement-mode power pHEMT

Optimum loading for a power enhancement-mode pseudomorphic high electron-mobility transistor (E-pHEMT) is determined by a systematic harmonic load-pull simulation. The simulation uses a modified Angelov-Parker model that can accurately predict DC, small-signal RF, and power performance of the devices. The optimum second harmonic loading for a 2-mm device is found to be open circuit and the optimum third harmonic is at the third quadrant, which is about 1/spl ang/210/spl deg/. The measured versus modeled results show very good agreement and, therefore, verify the model. The simulation predicts that as high as 80% power-added efficiency can be achieved for E-pHEMT under optimum source and load termination with harmonic tuning.