Non-coherent impulse-radio ultra-wideband (IR-UWB) transceivers are attractive candidates for applications where the silicon area and power consumption are relatively limited. This study presents the compact digital architecture design and implementation of a non-coherent IR-UWB transmitter and receiver based on the energy detection scheme, including the synchroniser module. The software models of the designed transceiver are simulated and verified in both floating-point and fixed-point numerical representations. The synthesisable Verilog description of the transmitter and receiver architectures is simulated and verified against their fixed-point simulation model. The transmitter and receiver are implemented in the authors custom-developed field-programmable gate array (FPGA) board. The bit error rate performance of the transmitter and receiver is measured in real-time on the FPGA, utilising an accurate on-chip Gaussian noise generator. The characteristics and implementation results of the transmitter and receiver architecture on the FPGA are presented. An application-specific integrated circuit (ASIC) architecture of the IR-UWB transceiver is estimated to occupy 0.0227 mm 2 and dissipate 760 mW from a 1.0 V supply while operating at 82 MHz in a standard 32 nm complementary metal-oxide-semiconductor technology.