Electrostatic Discharge Waveforms Research Articles

20 GHz on-chip measurement of ESD waveform for system level analysis

Reliability of embedded electronic products is a challenging issue regarding ElectroStatic Discharge (ESD) events into real live applications. This is strongly related to the increased number of embedded systems and to technologies shrinking that result in less robust chips. To ensure the safety of electronic systems, the ESD events have to be taken into account at first design phase. But equipment manufacturers are facing the dilemma that no information is provided by the semiconductor manufacturers. At the same time Integrated Circuit (IC) designers have to take into account the final application environment to build the ESD protection strategy. Depending on the external components (external means around the chip) the on-chip current path could change. Understanding how the system environment impacts the current path within the chip is needed. This paper deals with on-chip oscilloscope developed for in-situ measurement of real ESD event in 65nm CMOS technology. The measurement bandwidth of the embedded sampler is 100GHz, and 20GHz for the probes. Thanks to this technique, impact of the system on the current path of the on-chip ESD strategy will be observed. Some measurement results during an ESD stress on an I/O structure will be presented and analyzed showing that PCB trace and package induce the creation of new current paths.

Study on ESD Effects of GaAs HBT Power Amplifiers for DCS/GSM Dual Band Handsets

Study on electrostatic discharge (ESD) impact on the GaAs HBT power amplifier (PA) in DCS/GSM dual band handsets is performed in this paper, which has been regarded as its main reliability issue accounting for most failures of radio frequency integrated circuits. In order to suppress the positive ESD impact on the PA in an effective but very economic way, a set of forward ESD diodes at its input port is replaced by the PN junction of GaAs HBT transistor in its first-stage. Alternatively, to introduce a set of thin film resistors (TFRs) at the front of a HBT transistor is necessary for improving the S <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">11</sub> -parameter and stability of PA; however, their electrothermal breakdown possibilities do exist. Therefore, both performance degradation and breakdown events of several PA dies are measured for different ESD voltages described by the human body model, with different TFRs chosen for both DCS and GSM bands, respectively. Their transient temperature responses are also captured and compared for different ESD waveforms, which are predicted using the in-house developed algorithm based on the hybrid time-domain finite-element method.

Comparison of ESD Immunity Between GaAs-Based LNA and SiGe-Based LNA

The comparison of electrostatic discharge (ESD) immunity is studied between a GaAs-based low-noise amplifier (LNA) and SiGe-based LNA, both operating at 850 MHz, a typical application being a mobile communications system. It analyzes the ESD effect, which occurs within communication components, such as LNA, and describes testing standard and methods. ESD test was done according to IEC61000-4-2 and MIL-Std 1686 standards in the contact mode. For further analysis on ESD test result of LNA, the effectiveness of ESD waveform into LNA was validated, using a commercial program. After the ESD test, the failed samples were carefully examined with optical microscope and environmental scanning electron microscope.

Wideband measurement system for on-chip ESD waveform characterisation

In this age where new electronic designs are constantly pushing the limits of technology, there is a persistent need for better electrostatic discharge (ESD) protection. Proposed is a measurement probe architecture that can be used for on-chip ESD waveform characterisation. The probe circuit design is presented and test results show the feasibility of the proposed system. Such a measurement system provides invaluable information, aiding the electronics designer in the search for more robust chip designs.

Peak current failure levels in ESD sensitive semiconductor devices and their application in evaluation of materials used in ESD protection. Part 1: Theoretical analysis

This paper shows that theoretical analysis of the thermal model of damage to electrostatic discharge (ESD) energy susceptible devices combined with data from Human Body Model test on devices can be used to estimate an ESD pulse current threshold for damage to ESD energy susceptible semiconductor devices over a wide range of ESD duration and waveforms. The technique is intended for laboratory evaluation of ESD threats from equipment, materials and other ESD sources in the electronics assembly factory environment. In Part 2 of this paper the predicted ESD current damage threshold is experimentally demonstrated to give a useful boundary to a ‘safe’ area of ESD current and duration.

Hierarchical-clustering-scheme-based analysis of electrostatic discharge current in terms of an electromagnetic interference assessment

A hierarchical-clustering-scheme-based analysis of the electromagnetic interference (EMI) effects due to an electrostatic discharge (ESD) which can sometimes cause serious damage to electrical systems is presented. A hierarchical clustering scheme is used to classify the EMI-related properties that result from ESD events. The scheme can classify target objects into several groups with a tree-like structure. Furthermore, to evaluate the effect of a high-speed moving discharge one-shot discharges were repeatedly generated and the resulting ESD current measured in the time domain. Based on the measured data for charging voltages of 2, 5, 10 and 15 kV several differential properties of ESD waveforms have been examined including the maximum absolute peak level and the energy level for the three frequency regions, and the data has also been analysed using the hierarchical clustering scheme. The results show that high-speed moving discharges can increase the maximum amplitude and relative energy of ESD events and that clusters of ESD events can be effectively divided according to similarities in EMI-related properties.

From lightning to charged-device model electrostatic discharges

In an effort to understand the commonality among various electrostatic discharge (ESD) phenomena including lightning and the charged-device model (CDM) ESD, we have developed a simple analytic model to study the growth of the discharge current during air breakdown, using Townsend's electron multiplication mechanism. The model calculates ESD waveforms from given initial conditions and geometry. It derives the functional dependence of waveform characteristics on physical quantities such as electron mobility, charge transfer, and breakdown electric field. This model is applied, for the first time, to explain the current waveforms observed both in the lightning and the fixed-gap CDM discharges where the length scales for these two phenomena are six-seven orders of magnitude apart.

On the frequency domain specification of ESD waveforms

Traditionally, electrostatic discharge (ESD) waveforms have been measured and analyzed in the time domain and various waveform parameters have been related to the severity of the discharge charge induce effects. The present paper proposes the specification of ESD waveforms in the frequency domain. Measured ESD waveforms are digitized and their amplitude spectra are calculated and plotted. Parameters of the frequency domain spectra are related to the time domain parameters. It is demonstrated that frequency domain characteristics provide a standardized and easily interpreted specification of ESD waveforms which should be considered in conjunction with traditional time domain parameters.