Electrostatic Discharge Current Research Articles

Novel ESD device design for STT-MRAM memory chip

An investigation of the influence of the magnetic field induced by electrostatic discharge (ESD) current on magnetic tunnel junction (MTJ) device is presented in the paper. The transient magnetic field generated by the ESD current is not considered in the traditional CMOS ESD protection strategy, which may be a reason of the degradation of the performance and the robustness of STT-MRAM. An ESD protection circuit of STT-MRAM is proposed in the paper, including the diode-based ESD devices, the filter circuit and the power clamp. Based on the waveform analysis of the three ESD standard test models, including HBM, MM and CDM, a filter circuit is added in the ESD device to decrease the influence of the high frequency components on the magnetic device. The diode-based ESD devices are integrated in the ESD structure, which is used for the ESD window of STT-MRAM for its low operating voltage. Based on the operation mechanism of the STT-MRAM, its ESD window allows a low operating voltage, thus the diode-based devices are chosen to be integrated in the ESD device. The distribution and magnitude of the magnetic field are studied in the paper. The results show that the ESD protection circuit of STT-MRAM can effectively suppress the magnetic field generated by the ESD current, hence increasing the stability of STT-MRAM. Under the influence of the HBM, MM and CDM events, the ESD disturbance probability of the MTJ device are 2.0 × 10−12, 5.8 × 10−9 and 1.1 × 10−12 respectively. The influence of the memory density and the distance between pads and memory array are also investigated in this paper. The ESD protection strategy proposed in the paper can be adopted for the future high performance STT-MRAM.

Drain Side Area-Modulation Effect of Parasitic Schottky Diode on ESD Reliability for High Voltage P-Channel Lateral-Diffused MOSFETs

This letter focused on the additive effect of horizontal Schottky diodes on the drain side of a high-voltage p-channel laterally diffused metal–oxide–semiconductor (pLDMOS). These components were evaluated using transmission-line pulse and human body model (HBM) tests. When the parasitic Schottky area at the drain was smaller, the Schottky characteristics were less obvious; the device’s current mostly flowed through the heavily doped $\text{P}^{+}$ area, and the improvement in ${I}_{\text {t2}}$ was minor. When the parasitic Schottky area covered more than 60% of the drain side, the Schottky area accounted for the majority of current flow; therefore, the electrostatic discharge current could flow more evenly. These modified pLDMOSs can withstand higher voltages because of their parasitic Schottky diodes and higher impedance. In addition, their ${I}_{\text {t2}}$ values are superior to those of normal pLDMOSs. With the drain side of the pLDMOS completely covered by Schottky diodes, the device produced the highest ${I}_{\text {t2}}$ value of 1.659 A (130.4% higher than that of the reference sample), an HBM value of 5 kV (300% higher than the reference), and an improved holding voltage (4% greater than that of the reference).

A latch-up-free LVTSCR with improved overshoot characteristic for ESD protection in 40 nm CMOS process

In this paper, a novel robust low-voltage-triggered silicon-controlled rectifier (LVTSCR) with high holding voltage, low trigger voltage, and low overshoot voltage has been proposed for 5 V integrated circuit electrostatic discharge (ESD) protection. The new LVTSCR integrates an extra low-resistance current path by embedding an NMOS transistor into the traditional LVTSCR. This extra current path will divert part of the ESD current, thus resulting in a lower overshoot voltage as well as better quasi-static I–V characteristics in the new structure. As such, the holding voltage of the new LVTSCR has been increased by ∼23%, the quasi-static triggering characteristic has been decreased by ∼8%, and the overshoot voltage has been improved by ∼38%.

Analysis of the ESD Reconstruction Methodology Based on Current Probe Measurements and Frequency Response Compensation for Different ESD Generators and Severity Test Levels

System-level electrostatic discharge testing according to IEC 61000-4-2 has been the main standardized electrostatic discharge immunity testing procedure for the last few decades. The correlation between a failed test result and the injected electrostatic discharge current waveform characteristics, as well as the reduced reproducibility of the standard methodology, have always concerned product manufacturers and test engineers. In an effort to accurately reconstruct the electrostatic discharge current during immunity testing, researchers are focusing more and more on the usability of current probes in capturing the injected current in “real time”. In this article, the results of a proposed methodology, based on current probe measurements and a frequency response compensation method, published in recent bibliography, for different test levels and electrostatic discharge generators are presented, aiming to highlight the advantages and disadvantages of the method, investigate its universal applicability, and introduce points of future work toward the current reconstruction during system-level electrostatic discharge testing effort.

Ignition of zirconium powders placed near an electrostatic discharge

Abstract Electrostatic discharge (ESD) or spark produced by breakdown of a gap while discharging a capacitor is a common ignition stimulus for powders of reactive and energetic materials. It is a safety hazard, but is also used to initiate pyrotechnic formulations and as a characterization method of reactivity of energetic materials. In previous experimental studies, the powder served as one of the ESD electrodes. Ignition was found to be caused by Joule heating, with the main heat release by current passing through points of contact between particles. However, ignition may occur when the ESD does not pass directly through the powder. ESD generates a shock wave, which can lift the powder from a substrate even if the substrate is not an electrode. ESD also generates a plasma kernel heated to ca. 10,000 K, which exists for hundreds of µs, often much longer than the ESD current. Here, the effect of the ESD-induced shock and plasma on a reactive powder was studied experimentally for the first time. A thin layer of Zr powder was placed on a substrate located under a spark gap between two pin electrodes. Photo-sensors and high-speed video were used to document ignition and combustion events. The ESD energy and distance from the spark gap and powder were varied. At close distances, particles ignited consistently. Distance limits were determined, beyond which ignition was no longer observed. Higher ESD energies as well as longer ESD pulses led to ignition at greater distances. Ignition involved two distinct processes. First, submicron particles were lifted from the substrate on a time scale of single microseconds, interacted directly with the plasma kernel, and combusted. Optical emissions from this combustion lasted 100 – 600 µs, as expected for the burn time of submicron Zr particles in air. The second ignition event occurred several milliseconds later. It involved a flame propagating through Zr powder aerosol or combustion of individual lifted particles. This event was caused by coarser Zr particles radiatively heated during ESD. Importantly, the powder was aerosolized by convective flows caused by the rising plasma kernel making it possible for the self-heating of particles oxidizing in air to eventually lead to their ignition and combustion. Observed times for these delayed ignition and combustion events were in the order of tens of milliseconds.

Electrostatic Discharge Simulation and Experimental Verification of a Simple PCB Device

In this paper, a simple device under electrostatic discharge (ESD)event is considered. This work presents a simple experimental and simulated setup to measure ESD‐induced voltage to trace on a printed circuit board (PCB) when ESD current is injected directly onto the lumped element. Based on an ESD immunity test platform and ESD full‐wave model, the waveform of coupling voltage, which induced on a PCB, are measured at different discharging position. The voltage waveform of resistor on PCB with chip and without chip are compared to analyze the difference in two cases. The paper proposes a method that compares the measured results of experiment with simulation of full‐wave model. It is found that the results of simulation and experiment is in good match on the whole.

Обеспечение электромагнитной совместимости морской техники при возникновении электростатических разрядов

The paper describes the problem of electromagnetic compatibility for electrostatic discharge (ESD), which is most actual for ships where all systems are highly automated and susceptible to ESD digital technology. The results of electromagnetic compatibility tests of ship systems after their installation on the vessel allow to conclude that it is not enough to fulfill only the existing ESD immunity requirements of the Russian Maritime register of shipping which are currently confirmed by ESD tests in the laboratory. ESD methods and reasons have been analyzed. The possible accumulated potentials and parameters of currents, voltages and field strengths during discharge are presented. The existing ESD immunity standards are being considered. The scheme of the developed and certified generator of electrostatic discharges ESD – 25000 is presented. The most frequent defects under the influence of ESD are given. There have been formulated the equivalent schemes of the electric equipment housing at different lengths of grounding of the housing and the methods of connecting the cover with the housing. The results of measurements of electric field and magnetic field parameters are presented. The results of modeling and experiments are compared. The developed sensors, methods of their calibration and obtained technical characteristics are being tested. There are given the parameters and forms of ESD voltage and current, experimental data of ESD secondary effects in the EE hull and adjacent equipment, results of discharges in the ship's cable, interference in the supply network through secondary power sources. The most effective design and ESD protection methods have been analyzed

Electrostatic Discharge Experiment Results on Ground Using Experiment Model of HORYU-IV

HORYU-IV is a 30 cm cubic satellite with an approximate mass of 11 kg. The satellite was successfully launched by a JAXA H-IIA rocket to an orbit of 575 km altitude with a 31° inclination on February 17, 2016. HORYU-IV’s main mission is to capture an electrostatic discharge (ESD) current waveform by an onboard oscilloscope and capture its image by a camera triggered by the oscilloscope. HORYU-IV captured various ESD current waveforms and images in space. Ground-based experiments were carried out to compare the waveforms between the flight results and the ground results. The results of ground-based experiments, compared with the flight results, had lower peak currents and longer durations. This result does not match past ground-based experiments showing that ESD current has lower peaks and longer durations when ambient pressure is lower. Also, the relationship between ESD occurrence location and ESD current waveforms was found through ground-based experiment.

Electrostatic discharge currents representation using the analytically extended function with p peaks by interpolation on a D-optimal design

In this paper the Analytically Extended Function (AEF) with p peaks is used for representation of the electrostatic discharge (ESD) currents and lightning discharge currents. The fitting to data is achieved by interpolation of certain data points. In order to minimize unstable behaviour, the exponents of the AEF are chosen from a certain arithmetic sequence and the interpolated points are chosen according to a D-optimal design. The method is illustrated using several examples of currents taken from standards and measurements.

69–78 GHz ESD‐protected SiGe BiCMOS PA with 30 dB automatic level control for mm‐wave 5G applications

A silicon–germanium BiCMOS E-band power amplifier (PA) for millimetre-waves for Gbit/s data rates in fifth-generation cellular wireless backhaul networks is presented. A 69–78 GHz transmission-line PA is demonstrated by integrating an electrostatic discharge (ESD) and a power detector together. To save this area, a transmission-line-based power coupler is shared by the ESD and the power detector. The ESD achieves an insertion loss of <1.5 dB in the frequency range of 17–100 GHz. The linear-in-dB output characteristic of the power detector is achieved by an exponential voltage convertor. The designed PA measured a maximum gain of 18.6 dB with 3 dB bandwidth of 68.9–78.7 GHz. The input return loss is better than −10 dB from 50 to 81 GHz. It delivers 10 dBm saturated output power at 73.4 GHz. Transmission line pulsing (TLP) measurement result shows that the voltage is clamped below 6 V even under 10 A ESD current.

Electrostatic discharge currents and their derivatives' approximation by piecewise power-exponential functions

An analytically extended function based on power-exponential functions is used in this paper for approximation of electrostatic discharge (ESD) currents and their derivatives. The Marquardt least-squares method (MLSM) is applied for obtaining nonlinear function parameters. IEC 61000-4-2 Standard ESD current is approximated, as well as some measured ESD currents' wave shapes. Power-exponential terms are extended at the local maxima and minima of the represented wave shape, so that this approximation is done from peak to peak. ESD current derivative is approximated using the same procedure in order to obtain the continuous second order derivative of the current, as all piecewise functions are of differentiability class C$^{1}$. Currents and their derivatives are often measured in ESD experiments so that their analytical representation is needed for simulation of ESD phenomena, better definition of standard requirements, and computation of the transient fields and induced effects.

Design of 2.4-GHz T/R switch with embedded ESD protection devices in CMOS process

As CMOS processes advanced, the integration of radio-frequency (RF) integrated circuits was increasing. In order to protect the fully-integrated RF transceiver from electrostatic discharge (ESD) damage, the transmit/receive (T/R) switch of transceiver frond-end should be carefully designed to bypass the ESD current. This work presented a technique of embedded ESD protection device to enhance the ESD capability of T/R switch. The embedded ESD protection devices of diodes and silicon-controlled rectifier (SCR) are generated between the transistors in T/R switch without using additional ESD protection device. The design procedure of RF circuits without ESD protection device can be simplified. The test circuits of 2.4-GHz transceiver frond-end with T/R switch, PA, and LNA have been integrated and implemented in nanoscale CMOS process to test their performances during RF operations and ESD stresses. The test results confirm that the embedded ESD protection devices can provide sufficient ESD protection capability and it is free from degrading circuit performances.

High holding voltage SCR for robust electrostatic discharge protection**Project supported by the National Natural Science Foundation of China (Grant Nos. 61376080 and 61674027) and the Natural Science Foundation of Guangdong Province, China (Grant Nos. 2014A030313736 and 2016A030311022).

A novel silicon controlled rectifier (SCR) with high holding voltage ( for electrostatic discharge (ESD) protection is proposed and investigated in this paper. The proposed SCR obtains high by adding a long N+ layer (LN+) and a long P+ layer (LP+), which divide the conventional low voltage trigger silicon controlled rectifier (LVTSCR) into two SCRs (SCR1: P+/Nwell/Pwell/N+ and SCR2: P+/LN+/LP+/N+) with a shared emitter. Under the low ESD current (, the two SCRs are turned on at the same time to induce the first snapback with high (. As the increases, the SCR2 will be turned off because of its low current gain. Therefore, the will flow through the longer SCR1 path, bypassing SCR2, which induces the second snapback with high (. The anti-latch-up ability of the proposed SCR for ESD protection is proved by a dynamic TLP-like (Transmission Line Pulse-like) simulation. An optimized of 7.4 V with a maximum failure current ( of 14.7 mA/ is obtained by the simulation.

ESD Propagation Dynamics on a Radially Symmetric Coupon

An increasing body of research has been dedicated to determining the magnitude and scaling of spurious electrostatic discharge current transients on solar arrays and other spacecraft dielectrics under inverted gradient charging conditions. A flashover propagation velocity is typically determined, and assumed to be a single constant number that characterizes the collection of events. The complexity of flight-like test articles and diversity of methods used for deriving this velocity from laboratory data have led to apparently conflicting results. In this paper, we attempt to clarify the radial dynamics of electrostatic discharge (ESD) plasmas on a positively charged surface via the use of a simple test article, composed of eight concentric annular electrodes covered with Kapton. Time-resolved induced ESD currents, recorded as a function of electrode radial distance from the inception point, were used to derive empirical velocity distributions. These distributions lead to a number of effects, such as $\sim 1/r^{2}$ scaling with distance at the beginning of a discharge. Implications for ESD propagation and comparison with previous studies are discussed.

Human-to-metal electrostatic discharge current measurements – Notes on the ESD current waveform

The Electrostatic Discharge (ESD) phenomenon has been described through the IEC 61000-4-2. ESD current parameters' values, have been set in this Standard. The theoretical ESD current waveform defined in this standard, describing the conventional Contact discharge mode, needs to be re-evaluated on the basis of accurate experimental data. Even though the standard deals with commercial ESD generators, its goal is to simulate the natural phenomenon as good as possible. More and accurate data may contribute to the better simulation of the natural phenomenon. New values and better comprehension of the phenomenon demand new measurements based on high end measuring equipment. Such works and publications have been carried out the past years. Yet, the need to systematize and integrate this work remains. Larger and trust-worthy series of measurements need to be carried out and presented clearly.This paper deals with new ESD-current data, taken with broadband equipment. New and more detailed measurements like these, were never before taken at such a large number of individuals. The goal of this work is that the data acquired can serve as a basis for re-evaluating the conventional approach of the scientific community to the ESD event.In this paper, using a broadband measuring system, new parameters' values are measured and relations are presented, following standard statistical procedures. The results, which occur from measurements carried out on tenths of human individuals, are questioning the Standard in many points. A new way of approaching the standardization of the ESD current is proposed, as the excuse of the poor measuring equipment that sets barriers on the measuring accuracy, does not apply any more. The charging voltages of 500 V and 1000 V were also examined since such range of voltages are often met at ESD events and they are considered very harmful.

ESD Detection Circuit and Associated Metal Fuse Investigations in CMOS Processes

A circuit to detect and record the occurrence of an electrostatic discharge (ESD) event on a powered or unpowered integrated-circuit (IC) chip is presented. The ESD detection circuit uses metal fuses for memory and has been experimentally verified in a commercial CMOS process to operate with 500 V or higher human body model (HBM) discharges. Experimental studies of metal fuses are also presented and provide information on short-duration metal interconnect failure limits in addition to the ESD event-detection goal. It is found that thin aluminum traces in an IC (e.g., 0.25-1-μm-width metal-1) may withstand from 50 to > 100 mA for periods exceeding several seconds or minutes, values in excess of 100 times the typically used long-term reliability electromigration limit of 1 mA/μm. For fuses used in the detection circuit, reliable fuse blowing is achieved at HBM ESD currents as low as 0.3 A using either transmission-line-pulse or full-voltage discharges (100-pF capacitance at 500 V discharged through 1500-Ω series resistance).

New function for representing IEC 61000-4-2 standard electrostatic discharge current

New function for representing electrostatic discharge (ESD) currents according to the IEC 61000-4-2 Standard current is proposed in this paper. Good agreement with the Standard defined parameters is obtained. This function is compared to other functions from literature. Its first derivative needed for field calculations is analyzed in the paper. Main advantages are simplified choice of parameters, possibility to obtain discontinuities in the decaying part, and zero value of the function first derivative at t=0+. Parameters of the function are obtained by using Least-squares method (LSQM).

Model of heating and ignition of conductive polydisperse powder in electrostatic discharge

Heating of a conductive polydisperse powder by electrostatic discharge (ESD) is modelled numerically. Powder packing is described using a discrete element model; powder resistance is defined by geometry of particle contacts and properties of plasma produced by electrical breakdown between neighbour particles. A set of parametric calculations in combination with experimental data is used to determine necessary adjustable model parameters. The model predicts the temperature for each powder particle resulting from its heating by the ESD current. Location and packing of individual particles within the powder affects greatly their achieved temperatures and thus the likelihood of ignition. Consistently with experiments, a trend showing that smaller particles are generally heated to higher temperatures at a given ESD energy is detected for coarser powders; this trend becomes less clear for finer powders with particle sizes less than the breakdown distance given by the Paschen curve in air. Comparison of the experimental data and calculations suggests that the transition from single particle to cloud combustion occurs when the distance between the particles ignited by ESD becomes close to the flame size for the individual burning particle. This distance, inversely proportional to the number of ignited particles, is primarily determined by the ESD energy.

How Does Electrostatic Discharge Event Not Cause Polarity Flip in TMR Read Heads?

Electrostatic Discharge (ESD) current causes both hard and soft failures on GMR read head technology; however, the current head technology such TMRs, the soft failure phenomenon such magnetization reversal has not been well understood. The previous published work only states that the soft failure does not occur on TMR technology; however none has pinpointed the cause of it. This work for the first time thoroughly explain the mechanism why ESD current does not cause a magnetization reversal on TMR read head instead ESD event likely induces only hard failure on TMRs. The explanation of this mechanism was conducted by investigating the important parameters such as Blocking Temperature (TB), Neel Temperature (TN), Curie Temperature (TC), and Electric Field Breakdown (EB) of a particular TMR head were monitored while an ESD current being applied by using Finite Element simulator. The results reveal that the oxide breakdown at the insulator layer occurs at a lower level of ESD current; for example this particular TMR head the oxide breakdown occurs at ESD peak current of 4 mA while it requires 6 mA to causes a magnetization reversal.

1 fF ESD protection device for gigahertz high-frequency output ESD protection

A mutual-protection scheme is proposed to achieve an ultra-low capacitance electrostatic discharge (ESD) protection device. The ESD protection device can not only dissipate ESD current, but also can make the vulnerable output transistor have the ESD protection capability. Namely, the output transistor can also protect ICs and help the ESD protection device to share the ESD current. Using this scheme can discharge more ESD current than the summation current of the two individual devices. From the ESD test result, it can achieve the required ESD level by using the ultra-low capacitance ESD protection device (∼1.2 fF).