Electronic Analog-to-digital Converter Research Articles

Multi-channel photonic sampled ADC with hybrid deep-learning for distortion recovery

Analog-to-digital converter (ADC) is indispensable components in modern information systems, and photonic technologies have emerged as promising avenues for overcoming bottlenecks in ADC performance. This paper introduces a novel approach: a photonic sampled ADC integrated with a neural network that combines Convolutional Neural Networks (CNNs) and Transformers for data recovery. The proposed system utilizes a multi-wavelength optical sampling pulse train interleaved in the time domain through fiber dispersion. Sampled signals are quantified in parallel channels by electronic ADC (EADC). Through supervised training, the hybrid deep neural network extracts both local and global features of photonic system defects, enabling the recovery of distorted data. Experimental validation showcases the effectiveness of this architecture, achieving successful reconstruction of radio frequency (RF) signals at a sampling rate of 12 Giga-samples per second (Gs/s) with an effective number of bits (ENOB) of 7.13. The results underscore the potential of the proposed architecture in achieving high conversion accuracy in multi-channel photonic sampled ADCs.

Analysis of Bandwidth Reduction and Resolution Improvement for Photonics-Assisted ADC

To keep pace with increasing data rates in the worldwide communication networks and the increased bandwidths requirements in measurement devices, sensors, radar, and many other applications, photonics-assisted analog-to-digital converters (PADCs) may be promising alternatives to circumvent the bandwidth bottleneck in pure electronic analog-to-digital converters (EADCs). Here we analyze optical sub-Nyquist orthogonal sampling with sinc-pulse sequences for the time-interleaving of high-bandwidth input signals into parallel low-bandwidth sub-signals (first sampling stage). These sub-signals are then detected and further processed with low-bandwidth electronic devices in parallel branches (second sampling stage). Orthogonal sampling with ideal devices is error-free. Additionally, in contrast to electronic sample and hold circuits, the first sampling stage is based on a multiplication and not a switching. Therefore, it adds no aperture jitter and the low jitter of today's oscillators can be directly transferred to the sampling of high-bandwidth signals. Compared to the direct detection, in simulations and a proof of concept experimental demonstration, we show around 8.5 dB signal-to-noise and distortion (SINAD) and 1.4 bit effective number of bits (ENOB) improvement for the detection of a 14.5 GHz signal with the proposed method in a three-branch system. With further simulations we analyze the possibilities and limits of the method and derive an equation for the resolution. In a nine-branch system with a jitter of 10 fs for the oscillator and 100 fs for the electronics, 100 GHz input signals can be processed with a resolution of 6 bit in 11 GHz electronics, for instance. The scheme is only based on a modulator and standard RF equipment. Therefore, integration into a single chip, together with the following electronic ADCs is straightforward.

Toward Terabit Receivers for Optical and Wireless Communications

Data rates and bandwidths in global optical communication networks and their wireless access are continuously rising as a result of new applications. Besides communication, high bandwidth devices are also needed for radar, sensors and measurement systems. These increasing bandwidths might lead to problems for the electronic analog-to-digital converters (ADC) in the digital systems. A 1Tbit/s, 16-QAM modulated data signal, for instance, needs an analog processing bandwidth of 80 GHz, which is far beyond the possibilities of today's standard CMOS technology. Additionally, higher bandwidths are accompanied by a lower conversion resolution, which requires higher signal-to-noise ratios for the signals to be detectable. Here we discuss these connections and review possibilities for a solution by a photonics assisted parallelization of the incoming high bandwidth signal into several low bandwidth sub-signals in the time and frequency domain. These sub-signals can then be detected and processed with low bandwidth electronics, circumventing the CMOS bandwidth problem. This review primarily focuses on bandwidth reduction using time-frequency coherence. Since it only needs low bandwidth standard electronics and photonics, the seamless integration with the electronic ADCs into any electronic-photonic platform is straightforward. Therefore, it could become an important component of future terabit receivers in optical and wireless communication.

Photonic serial implementation of a flash analog-to-digital converter.

A photonic analog-to-digital converter (ADC) scheme based on multi-wavelength sampling and balanced detection is proposed and experimentally demonstrated. In the approach, a power-weighted multi-wavelength pulsed source is employed to implement sampling, a dispersion element is used to realize temporal walk-off of multi-wavelength pulses, and a thresholding module is applied to implement serial thresholding. The principles of quantization and encoding are similar to that of an electronic flash ADC, but the serial implementation in the given approach avoids the use of large numbers of comparators. A proof-of-concept experiment with three wavelengths is successfully demonstrated. We also discuss the feasibility of the approach and the design of non-uniform quantization by properly setting the power ratio of the multi-wavelength pulses.

An Interleaved Broadband Photonic ADC Immune to Channel Mismatches Capable for High-Speed Radar Imaging

A dual channel interleaved broadband subsampling photonic analog-to-digital converter (ADC) immune to channel mismatches capable for high-speed radar imaging is presented. Through modeling as a combination of photonic subsampling front-end and interleaved Nyquist sampling electronic ADC back-end, the mechanism of photonic interleaved subsampling of broadband signal and the appearance of spurious components caused by channel mismatches are explained. The effect of these spurious components on radar detecting is revealed. Through fractional Fourier domain filtering, the spurious components are eliminated, making the SNR of received X-band chirp signal (8–11.9 GHz) improved from 13.26 to 23.88 dB. Thanks to its downsampling and interleaved architecture, the demands of bandwidth, sampling rate, and storage depth for post electronics are all lowered, making it capable for high-speed and mass data receiving. In the experiment, inverse synthetic aperture radar imaging is performed characterized with range and cross range resolution of 4.9 and 7.9 cm. The false target due to the spurious component is distinguished through band-pass filtering in matched fractional Fourier domain.

Pipelined photonic analog-to-digital converter

Electronic analog to digital converters (EADCs) face serious challenges when the root mean square timing jitter of the sampling pulse is less than a femtosecond. This restriction limits the maximum allowable sampling frequency of an EADC. In photonic analog-to-digital conversion (PADC), using a mode locked laser as a sampling source limits the sampling frequency timing jitter only at sub-femtosecond levels. The current architectures for PADC use photonic techniques either for sampling or for quantization. Consequently, current PADC architectures are not suitable for higher frequency applications because of the limitations of their electronic components. In this paper, the feasibility of implementing concept architecture for a fully photonic pipelined ADC is analyzed and evaluated to provide a design for an 8-bit pipelined PADC, the performance of which is investigated through modeling and simulation. The 8-bit pipelined PADC’s effective number of bits is shown to be 4.34 bits at 200 gigasample per second.

Self-balanced real-time photonic scheme for ultrafast random number generation

We propose a real-time self-balanced photonic method for extracting ultrafast random numbers from broadband randomness sources. In place of electronic analog-to-digital converters (ADCs), the balanced photo-detection technology is used to directly quantize optically sampled chaotic pulses into a continuous random number stream. Benefitting from ultrafast photo-detection, our method can efficiently eliminate the generation rate bottleneck from electronic ADCs which are required in nearly all the available fast physical random number generators. A proof-of-principle experiment demonstrates that using our approach 10 Gb/s real-time and statistically unbiased random numbers are successfully extracted from a bandwidth-enhanced chaotic source. The generation rate achieved experimentally here is being limited by the bandwidth of the chaotic source. The method described has the potential to attain a real-time rate of 100 Gb/s.

A novel time and wavelength interleaved optical pulsed signal for a high resolution photonic analogue to digital converter

This paper presents a parallel architecture for a photonic Analog to Digital Converter (ADC) in a direct conversion receiver. A novel technique for the generation of time and wavelength interleaved laser source having a broad spectrum and a repetition rate of 8 GHz is proposed for the sampling of the photonic ADC. The quantization is realized in electrical domain by employing four state of the art ADCs , each having a sampling rate of 2 GHz and a resolution of 10 bit. We investigate the performance of our novel architecture by computing the Signal to Noise Ratio and comparing it with the conventional electronic ADC. Additionally we have also observed the effect of laser jitter on the sensitivity of a direct conversion receiver.

Compensation of multi-channel mismatches in high-speed high-resolution photonic analog-to-digital converter.

We demonstrate a method to compensate multi-channel mismatches that intrinsically exist in a photonic analog-to-digital converter (ADC) system. This system, nominated time-wavelength interleaved photonic ADC (TWI-PADC), is time-interleaved via wavelength demultiplexing/multiplexing before photonic sampling, wavelength demultiplexing channelization, and electronic quantization. Mismatches among multiple channels are estimated in frequency domain and hardware adjustment are used to approach the device-limited accuracy. A multi-channel mismatch compensation algorithm, inspired from the time-interleaved electronic ADC, is developed to effectively improve the performance of TWI-PADC. In the experiment, we configure out a 4-channel TWI-PADC system with 40 GS/s sampling rate based on a 10-GHz actively mode-locked fiber laser. After multi-channel mismatch compensation, the effective number of bit (ENOB) of the 40-GS/s TWI-PADC system is enhanced from ~6 bits to >8.5 bits when the RF frequency is within 0.1-3.1 GHz and from ~6 bits to >7.5 bits within 3.1-12.1 GHz. The enhanced performance of the TWI-PADC system approaches the limitation determined by the timing jitter and noise.

Photonic ADC: overcoming the bottleneck of electronic jitter

Accurate conversion of wideband multi-GHz analog signals into the digital domain has long been a target of analog-to-digital converter (ADC) developers, driven by applications in radar systems, software radio, medical imaging, and communication systems. Aperture jitter has been a major bottleneck on the way towards higher speeds and better accuracy. Photonic ADCs, which perform sampling using ultra-stable optical pulse trains generated by mode-locked lasers, have been investigated for many years as a promising approach to overcome the jitter problem and bring ADC performance to new levels. This work demonstrates that the photonic approach can deliver on its promise by digitizing a 41 GHz signal with 7.0 effective bits using a photonic ADC built from discrete components. This accuracy corresponds to a timing jitter of 15 fs - a 4-5 times improvement over the performance of the best electronic ADCs which exist today. On the way towards an integrated photonic ADC, a silicon photonic chip with core photonic components was fabricated and used to digitize a 10 GHz signal with 3.5 effective bits. In these experiments, two wavelength channels were implemented, providing the overall sampling rate of 2.1 GSa/s. To show that photonic ADCs with larger channel counts are possible, a dual 20-channel silicon filter bank has been demonstrated.

Demonstrations of analog-to-digital conversion using a frequency domain stretched processor

The first proof-of-concept demonstrations are presented for a broadband photonic-assisted analog-to-digital converter (ADC) based on spatial spectral holography (SSH). The SSH-ADC acts as a frequency-domain stretch processor converting high bandwidth input signals to low bandwidth output signals, allowing the system to take advantage of high performance, low bandwidth electronic ADCs. Demonstrations with 50 MHz effective bandwidth are shown to highlight basic performance with approximately 5 effective bits of vertical resolution. Signal capture with 1600 MHz effective bandwidth is also shown. Because some SSH materials span over 100 GHz and have large time apertures (approximately 10 micros), this technique holds promise as a candidate for the next generation of ADCs.

Subpicosecond jitter in picosecond electron bunches

We have simulated and measured 60–120fs time jitter of photoelectron pulses emitted by a nitride photocathode at 100GHz rate as in order to evaluate the resolution performance of a previously proposed photonic analog to digital converter. Recently, there has been an increasing demand for high speed analog-to-digital converters (ADCs) for microwave bandwidth signals. State of the art electronic ADCs have reached 10Gigasamples∕second (GS/s), 6–12bit performance [P. W. Juodawlkis, J. C. Twichell, G. E. Betts, J. J. Hargreaves, R. D. Younger, J. L. Wasserman, F. J. O’Donnell, K. G. Ray, and R. C. Williamson, IEEE Microwave Theory Tech. 49, 1840 (2001)]. We have previously introduced a photoelectronic ADC implementation with measured performance of 3bits at 100GS∕s [K. Ioakeimidi, R. Leheny, S. Gradinaru, K. Ma, R. Aldana, J. Clendenin, J. S Harris, R. F. W. Pease, IEEE Trans. Microwave Theory Tech. (to be published); Conference on Lasers and Electro-Optics, Baltimore MD, 1–6 June 2003]. The basic operating principle of the ADC is based on a miniaturized cathode ray tube where a bunch of photoemitted electrons passing through an electric deflection system is directed to a specific detector whence a digital code word emanates. The electron bunch samples the analog deflecting voltage that is then quantized according to the position of the detector receiving the bunch. The fundamental limit of the number of distinguishable voltage levels is the ratio of the deflecting voltage to the energy spread due to diffraction of the electron beam. This allows for up to 12bits at 100GS∕s [R. F. Pease, K. Ioakeimidi, R. Aldana, and R. Leheny, J. Vac. Sci. Technol. B 21, 2826 (2003)]. At a more practical level, the bit resolution is primarily limited by the uncertainty in the emission of each electron bunch (temporal jitter). For 100fs time uncertainty 5bits of resolution are attainable with the nitride cathode for a 50GHz bandwidth analog signal.

Optically sampled analog-to-digital converters

Optically sampled analog-to-digital converters (ADCs) combine optical sampling with electronic quantization to enhance the performance of electronic ADCs. In this paper, we review the prior and current work in this field, and then describe our efforts to develop and extend the bandwidth of a linearized sampling technique referred to as phase-encoded optical sampling. The technique uses a dual-output electrooptic sampling transducer to achieve both high linearity and 60-dB suppression of laser amplitude noise. The bandwidth of the technique is extended by optically distributing the post-sampling pulses to an array of time-interleaved electronic quantizers. We report on the performance of a 505-MS/s (megasample per second) optically sampled ADC that includes high-extinction LiNbO/sub 3/ 1-to-8 optical time-division demultiplexers. Initial characterization of the 505-MS/s system reveals a maximum signal-to-noise ratio of 51 dB (8.2 bits) and a spur-free dynamic range of 61 dB. The performance of the present system is limited by electronic quantizer noise, photodiode saturation, and preliminary calibration procedures. None of these fundamentally limit this sampling approach, which should enable multigigahertz converters with 12-b resolution. A signal-to-noise analysis of the phase-encoded sampling technique shows good agreement with measured data from the 505-MS/s system.

Photonic time stretch and its application to analog-to-digital conversion

We demonstrate a new concept for analog-to-digital (A/D) conversion based on photonic time stretch. The analog electrical signal is intensity modulated on a chirp optical waveform generated by dispersing an ultrashort pulse. The modulated chirped waveform is dispersed in an optical fiber, leading to the stretching of its envelope. We have derived analytical expressions for the stretch factor and the resolution of the system. An analog-to-digital converter (ADC) consisting of the photonic time-stretch preprocessor and a 1-Gsample/s electronic ADC is demonstrated. This technique is promising for A/D conversion of ultrafast signals and, hence, for realization of the digital receiver.