Electron Hole Bilayer Tunnel Field-effect Transistor Research Articles

A symmetric heterogate dopingless electron-hole bilayer TFET with ferroelectric and barrier layers

In this paper, a symmetric heterogate dopingless electron–hole bilayer tunnel field-effect transistor with a ferroelectric layer and a dielectric barrier layer (FBHD-EHBTFET) is proposed. FBHD-EHBTFET can not only avoid random doping fluctuation and high thermal budget caused by doping, but also solve the issue that conventional EHBTFETs are unable to use the self-alignment process during device manufacturing. The simultaneous introduction of the symmetric heterogate and dielectric barrier layer can significantly suppress off-state current (I off). Ferroelectric material embedded in the gate dielectric layer can enhance electron tunneling, contributing to improving on-state current (I on) and steepening average subthreshold swing (SS avg). By optimizing various parameters related to the gate, ferroelectric layer, and dielectric barrier layer, FBHD-EHBTFET can obtain the I off of 1.11 × 10–18 A μm−1, SS avg of 12.5 mV/dec, and I on of 2.59 × 10–5 A μm−1. Compared with other symmetric dopingless EHBTFETs, FBHD-EHBTFET can maintain high I on while reducing its I off by up to thirteen orders of magnitude and SS avg by at least 51.2%. Moreover, investigation demonstrates that both interface fixed charge and interface trap can increase I off, degrading the off-state performance of device. The study on FBHD-EHBTFET-based dynamic random access memory shows that it has the high read-to-current ratio of 1.1 × 106, high sense margin of 0.42 μA μm−1, and long retention time greater than 100 ms, demonstrating that it has great potential in low-power applications.

A High-Performance InGaAs Vertical Electron-Hole Bilayer Tunnel Field Effect Transistor with P+-Pocket and InAlAs-Block.

To give consideration to both chip density and device performance, an In0.53Ga0.47As vertical electron-hole bilayer tunnel field effect transistor (EHBTFET) with a P+-pocket and an In0.52Al0.48As-block (VPB-EHBTFET) is introduced and systematically studied by TCAD simulation. The introduction of the P+-pocket can reduce the line tunneling distance, thereby enhancing the on-state current. This can also effectively address the challenge of forming a hole inversion layer in an undoped InGaAs channel during device fabrication. Moreover, the point tunneling can be significantly suppressed by the In0.52Al0.48As-block, resulting in a substantial decrease in the off-state current. By optimizing the width and doping concentration of the P+-pocket as well as the length and width of the In0.52Al0.48As-block, VPB-EHBTFET can obtain an off-state current of 1.83 × 10-19 A/μm, on-state current of 1.04 × 10-4 A/μm, and an average subthreshold swing of 5.5 mV/dec. Compared with traditional InGaAs vertical EHBTFET, the proposed VPB-EHBTFET has a three orders of magnitude decrease in the off-state current, about six times increase in the on-state current, 81.8% reduction in the average subthreshold swing, and stronger inhibitory ability on the drain-induced barrier-lowering effect (7.5 mV/V); these benefits enhance the practical application of EHBTFETs.

Undoped vertical dual-bilayer TFET with a super-steep sub-threshold swing: proposal and performance comparative analysis

In this paper, the undoped vertical dual-bilayer tunnel field effect transistor (UV-DBL-TFET) at a low operating voltage (0.5 V) is introduced, and its DC and RF performance parameters are compared with those of the conventional charge plasma-based symmetrical gate electron–hole bilayer TFET (CP-SG-EHBTFET). The charge plasma technique is used in the proposed device to induce the source/drain and electron–hole dual-bilayer channel dopants. Due to the dopingless architecture of the proposed UV-DBL-TFET, its fabrication is simple and efficient, and it does not require an expensive thermal annealing process. Due to its dopingless architecture, the proposed UV-DBL-TFET is immune against random dopant fluctuations. In the study, the quantum confinement effects in the TCAD simulation have been successfully modelled using the Schrodinger approach and the density gradient model. Compared to the conventional CP-SG-EHBTFET, the proposed UV-DBL-TFET has a dual EHB channel, triggers dual line tunnelling, and doubles the band-to-band tunnelling rate and the ON current. Compared to the I ON of 47.33 μA μm−1 and AVSS of 13.53 of the conventional CP-SG-EHBTFET, the proposed UV-DBL-TFET has almost double the ON current of 93.46 μA μm−1 with a reduced AVSS of 12.3 mV dec−1. The proposed UV-DBL-TFET also gives improved RF/analog performance. Compared to the transconductance (g m) of 0.337 mS, the cut-off frequency (f T) of 65.17 GHz, and the gain-bandwidth-product (GBW) of 16.5 GHz of the conventional CP-SG-EHBTFET, the proposed UV-DBL-TFET has a g m of 0.665 mS, a f T of 129.0 GHz, and an GBW of 32.6 GHz, an almost doubled improvement. Furthermore, the proposed UV-DBL-TFET-based CMOS inverter has also been comprehensively studied, and perfect complementary inverter action has been obtained, suggesting great potential for future low-power applications.

Charge-plasma based symmetrical-gate complementary electron–hole bilayer TFET with improved performance for sub-0.5 V operation

In this paper, the complementary charge-plasma (CP) based symmetrical-gate electron–hole bilayer (EHB) tunnel field-effect transistor (TFET) at a low operating voltage (⩽0.5 V) is introduced. Where, by using CP technique, the source/drain and EHB-channel is induced by depositing metal electrode with appropriate work function. Moreover, the immunity against random dopant fluctuations and the feasibility of a self-aligned process due to a symmetrical top/bottom gate arrangement without the need for a high thermal annealing process make the fabrication of the proposed EHB-TFET very reliable and efficient. Moreover, by implementing the density gradient quantum correction model, the quantum confinement and its effect on confining the 2D electron–hole concentration are also corrected as the proposed device has a smaller channel thickness of 5 nm. The proposed device shows superior performance against almost all Si-based CP-TFETs with a higher ON-current of 47.33 μA μm−1, a smaller average subthreshold swing of 13.53 mV dec−1 and a high ON-current to OFF-current ratio of 2.16 × 1013. This indicates that the proposed device is a promising candidate for future low-power applications.

OFF-State Leakage Suppression in Vertical Electron-Hole Bilayer TFET Using Dual-Metal Left-Gate and N+-Pocket.

In this paper, an In0.53Ga0.47As electron–hole bilayer tunnel field-effect transistor (EHBTFET) with a dual-metal left-gate and an N+-pocket (DGNP-EHBTFET) is proposed and systematically studied by means of numerical simulation. Unlike traditional transverse EHBTFETs, the proposed DGNP-EHBTFET can improve device performance without sacrificing the chip density, and can simplify the manufacturing process. The introduction of the dual-metal left-gate and the N+-pocket can shift the point-tunneling junction and adjust the energy band and the electric field in it, aiming to substantially degrade the OFF-state current (IOFF) and maintain good ON-state performance. Moreover, the line tunneling governed by the tunneling-gate and the right-gate can further regulate and control IOFF. By optimizing various parameters related to the N+-pocket and the gate electrodes, DGNP-EHBTFET’s IOFF is reduced by at least four orders of magnitude, it has a 75.1% decreased average subthreshold swing compared with other EHBTFETs, and it can maintain a high ON-state current. This design greatly promotes the application potential of EHBTFETs.

Cylindrical electron–hole bilayer TFET with a single surrounding gate and induced quantum confinement

Cylindrical electron–hole bilayer TFET with a single surrounding gate and induced quantum confinement

Design and performance optimization of thin film tin monoxide (SnO)/silicon electron–hole bilayer tunnel field-effect transistor

This paper presents a novel thin film electron–hole bilayer tunnel field-effect transistor based on an oxide semiconductor tin monoxide (SnO)/silicon heterojunction (TFBTFET), which delivers low-power high switching speed characteristics. SnO has an intrinsic p-type profile, which provides desirable properties for application in thin film tunnel transistors and liquid crystal displays. Unlike conventional tunnel field-effect transistors with limited horizontal tunneling direction, the tunneling window of the TFBTFET is created along the channel length in the vertical direction, leading to significantly increased drain drive current. The results demonstrate that the steep transition of the current from off-state to on-state delivers subthreshold swing of 5 mV/dec with on-state current of 3.03 × 10−5 (A/µm), off-state current of 5.1 × 10−14 (A/µm) and on/off current ratio of 5.94 × 108. The impact of critical scaling of design parameters on the electrical performance of the device is comprehensively investigated by calculating the coefficient of variation (CV), expressed as a percentage, of the main electrical measures. The 2D variation contour of required voltage for the onset of band-to-band tunneling is computed as a function of the top and bottom gate work function to determine an optimum value yielding superior electrical performance. Moreover, CV analysis reveals that the off-state current and subthreshold swing are relatively insensitive to the variation in gate length, which indicates the potential for application of the device in integrated circuits with superior efficiency.

Analysis of Work-Function Variation Effects in a Tunnel Field-Effect Transistor Depending on the Device Structure

Metal gate technology is one of the most important methods used to increase the low on-current of tunnel field-effect transistors (TFETs). However, metal gates have different work-functions for each grain during the deposition process, resulting in work-function variation (WFV) effects, which means that the electrical characteristics vary from device to device. The WFV of a planar TFET, double-gate (DG) TFET, and electron-hole bilayer TFET (EHBTFET) were examined by technology computer-aided design (TCAD) simulations to analyze the influences of device structure and to find strategies for suppressing the WFV effects in TFET. Comparing the WFV effects through the turn-on voltage (Vturn-on) distribution, the planar TFET showed the largest standard deviation (σVturn-on) of 20.1 mV, and it was reduced by −26.4% for the DG TFET and −80.1% for the EHBTFET. Based on the analyses regarding metal grain distribution and energy band diagrams, the WFV of TFETs was determined by the number of metal grains involved in the tunneling current. Therefore, the EHBTFET, which can determine the tunneling current by all of the metal grains where the main gate and the sub gate overlap, is considered to be a promising structure that can reduce the WFV effect of TFETs.

Modeling the Current–Voltage Characteristics of Ge₁₋ₓSnₓ Electron–Hole Bilayer TFET With Various Compositions

In this article, we present, for the first time, the results of simulation and analysis of the current-voltage characteristics of germanium-tin electron-hole bilayer tunnel field-effect transistor (EHB TFET) of various compositions of the semiconductor substrate. Ge <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1-x</sub> Sn <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> is an interesting material due to the possibility of tuning the band structure by changing the Sn content. The direct and indirect bandgap of GeSn can be changed to affect the direct and phonon-assisted band-to-band tunneling currents. In this article, both currents are calculated for various compositions of Ge <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1-x</sub> Sn <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> and the channel body thickness as a parameter. The simulated structure exhibits steep-slope current-voltage characteristics due to the reduced carrier dimensionality and the use of 2-D-2-D tunneling as the transport mechanism. Sudden current bumps on characteristics are related to the alignment of the subsequent hole and electron energy levels in the gate-induced surface quantum wells. An increase in the Sn content results in a boost of the ON-current, which is related to the higher magnitude of the direct tunneling current. This effect depends strongly on the body thickness. We show that the application of GeSn in EHB TFET structure can be beneficial in terms of low-power applications.

Performance optimization of a nanoscale GaSb P-channel electron-hole bilayer tunnel field effect transistor using metal gate workfunction engineering

In this paper, the electrical characteristics of a double gate P-channel GaSb Electron-Hole Bilayer Tunnel Field Effect Transistor (EHBTFET) is comprehensively investigated and impact of main design parameters on the performance of the device is thoroughly assessed. The corresponding low carrier effective mass of GaSb provides high probability of tunneling current that eventually exhibits an improvement in the on-state current and subthreshold swing (SS). The results reveal that unlike the conventional tunnel field effect transistor (TFET) in which band to band tunneling current occurs horizontally from source to channel, the tunneling junction in EHBTFET is electrically created in the intrinsic channel in the entire region of the gate overlap length along the vertical direction. Due to the expanding of the tunneling area, the on-state current of EHBTEFT is increased five order of magnitude in comparison with lateral TFET and subthreshold swing of SS = 2 mV dec−1 with on/off current ratio of 2.5 × 1011 is achieved. The top and bottom gate workfunction are critical design parameters that fundamentally affect the tunneling rate. The 2D variation matrix of threshold voltage and on-state current are calculated as a function of top and bottom gate workfunction for optimizing the device performance. In addition, a comprehensive sensitivity analysis via calculating standard deviation and mean value of main electrical parameters are assessed to evaluate the susceptibility of device performance with respect to the variation of design parameters. The main feature of this device is the insensitivity of the tunneling rate to the source doping density that solves the problem of low solubility of dopants in III-V materials. Moreover, subthreshold swing and off-state current and are not affected by the gate length scaling, facilitating the employment of this device in nanoscale regime. The results in this paper pave the way for designing low power steep-slope logic circuits.

Ambipolar leakage suppression in electron–hole bilayer TFET: investigation and analysis

In this paper, we propose and simulate two new structures of electron–hole bilayer tunnel field-effect transistors (EHBTFET). The proposed devices are n-heterogate with $$\hbox {M}_{1}$$ as overlap gate, $$\hbox {M}_{2}$$ as underlap gate and employs a high-k dielectric pocket in the drain underlap. Proposed structure 1 employs symmetric underlaps (Lgs = Lgd = Lu). The leakage analysis of this structure shows that the lateral ambipolar leakage between channel and drain is reduced by approximately three orders, the OFF-state leakage is reduced by one order, and the $$I_{\mathrm{ON}}/I_{\mathrm{OFF}}$$ ratio is increased by more than one order at $$V_\mathrm{{GS}}=V_{\mathrm{DS}} =1.0$$ V as compared to the conventional Si EHBTFET. The performance is improved further by employing asymmetric underlaps ( $$\hbox {Lgs}\ne \hbox {Lgd}$$ ) with double dielectric pockets at source and drain, called as proposed structure 2. The pocket dimensions have been optimized, and an average subthreshold swing of 17.7 mV/dec (25.5% improved) over five decades of current is achieved with an ON current of $$0.23~\upmu \hbox {A}/\upmu \hbox {m}$$ (11% improved) in proposed structure 2 in comparison with the conventional EHBTFET. Further, the parasitic leakage paths between overlap/underlap interfaces are blocked and the OFF-state leakage is reduced by more than two orders. A high $$I_{\mathrm{ON}}/I_{\mathrm{OFF}}\,\hbox {ratio}~>10^{9}$$ (two orders higher) is achieved at $$V_{\mathrm{DS}} =V_{\mathrm{GS}} =1.0~\hbox {V}$$ in the proposed structure 2 in comparison with the conventional one.

Vertical-Structured Electron-Hole Bilayer Tunnel Field-Effect Transistor for Extremely Low-Power Operation With High Scalability

In this paper, a novel vertical-structured electron-hole bilayer tunnel field-effect transistor (V-EHBTFET), which features dual gates located at each side of Si fin, is proposed and its electrical characteristics are examined by a technology computer-aided design simulation depending on device parameters. Comparing with the conventional EHBTFET, V-EHBTFET shows a comparable performance in terms of subthreshold swing, OFF- and ON-state currents, and turn-ON voltage with much higher scalability with the help of a novel device architecture. An exemplary self-aligned process flow is also proposed.

A Novel Reconfigurable Sub-0.25-V Digital Logic Family Using the Electron-Hole Bilayer TFET

We propose and validate a novel design methodology for logic circuits that exploits the conduction mechanism and the presence of two independently biased gates (“n-gate” and “p-gate”) of the electron-hole bilayer tunnel field-effect transistor (EHBTFET). If the device is designed to conduct only under certain conditions, e.g., when $V_{\mathrm {n-gate}} = V_{\mathrm {DD}}$ and $V_{\mathrm {p-gate}} = 0$ , it then shows an “XOR-like” behavior that allows the implementation of certain logic gates with a smaller number of transistors compared to conventional CMOS static logic. This simplifies the design and possibly results in faster operation due to lower node capacitances. We demonstrate the feasibility of the proposed EHBTFET logic for low supply voltage operation using mixed device/circuit simulations including quantum corrections.

The Electron-Hole Bilayer TFET: Dimensionality Effects and Optimization

An extensive parameter analysis is performed on the electron–hole bilayer tunnel field-effect transistor (EHBTFET) using a 1-D effective mass Schrodinger–Poisson solver with corrections for band non-parabolicity considering thin InAs, In0.53Ga0.47As, Ge, Si0.5Ge0.5, and Si films. It is found that depending on the channel material and channel thickness, the EHBTFET can operate either as a 2-D–2-D or 3-D–3-D tunneling device. InAs offers the highest $I_{\mathrm{\scriptscriptstyle ON}}$ , whereas for the Si and Si0.5Ge0.5 EHBTFETs, significant current levels cannot be achieved within a reasonable voltage range. The general trends are explained through an analytical model that shows close agreement with the numerical results.

Switching Behavior Constraint in the Heterogate Electron–Hole Bilayer Tunnel FET: The Combined Interplay Between Quantum Confinement Effects and Asymmetric Configurations

Switching behavior in electron–hole bilayer tunnel FETs is known to be unaffected by the subthreshold swing limitation of 60 mV/decade imposed by thermal injection, due to the band-to-band tunneling phenomena on which they rely. However, in this paper, we show that, once parasitic lateral tunneling processes are suppressed by means of heterogate configurations, a new physical limitation arises at the onset of tunneling in this type of transistors, resulting from the interplay between field-induced quantum confinement and asymmetric concentrations of electrons and holes inside the channel. We demonstrate that this limitation comes from the fact that, regardless of the band profile sharpness, the tunneling distance at subband alignment cannot be reduced beyond a certain limit, which we find to be dependent on the body thickness and the material properties.

Underlap counterdoping as an efficient means to suppress lateral leakage in the electron–hole bilayer tunnel FET

The electron–hole bilayer tunnel (EHBTFET) has been proposed as a density of states (DOS) switch capable of achieving a subthreshold slope lower than 60mV/decade at room temperature; however, one of the main challenges is the control of the lateral band-to-band tunneling (BTBT) leakage in the OFF state. In this work, we show that by using oppositely doped underlap regions; the unwanted penetration of the wavefunction into the underlap region at low gate biases is prevented; thereby drastically reducing the lateral BTBT leakage without any penalty on the ON current. The method is verified using a full-quantum 2D Schrödinger–Poisson solver under the effective mass approximation. For a channel thickness of 10 nm, an EHBTFET with counterdoping can exhibit an ON-current up to and an average subthreshold swing (SS) of about 30 mV/dec. Compared to previous lateral leakage suppression solutions, the proposed method can be fabricated using template-assisted selective epitaxy.

Band-to-band tunneling distance analysis in the heterogate electron–hole bilayer tunnel field-effect transistor

In this work, we analyze the behavior of the band-to-band tunneling distance between electron and hole subbands resulting from field-induced quantum confinement in the heterogate electron–hole bilayer tunnel field-effect transistor. We show that, analogously to the explicit formula for the tunneling distance that can be easily obtained in the semiclassical framework where the conduction and valence band edges are allowed states, an equivalent analytical expression can be derived in the presence of field-induced quantum confinement for describing the dependence of the tunneling distance on the body thickness and material properties of the channel. This explicit expression accounting for quantum confinement holds valid provided that the potential wells for electrons and holes at the top and bottom of the channel can be approximated by triangular profiles. Analytical predictions are compared to simulation results showing very accurate agreement.

Quantum Mechanical Confinement in the Fin Electron-Hole Bilayer Tunnel Field-Effect Transistor

Quantum mechanical confinement in electron–hole bilayer tunnel field-effect transistors (EHBTFETs) affects in a substantial way the band-to-band tunneling (BTBT) mechanism that constitutes their operating principle. Field-induced quantization is known to set off effective bandgap widening phenomena—with the subsequent BTBT probability reduction that it entails—and to give rise to harmful parasitic tunneling processes. Both of these effects degrade the potential steep switching behavior of bilayer TFETs. In this paper, we show that the novel FinEHBTFET proves to be a promising structure for its scalability potential and propose a solution to alleviate the impact on it of quantum confinement, as well as to suppress the parasitic tunneling processes that show up when quantization is considered. Moreover, we demonstrate for different fin materials that the utilization of asymmetric configurations delaying the formation of electron inversion layers allows us to boost $I_{\mathrm{\scriptscriptstyle ON}}$ levels.

Impact of Asymmetric Configurations on the Heterogate Germanium Electron&amp;#x2013;Hole Bilayer Tunnel FET Including Quantum Confinement

We investigate the effect of asymmetric configurations on the heterogate germanium electron–hole bilayer tunnel FET (TFET) and assess the improvement that they provide in terms of boosting the typically very low ON-current levels of TFET devices in the presence of field-induced quantum confinement. We show that when a very strong inversion for holes is induced at the bottom of the channel, the formation of the inversion layer for electrons is shifted to higher gate voltages, which in turn enhances the electrostatic control of the band bending at the top of the channel. As a result, the pinning of the quantized energy subbands is prevented for a wider range of gate voltages, and this allows vertical band-to-band tunneling distances to be further reduced compared with the conventional symmetric electron–hole bilayer configurations.

Assessment of pseudo-bilayer structures in the heterogate germanium electron-hole bilayer tunnel field-effect transistor

We investigate the effect of pseudo-bilayer configurations at low operating voltages (≤0.5 V) in the heterogate germanium electron-hole bilayer tunnel field-effect transistor (HG-EHBTFET) compared to the traditional bilayer structures of EHBTFETs arising from semiclassical simulations where the inversion layers for electrons and holes featured very symmetric profiles with similar concentration levels at the ON-state. Pseudo-bilayer layouts are attained by inducing a certain asymmetry between the top and the bottom gates so that even though the hole inversion layer is formed at the bottom of the channel, the top gate voltage remains below the required value to trigger the formation of the inversion layer for electrons. Resulting benefits from this setup are improved electrostatic control on the channel, enhanced gate-to-gate efficiency, and higher ION levels. Furthermore, pseudo-bilayer configurations alleviate the difficulties derived from confining very high opposite carrier concentrations in very thin structures.