Electrodes For Thin-film Transistors Research Articles

Formation process and adjustment of the profile angle of Al–Mo composite electrodes in thin-film transistors for large-size premium displays

Formation process and adjustment of the profile angle of Al–Mo composite electrodes in thin-film transistors for large-size premium displays

Fully Inkjet-Printed Short-Channel Metal-Oxide Thin-Film Transistors Based on Semitransparent ITO/Au Source/Drain Electrodes

In this work, short-channel semitransparent indium-tin-oxide (ITO)/Au electrode pairs were fabricated via inkjet printing and lift-off technology. The printed hydrophobic coffee stripes not only define the channel length of ITO/Au electrode pairs, but also help the realization of uniform short-channel In0.95Ga0.05Ox thin-film transistors (TFTs). The patterned semitransparent ITO/Au films, with the assistance of inkjet printing, exhibit an excellent conductivity compared to that of printed ITO films, and the short-channel In0.95Ga0.05Ox TFTs based on the semitransparent ITO/Au source/drain electrodes exhibit a maximum mobility of 2.9 cm2 V−1 s−1. This work proposes a method to prepare patterned high-conductive electrodes for TFTs with the assistance of inkjet printing.

Comparison of source/drain electrodes in thin-film transistors based on room temperature deposited zinc nitride films

In this work, the comparison of source/drain electrodes in thin film transistors (TFTs) based on room temperature deposited Zinc Nitride (Zn3N2) films is presented. Aluminum and aluminum doped zinc oxide (AZO) films are used as electrodes. Both devices exhibit an on/off-current ratio of 104 and a subthreshold slope close to 1 V/Dec. The extracted field-effect mobility was 4.5 cm2/Vs and 1 cm2/Vs for TFTs using aluminum and AZO, respectively. Better electrical characteristics are achieved with aluminum electrodes. However, AZO electrodes made possible the fabrication of fully transparent Zn3N2 TFTs, reported for first time in this work.

Femtosecond laser patterning of graphene electrodes for thin-film transistors

The aim of this study is to assess femtosecond laser patterning of graphene in air and in vacuum for the application as source and drain electrodes in thin-film transistors (TFTs). The analysis of the laser-patterned graphene with scanning electron microscopy, atomic force microscopy and Raman spectroscopy showed that processing in vacuum leads to less debris formation and thus re-deposited carbonaceous material on the sample compared to laser processing in air. It was found that the debris reduction due to patterning in vacuum improves the TFT characteristics significantly. Hysteresis disappears, the mobility is enhanced by an order of magnitude and the subthreshold swing is reduced from Ssub = 2.5 V/dec to Ssub = 1.5 V/dec.

Sputtered transparent conducting graphene films on iron oxide coated glass

This work reports the optical, electrical and morphological properties of graphene (G) films. Firstly, glass substrates were coated with iron oxide (IO) films using a spraying method. Subsequently, the sputtering technique was employed for the formation of graphene films on the IO layers (G/IO films). According to XPS spectra, the IO films offered anchorage sites for the growth of G that improved the adherence to the substrate. Additionally, the sheet resistance of the films was in the range of 16–19.5 kΩ/□. Also, the optical measurements revealed that the G/IO films subjected to a post-deposition heat treatment presented a transmittance ~ 11% higher than those as-deposited. In fact, those heat-treated films presented a transparency above 80% for wavelengths above 850 nm and a high elasticity modulus of 0.188 ± 0.039 TPa, which make them good candidates to be used as transparent conductive electrodes in thin film transistors, surface plasmon biosensors or surface enhanced Raman scattering (SERS) substrates.

Highly Conductive and Transparent AZO Films Fabricated by PLD as Source/Drain Electrodes for TFTs.

Aluminum-doped ZnO (AZO) has huge prospects in the field of conductive electrodes, due to its low price, high transparency, and pro-environment. However, enhancing the conductivity of AZO and realizing ohmic contact between the semiconductor and AZO source/drain (S/D) electrodes without thermal annealing remains a challenge. Here, an approach called pulsed laser deposition (PLD) is reported to improve the comprehensive quality of AZO films due to the high energy of the laser and non-existence of the ion damage. The 80-nm-thick AZO S/D electrodes show remarkable optical properties (transparency: 90.43%, optical band gap: 3.42 eV), good electrical properties (resistivity: 16 × 10−4 Ω·cm, hall mobility: 3.47 cm2/V·s, carrier concentration: 9.77 × 1020 cm−3), and superior surface roughness (Rq = 1.15 nm with scanning area of 5 × 5 μm2). More significantly, their corresponding thin film transistor (TFT) with low contact resistance (RSD = 0.3 MΩ) exhibits excellent performance with a saturation mobility (µsat) of 8.59 cm2/V·s, an Ion/Ioff ratio of 4.13 × 106, a subthreshold swing (SS) of 0.435 V/decade, as well as good stability under PBS/NBS. Furthermore, the average transparency of the unpatterned multi-films composing this transparent TFT can reach 78.5%. The fabrication of this TFT can be suitably transferred to transparent arrays or flexible substrates, which is in line with the trend of display development.

48.2: Invited Paper: High conductivity & transparent aluminum-based multi-layer source/drain electrodes for thin film transistors

48.2: <i>Invited Paper:</i> High conductivity &amp; transparent aluminum-based multi-layer source/drain electrodes for thin film transistors

High conductivity and transparent aluminum-based multi-layer source/drain electrodes for thin film transistors

In this study, high conductivity and transparent multi-layer (AZO/Al/AZO-/Al/AZO) source/drain (S/D) electrodes for thin film transistors were fabricated via conventional physical vapor deposition approaches, without toxic elements or further thermal annealing process. The 68 nm-thick multi-layer films with excellent optical properties (transparency: 82.64%), good electrical properties (resistivity: 6.64 × 10−5 Ω m, work function: 3.95 eV), and superior surface roughness (Rq = 0.757 nm with scanning area of 5 × 5 µm2) were fabricated as the S/D electrodes. Significantly, comprehensive performances of AZO films are enhanced by the insertion of ultra-thin Al layers. The optimal transparent TFT with this multi-layer S/D electrodes exhibited a decent electrical performance with a saturation mobility (µsat) of 3.2 cm2 V−1 s−1, an Ion/Ioff ratio of 1.59 × 106, a subthreshold swing of 1.05 V/decade. The contact resistance of AZO/Al/AZO/Al/AZO multi-layer electrodes is as low as 0.29 MΩ. Moreover, the average visible light transmittance of the unpatterned multi-layers constituting a whole transparent TFT could reach 72.5%. The high conductivity and transparent multi-layer S/D electrodes for transparent TFTs possessed great potential for the applications of the green and transparent displays industry.

Fully Inkjet‐Printed Thin‐Film Transistor Array Manufactured on Paper Substrate for Cheap Electronic Applications

AbstractOver the past decade, inkjet technology has been well recognized for the manufacturing of products that include “printing beyond colors.” This micrometer‐scale precise technology provides a straightforward approach toward judicious deposition of electronically functional material inks on various substrates over relatively large areas, for printed/flexible electronics. The technology promotes upscalability and has become a renowned process tool for fabricating electronic devices in the field of printed/flexible electronics. Here, the fabrication of printed thin‐film transistors (TFT) on cheap coated paper substrate using inkjet technology is reported. For developing the TFT layer stack conductive nanoparticle inks, a polymeric dielectric ink and a p‐type organic semiconductor ink are employed. The coating on the paper provides several advantages for fabrication process of TFTs; for example, control over ink spreading. This control of ink spreading can directly influence the fabrication of interdigitated source/drain (S/D) electrodes for TFTs, when a top gate bottom contact architecture is considered. This results in better manufacturing yields and promising electrical performance, which are also the focus of this research. The all inkjet‐printed TFTs on paper exhibit electrical performance with maximum S/D current ranging to 170 nA, charge carrier mobility of 0.087 cm2 V−1 s−1, and current on/off ratio of 330.

High Conductivity and Adhesion of Cu-Cr-Zr Alloy for TFT Gate Electrode

The characteristics of Cu alloy (0.3 wt. % Cr, 0.2 wt. % Zr) thin film deposited by direct current (DC) magnetron sputtering deposition were investigated. The conductivity and adhesion of the Cu-0.3%Cr-0.2%Zr films were optimized by increasing the sputter power to 150 W and reducing the sputter pressure to 2 mTorr. With an annealing process (at 300 °C for 1 h in argon ambient atmosphere), the resistivity of the alloy film decreased from 4.80 to 2.96 μΩ·cm, and the adhesion classification increased from 2B to 4B on glass substrate. X-ray photoelectron spectroscopy (XPS) analysis showed that Cr aggregated toward the surface of the film and formed a self-protection layer in the annealing process. Transmission electron microscopy (TEM) indicated the aggregation and migration of Cr in the annealing process. A further X-ray diffraction (XRD) analysis showed that Cu2O appeared when the annealing temperature reached above 350 °C, which accounts for the increase of the resistivity. Based on Al2O3 and SiO2 substrate surfaces, the Cu-0.3%Cr-0.2%Zr film also showed high conductivity and adhesion, which has a potential in the application of Cu gate electrodes for thin film transistor (TFT).

Wrinkle-free graphene electrodes in zinc tin oxide thin-film transistors for large area applications

Wrinkle-free graphene was used to form the source–drain electrodes in thin film transistors based on a zinc tin oxide (ZTO) semiconductor. A 10 nm thick titanium adhesion layer was applied prior to transferring a conductive graphene film on top of it by chemical detachment. The formation of an interlayer oxide between titanium and graphene allows the achievement of uniform surface roughness over the entire substrate area. The resulting devices were thermally treated in ambient air, and a substantial decrease in field effect mobility is observed with increasing annealing temperature. The increase in electrical resistivity of the graphene film at higher annealing temperatures may have some influence, however the growth of the oxide interlayer at the ZTO/Ti boundary is suggested to be most influential, thereby inducing relatively high contact resistance.

Interfacial Contact Effects in Top Gated Zinc Oxide Thin Film Transistors Grown by Atomic Layer Deposition

Contact effects at the source/drain (S/D) electrodes in thin film transistors (TFTs) based on zinc oxide (ZnO) utilizing the top gate, bottom contact geometry are investigated using electrical and material studies. Low temperature atomic layer deposition (ALD) is employed to directly grow the ZnO active layer on Au, Ru, and TiW bottom electrodes. TFT performance varies significantly depending on the S/D metallization scheme. Au contacts are seen to uniquely promote the growth of a highly n-doped ZnO channel that degrades the TFT’s output impedance and controllability. On the other hand, TiW contacts suffer from poor carrier injection because of Schottky barrier formation. The best overall performance is demonstrated by Ru/ZnO TFTs based on their excellent switching capabilities alongside a moderately high mobility. From X-ray photoelectron spectroscopy measurements, the superior performance of Ru is the consequence of an oxidation-free interface that inhibits the adsorption of hydroxide surface dopants. Thus, the surface chemistry of the metal contact plays a large role on the ZnO growth and metal/ZnO interface energetics.

Bending stability of flexible amorphous IGZO thin film transistors with transparent IZO/Ag/IZO oxide–metal–oxide electrodes

We investigated the electrical and optical properties of indium zinc oxide (IZO)/Ag/IZO oxide–metal–oxide (OMO) multilayer for a flexible and transparent electrode of the electronic applications. The optimized OMO multilayer structures with excellent sheet resistance of 5.65 Ω/sq as well as average transmittance of 87.7% in the visible range were employed as the source and drain (S/D) electrodes of thin film transistors (TFTs). In addition, the a-IGZO TFT with OMO S/D electrodes exhibited the enhanced electrical performance in comparison to the TFT with single IZO S/D electrodes, resulted from lowering work function by inserting Ag mid-layer between the oxide layers. Furthermore, the same TFTs were fabricated on a polyimide (PI) substrate to verify the potential of OMO electrode for flexible devices. The TFTs on PI substrate were found to be significantly resistant to dynamic bending with only 5.37% reduction in field effect mobility and slight change in threshold voltage from 0.21 V to 0.72 V even after 10,000 cycles of repeated bending at a radius of curvature of 10 mm.

Influence of molybdenum source/drain electrode contact resistance in amorphous zinc–tin-oxide (a-ZTO) thin film transistors

This paper investigates the feasibility of a low-resistivity electrode material (Mo) for source/drain (S/D) electrodes in thin film transistors (TFTs). The effective resistances between Mo source/drain electrodes and amorphous zinc–tin-oxide (a-ZTO) thin film transistors were studied. Intrinsic TFT parameters were calculated by the transmission line method (TLM) using a series of TFTs with different channel lengths measured at a low source/drain voltage. The TFTs fabricated with Mo source/drain electrodes showed good transfer characteristics with a field-effect mobility of 10.23cm2/Vs. In spite of slight current crowding effects, the Mo source/drain electrodes showed good output characteristics with a steep rise in the low drain-to-source voltage (VDS) region.

Simultaneously grown single wall carbon nanotube channel and electrodes in a thin film transistor

Abstract

Using electroless plating Cu technology for TFT-LCD application

This study investigates the feasibility of using electroless plating (ELP) technology to manufacture copper (Cu) gate electrodes in thin film transistors (TFTs). The problem of poor adhesion between Cu and glass substrates is overcome by introducing ELP nickel–phosphorus (NiP) layers. Copper pattern formation with a desired taper can be self-aligned subsequently on a NiP layer without any layer etching process. ELP Cu film shows an obvious (111) preferred orientation, which may enhance the electrode's anti-electromigration ability. The electrical characteristics of the ELP Cu gate TFT are also similar to those of the sputter-deposited Cu gate TFT.

Preparation and soft lithographic printing of nano-sized ITO-dispersions for the manufacture of electrodes for TFTs

The production of printed electronics exhibits an enormous economical potential due to the possibility to manufacture innovative products at low cost. At the moment, one of the major challenges for the fabrication of printed electronics is the controllability of the material properties during processing and the miniaturization of the deposited structures. In this context, the application of soft lithographic techniques appears promising, because they allow a defined patterning of the materials in the range of few nanometers, which is far below the limits of other printing techniques like inkjet-printing or screen printing. This work proves the applicability of the soft lithographic technique micro-molding in capillaries (MIMIC) for the manufacture of conductive indium tin oxide (ITO) electrodes. For the creation of stable dispersions of ITO nano-sized particles, steric as well as electrostatic stabilization concepts are applied. The prepared dispersions are characterized with regard to the later processing via MIMIC. The geometry and the electrical properties of the soft lithographically deposited structures are determined to prove their functionality. Special attention is paid to the influence of the wetting behavior of the dispersions on the resulting geometry of the structures. Finally, the applicability of the optimized structures is demonstrated by the assembly of a thin film transistor (TFT), in which the deposited structures serve as source and drain electrodes.

Copper source/drain electrode contact resistance effects in amorphous indium–gallium–zinc‐oxide thin film transistors

AbstractThis paper focuses on the viability of low‐resistivity electrode material (Cu) for source/drain electrodes in thin film transistors (TFTs). The effective resistances between Cu source/drain electrodes and amorphous indium gallium zinc oxide (a‐IGZO) thin‐film transistors were examined. Intrinsic TFT parameters were extracted by the transmission line method (TLM) using a series of TFTs with different channel lengths measured at a low source/drain voltage. The TFTs fabricated with Cu source/drain electrodes showed good transfer characteristics with a field‐effect mobility of 9.64 cm2/Vs, and good output characteristics with steep rise in the low VDS region. (© 2009 WILEY‐VCH Verlag GmbH &amp; Co. KGaA, Weinheim)

Gate capacitance coupling of singled-walled carbon nanotube thin-film transistors

The electrostatic coupling between singled-walled carbon nanotube (SWCNT) networks/arrays and planar gate electrodes in thin-film transistors (TFTs) is analyzed both in the quantum limit with an analytical model and in the classical limit with finite-element modeling. The computed capacitance depends on both the thickness of the gate dielectric and the average spacing between the tubes, with some dependence on the distribution of these spacings. Experiments on transistors that use submonolayer, random networks of SWCNTs verify certain aspects of these calculations. The results are important for the development of networks or arrays of nanotubes as active layers in TFTs and other electronic devices.