Efficient Power Consumption Research Articles

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Recently, one of the research topics is wireless Ad-Hoc network minimizing power consumption because of limited power. We propose optimal power allocation scheme of each transmit node and derive performance analysis of system that recently designed Double opportunistic relay system which fixed branch receiver to use more than efficient power consumption. Optimal power location scheme is shown that outage probability has always better performance than equal power allocation. Furthermore, we are known that outage probability is minimized by increasing average transmit relays to obtain the diversity gain when average channel power gain is less.

Model predictive control technologies for efficient and flexible power consumption in refrigeration systems

Considerable amounts of energy are consumed in supermarket refrigeration systems worldwide. Due to the thermal capacity of refrigerated goods and the rather simplistic control most commonly applied, there is a potential for distributing the system load over time in a more cost-optimal way. In this paper we describe a novel economic-optimizing Model Predictive Control (MPC) scheme that reduces operating costs by utilizing the thermal storage capabilities. A nonlinear optimization tool to handle a non-convex cost function is utilized for simulations with validated scenarios. In this way we explicitly address advantages from daily variations in outdoor temperature and electricity prices. Secondly, we formulate a new cost function that enables the refrigeration system to contribute with ancillary services to the balancing power market. This involvement can be economically beneficial for the system itself, while crucial services can be delivered to a future flexible and intelligent power grid (Smart Grid). Furthermore, we discuss a novel incorporation of probabilistic constraints and Second Order Cone Programming (SOCP) with economic MPC. A Finite Impulse Response (FIR) formulation of the system models allows us to describe and handle model as well as prediction uncertainties in this framework. This means we can demonstrate means for robustifying the performance of the controller.

Dynamic and Leakage Power Estimation in Register Files Using Neural Networks

Efficient power consumption and energy dissipation in embedded devices and modern processors is becoming increasingly critical due to the limited energy supply available from the current battery technologies. It is vital for chip architects, circuit, and processor designers to evaluate the energy per access, the power consumption and power leakage in register files at an early stage of the design process in order to explore power/performance tradeoffs, and be able to adopt power efficient architectures and layouts. Power models and tools that would allow architects and designers the early prediction of power consumption in register files are vital to the design of energy-efficient systems. This paper presents a Radial Base Function (RBF) Artificial Neural Network (ANN) model for the prediction of energy/access and leakage power in standard cell register files designed using optimized Synopsys Design Ware components and an UMC 130 nm library. The ANN model predictions were compared against experimental results (obtained using detailed simulation) and a nonlinear regression-based model, and it is observed that the ANN model is very accurate and outperformed the nonlinear model in several statistical parameters. Using the trained ANN model, a parametric study was carried out to study the effect of the number of words in the file (D), the number of bit in one word (W) and the total number of Read and Write Ports (P) on the values of energy/access and the leakage power in standard cell register files.

Open SystemC Simulator with Support for Power Gating Design

Power gating is one of the most efficient power consumption reduction techniques. However, when applied in several different parts of a complex design, functional verification becomes a challenge. Lately, the verification process of this technique has been executed in a Register-Transfer Level (RTL) abstraction, based on the Common Power Format (CPF) and the Unified Power Format (UPF). The purpose of this paper is to present an OSCI SystemC simulator with support to the power gating design. This simulator is an alternative to assist the functional verification accomplishment of systems modeled in RTL. The possibility of controlling the retention and isolation of power gated functional block (PGFB) is presented in this work, turning the simulations more stable and accurate. Two case studies are presented to demonstrate the new features of that simulator.

A novel efficient power‐saving MAC protocol for multi‐hop MANETs

SUMMARYFollowing recent advances in the performance of ad hoc networks, the limited life of batteries in mobile devices poses a bottleneck in their development. Consequently, how to minimize power consumption in the Medium Access Control (MAC) layer of ad hoc networks is an essential issue. The power‐saving mode (PSM) of IEEE 802.11 involves the Timing Synchronization Function to reduce power consumption for single‐hop mobile ad hoc networks (MANETs). However, the IEEE 802.11 PSM is known to result in unnecessary energy consumption as well as the problems of overheating and back‐off time delay. Hence, this study presents an efficient power‐saving MAC protocol, called p‐MANET, based on a Multi‐hop Time Synchronization Protocol, which involves a hibernation mechanism, a beacon inhibition mechanism, and a low‐latency next‐hop selection mechanism for general‐purpose multi‐hop MANETs. The main purposes of the p‐MANET protocol are to reduce significantly the power consumption and the transmission latency. In the hibernation mechanism, each p‐MANET node needs only to wake up during one out of every N beacon interval, where N is the number of beacon intervals in a cycle. Thus, efficient power consumption is achieved. Furthermore, a beacon inhibition mechanism is proposed to prevent the beacon storm problem that is caused by synchronization and neighbor discovery messages. Finally, the low‐latency next‐hop selection mechanism is designed to yield low transmission latency. Each p‐MANET node is aware of the active beacon intervals of its neighbors by using a hash function, such that it can easily forward packets to a neighbor in active mode or with the least remaining time to wake up. As a consequence, upper‐layer routing protocols can cooperate with p‐MANET to select the next‐hop neighbor with the best forwarding delay. To verify the proposed design and demonstrate the favorable performance of the proposed p‐MANET, we present the theoretical analysis related to p‐MANET and also perform experimental simulations. The numerical results show that p‐MANET reduces power consumption and routing latency and performs well in extending lifetime with a small neighbor discovery time. Copyright © 2011 John Wiley & Sons, Ltd.

Initial Clinical Experience Of Total Cardiac Replacement With Dual Heartmate-II®Axial Flow Pumps For Severe Biventricular Heart Failure

Introduction Continuous flow pumps are commonly used to support patients with acute cardiogenic shock and are increasingly used for chronic support in heart failure patients. In the past, pulsatile long-term left ventricular assist devices (LVADs), such as the Novacor and HeartMate-I, provided adequate cardiac support yet they were subject to complications including eventual device failure and infections. With improvements in technology and migration towards axial or continuous flow devices, device miniaturization has become possible, thereby leading to improved anatomical fitting, less vibration and driving noise, and more efficient power consumption. Furthermore, device durability, anti-thrombogenicity, and physiological adaptation to continuous flow pumps appear to be clinically feasible not only for bridge-to-transplant but also for extended longer-term support, namely “destination therapy.”1, 2 In cases of severe biventricular heart failure, right heart support may be required in addition to left heart support. Using a biventricular assist device (BiVAD) to treat biventricular heart failure is one reasonable option;3 however, its clinical feasibility remains controversial.4 Another acceptable option for treating biventricular heart failure is total cardiac replacement with a total artificial heart (TAH).5 According to clinical results reported by the INTERMACS Study group, the Syncardia pulsatile TAH (Syncardia Systems, Inc., Tucson, AZ, USA) whose implantation resulted in lower postoperative complications and better bridge-to-transplant rates compared to conventional BiVAD implants.6 As a similar technology transition from pulsatile to nonpulsatile LVAD, nonpulsatile mechanical circulatory support may be applicable for total cardiac replacement as well, i.e., continuous flow TAH. Unlike the conventional pulsatile TAH driven by pneumatic compression, a continuous flow total artificial heart (CFTAH) would generate absolutely no pulsatility at all. To bring CFTAH into the clinical arena, flow control including the right and left flow balance, inflow suction prevention, and overall physiological adaptation are still remaining issues to be solved.7 Dr. O.H. Frazier (Texas Heart Institute, Houston, TX) reported the first animal study experiences using a CFTAH implant as a total heart replacement — with two HeartMate II® axial flow LVADs — in 2009, which followed a study using dual Jarvik 2000 pumps in 2005.8, 9 The animals implanted with the CFTAH in these studies maintained normal physiological parameters for up to seven weeks following device implant. These earlier results were encouraging and suggested the potential future role of a CFTAH for treating biventricular heart failure. This case report describes our initial clinical experience of total cardiac replacement (complete resection of the heart) with dual HeartMate II® (HM II) axial flow pumps (Thoratec Corporation, Pleasanton, CA, USA) for treating severe biventricular heart failure.

Analysis of an automotive ground system based on its steady-state model

As more electrical equipment is installed and larger currents are required in vehicles, the automotive ground system becomes more important to guarantee the stable operation of the equipment and efficient power consumption. In this paper, an automotive ground system is analyzed in a steady-state condition, and a simulation model for estimating its ground voltage distribution is described. The automotive ground system is divided into an engine compartment ground and a body ground, and it is modeled as an equivalent resistor network, which is suitable for simulation. By using the developed model, ground voltages are simulated and measurements are taken with a real car. A comparison of the simulation and measurement results shows good agreement, and the validity of the model is confirmed. Then, the factors that dominate the ground voltage level are discussed.

Cladding-Mode-Recoupling-Based Tilted Fiber Bragg Grating Sensor With a Core-Diameter-Mismatched Fiber Section

Photonic integration technologies, which have been developed since the deployment of optical communications, are essential for increasing the network capacity at a low cost and with efficient power consumption. This paper reviews recent progress on photonic integrated devices for higher bit-rate and long-distance transmission technologies with advanced modulation formats.

Photonic Integration Technologies for Large-Capacity Telecommunication Networks

Photonic integration technologies, which have been developed since the deployment of optical communications, are essential for increasing the network capacity at a low cost and with efficient power consumption. This paper reviews recent progress on photonic integrated devices for higher bit-rate and long-distance transmission technologies with advanced modulation formats.

Establishing radiation therapy treatment planning effects involving implantable pacemakers and implantable cardioverter‐defibrillators

Recent improvements to the functionality and stability of implantable pacemakers and cardioverter‐defibrillators involve changes that include efficient battery power consumption and radiation hardened electrical circuits. Manufacturers have also pursued MRI‐compatibility for these devices. While such newer models of pacemakers and cardioverter‐defibrillators are similar in construction to previously marketed devices – even for the recent MRI‐compatible designs currently in clinical trials – there is increased interest now with regard to radiation therapy dose effects when a device is near or directly in the field of radiation. Specifically, the limitation on dose to the device from therapeutic radiation beams is being investigated for a possible elevation in limiting dose above 200 cGy. We present here the first‐ever study that evaluates dosimetric effects from implantable pacemakers and implantable cardioverter‐defibrillators in high energy X‐ray beams from a medical accelerator. Treatment plan simulations were analyzed for four different pacemakers and five different implantable cardioverter‐defibrillators and intercompared with direct measurements from a miniature ionization chamber in water. All defibrillators exhibited the same results and all pacemakers were seen to display the same consequences, within only a a±1.8% deviation for all X‐ray energies studied. Attenuation, backscatter, and lateral scatter were determined to be −13.4%, 2.1% and 1.5% at 6 MV, and −6.1%, 3.1% and 5.1% at 18 MV for the defibrillator group. For the pacemaker group, this research showed results of −15.9%, 2.8% and 2.5% at 6 MV, and −9.4%, 3.4% and 5.7% at 18 MV, respectively. Limited results were discovered from scattering processes through computer modeling. Strong verification from measurements was concluded with respect to simulating attenuation characteristics. For IP and ICD leads, measured dose changes were less than 4%, existing as attenuation processes only, and invariant with regard to X‐ray energy.PACS number: 87.53.Bn, 87.53.Dq, 87.53.Tf, 87.66.Jj

Novel high-precision current-mode multiplier/divider

In this paper, a method to reduce the second order effects on the circuit performances caused by the small sized MOS transistors is proposed. A current mode square-root circuit, a squarer/divider circuit and a multiplier/divider circuit are designed using this method. Proposed circuits have been simulated with SPICE simulator using 0.35 μm CMOS technology parameters. The main advantages of the proposed circuit are reduced errors of the output current function, a smaller area on the chip, possibility of controlling the output current with the control voltage, operation at higher frequencies and more efficient power consumption. As a result, it can be considered as a useful building block for IC designer.

Designing a novel high-performance FPGA architecture for data intensive applications

A wide variety of real-time applications (e.g. multimedia, communication, etc.) require implementations that meet tight timing constraints. This work introduces novel high-performance FPGA architecture capable of implementing efficiently any time critical application. The fundamental contribution of the proposed reconfigurable architecture is the design of a highly efficient (performance and power consumption) interconnection structure, taking into consideration the statistical and spatial data extracted from applications, which are implemented on Virtex FPGAs. The derived architecture is software-supported by the MEANDER design framework. Using a number of real-time applications, extensive comparison study in terms of several design parameters proves the effectiveness of the proposed architecture against to Virtex one. More specifically, the proposed architecture achieves performance improvement and power savings up to 20 and 16%, respectively. Moreover, compared to a Virtex architecture with same power budget, our architecture achieves performance improvement by 42%.

Highly Efficient Low Power Consumption Tracking Solar Cells for White LED-Based Lighting System

Highly Efficient Low Power Consumption Tracking Solar Cells for White LED-Based Lighting System

A2× voltage generator analytical model

Since portable systems and processing power applications demand efficient power consumption, this paper deals with the development of an analytical model based on the on-resistance effect of MOS switches to design a silicon-based char-pump voltage generator (VG). This model that is developed for adding design parameters under the designer’s control is a useful design tool to quickly estimate the VG’s performance in the time domain. Numerical results are compared with transistor-level simulation to validate not only the analytical model, but also to estimate the integration area of a silicon-based VG. It was found that an on-resistance ranging from zero to 50 Ω presents a relative error of 2%. Experimental results show the usefulness of the proposed design model.

Two new algorithms for the Min-Power Broadcast problem in static ad hoc networks

In this paper we address the Min-Power Broadcast problem in wireless ad hoc networks. Given a network with an identified source node w, the Min-Power Broadcast (MPB) problem is to assign transmission range to each node such that communication from w to other nodes is possible and the total energy consumption is minimized. As the problem is NP-Hard we first propose a simulated annealing algorithm for the MPB problem. Utilizing a special node selection mechanism in its neighborhood structure the algorithm is designed in a way enabling an efficient power consumption evaluation and search for neighboring solutions. We then combine the algorithm with a decomposition approach to enhance its performance. This is achieved by decomposing the master problem and performing metropolis chain of the simulated annealing only on the much smaller subproblems resulting from decomposition. Results from a comprehensive computational study indicate the efficiency and effectiveness of the proposed algorithms.

Market‐based control of linear structural systems

AbstractTo limit the response of structures during external disturbances such as strong winds or large seismic events, structural control systems can be used. In the structural engineering field, attention has been shifted from active control to semi‐active control systems. Unlike active control system devices, semi‐active devices are compact, have efficient power consumption characteristics and are less expensive. As a result, an environment of a large number of actuators and sensors will result, rendering a complex large‐scale dynamic system. Such a system is best controlled by a decentralized approach such as market‐based control (MBC). In MBC, the system is modelled as a market place of buyers and sellers that leads to an efficient allocation of control power. The resulting MBC solution is shown to be locally Pareto optimal. This novel control approach is applied to three linear structural systems ranging from a one‐storey structure to a 20‐storey structure, all controlled by semi‐active hydraulic dampers. It is shown that MBC is competitive in the reduction of structural responses during large seismic loadings as compared to the centralized control approach of the linear quadratic regulation controller. Copyright © 2002 John Wiley & Sons, Ltd.

Large-scale GaAs ICs challenge bipolar ICs in speed, power, cost : Bill Travis. EDN, 80 (5 July 1990)

Cache memory plays a crucial role in determining the performance of processors, especially for embedded processors where area and power are tightly constrained. It is necessary to have effective management mechanisms, such as cache replacement policies, because modern embedded processors require not only efficient power consumption but also high performance. Practical cache replacement algorithms have focused on supporting the increasing data needs of processors. The commonly used Least Recently Used (LRU) replacement policy always predicts a near-immediate re-reference interval, hence, applications that exhibit a distant re-reference interval may perform poorly under LRU replacement policy. In addition, recent studies have shown that the performance gap between LRU and theoretical optimal replacement (OPT) is large for highly-associative caches. LRU policy is also susceptible to memory-intensive workloads where a working set is greater than the available cache size. These reasons motivate the design of alternative replacement algorithms to improve cache performance. This paper explores a low-overhead, high-performance cache replacement policy for embedded processors that utilizes the mechanism of LRU replacement. Experiments indicate that the proposed policy can result in significant improvement of performance and miss rate for large, highly-associative last-level caches. The proposed policy is based on the tag-distance correlation among cache lines in a cache set. Rather than always replacing the LRU line, the victim is chosen by considering the LRU-behavior bit of the line combined with the correlation between the cache lines’ tags of the set and the requested block’s tag. By using the LRU-behavior bit, the LRU line is given a chance of residing longer in the set instead of being replaced immediately. Simulations with an out-of-order superscalar processor and memory-intensive benchmarks demonstrate that the proposed cache replacement algorithm can increase overall performance by 5.15% and reduce the miss rate by an average of 11.41%.

Polarized Raman scattering and low frequency infrared study of hydroxyapatite

Magnonics and magnon spintronics aim at the utilization of spin waves and magnons, their quanta, for the construction of wave-based logic networks via the generation of pure all-magnon spin currents and their interfacing with electric charge transport. The promise of efficient parallel data processing and low power consumption renders this field one of the most promising research areas in spintronics. In this context, the process of parallel parametric amplification, i.e., the conversion of microwave photons into magnons at one half of the microwave frequency, has proven to be a versatile tool to excite and to manipulate spin waves. Its beneficial and unique properties such as frequency and mode-selectivity, the possibility to excite spin waves in a wide wavevector range and the creation of phase-correlated wave pairs, have enabled the achievement of important milestones like the magnon Bose–Einstein condensation and the cloning and trapping of spin-wave packets. Parallel parametric amplification, which allows for the selective amplification of magnons while conserving their phase is, thus, one of the key methods of spin-wave generation and amplification.The application of parallel parametric amplification to CMOS-compatible micro- and nano-structures is an important step towards the realization of magnonic networks. This is motivated not only by the fact that amplifiers are an important tool for the construction of any extended logic network but also by the unique properties of parallel parametric amplification. In particular, the creation of phase-correlated wave pairs allows for rewarding alternative logic operations such as a phase-dependent amplification of the incident waves. Recently, the successful application of parallel parametric amplification to metallic microstructures has been reported which constitutes an important milestone for the application of magnonics in practical devices. It has been demonstrated that parametric amplification provides an excellent tool to generate and to amplify spin waves in these systems in a wide wavevector range. In particular, the amplification greatly benefits from the discreteness of the spin-wave spectra since the size of the microstructures is comparable to the spin-wave wavelength. This opens up new, interesting routes of spin-wave amplification and manipulation. In this review, we will give an overview over the recent developments and achievements in this field.