A low-voltage and low-power current mode analog multiplier/divider design is presented in this paper. The multiplier/divider is based on operational transconductance amplifier (OTA) utilizing dynamic threshold MOS (DTMOS) structure and consists of only three OTAs. The circuit has the ability of consuming low power and requiring low voltage power supplies. 0.13µm IBM CMOS technology parameters are used to simulate the suggested multiplier/divider design and the simulation results are obtained using LTspice program. The current mode analog multiplier/divider architecture consumes only 12.07nW and requires ±0.2V of supply voltages thanks to employing DTMOS transistor. The simulation results agree well with the expected results.