Low-voltage low-power superior-order curvature-corrected voltage reference

Abstract

A new superior-order curvature-corrected voltage reference will be presented. In order to improve the temperature behavior of the circuit, a double differential structure will be used, implementing the linear and the superior-order curvature corrections. An original ComplemenTary with Absolute Temperature voltage generator will be proposed, using exclusively MOS transistors biased in weak inversion for a low power operation of the voltage reference, having two great advantages: an important reducing of the circuit silicon area and an improved accuracy (matched resistors being replaced by matched MOS active devices). The superior-order curvature-correction will be implemented by taking the difference between two gate-source voltages of subthreshold-operated MOS transistors, biased at drain currents having different temperature dependencies: PTAT (ProporTional with Absolute Temperature) and square PTAT. In order to obtain a low-voltage operation of the circuit, the classical MOS transistor, which implements the elementary voltage reference, could be replaced by a Dynamic Threshold MOS transistor. The SPICE simulations confirm the theoretical estimated results, showing a temperature coefficient under 6 ppm/K for an extended input range 223 K < T < 333 K and for a supply voltage of 1.8 V and a current consumption of about 1 μA.