Dynamic Power Management Techniques Research Articles

A novel energy optimization framework to enhance the performance of sensor nodes in Industry 4.0

AbstractIndustry 4.0 is a term used to refer to the fourth industrial revolution, characterized by the introduction of new technologies, such as the Internet of Things, Big Data, and artificial intelligence (AI). As the number of connected devices in industrial settings grows, energy optimization of such sensors becomes increasingly essential. This paper proposes an energy optimization framework for sensor nodes in Industry 4.0. The framework is based on energy efficiency, energy conservation, and energy harvesting principles. It is designed to optimize the energy consumption of sensor nodes while maintaining their performance. The framework includes dynamic power management, scheduling, and harvesting techniques to reduce energy consumption while maintaining performance. In addition, the framework provides a comprehensive approach to energy optimization, including advanced analytics and AI to predict energy consumption and optimize energy use. The proposed model reached 96.93% sensitivity, 91.36% false discovery rate, 11.28% false omission rate, 90.12% prevalence threshold, and 91.24% threat score. The proposed framework is expected to improve the performance of sensor nodes in Industry 4.0, enabling increased efficiency and cost savings.

Dynamic low power management technique for decision directed inter-layer communication in three dimensional wireless network on chip

3D ICs, a novel technology, might significantly impact multicore NoCs with hundreds or thousands of processing components on a single chip. Multiple 2D chips can be stacked vertically to create multiple active processing elements at various levels. Adding active device layers to 3D ICs can enhance system performance, increase functionality, and increase packing density. New architectural and IC technology advancements hinder energy-efficient design research. Achieving a balance between chip power and performance is crucial. This paper describes the “Dynamic Low Power Management Method in 3DWiNoC” (DLPM 3DWiNoC) architecture, which enables self-organized, centrally managed service management using Smart Master Agents. The approach utilizes SMA's ODA DD module for self-organized, centrally managed service management. To improve power regulation, data flow across vertical interconnects (TSVs) is reconfigured based on a dynamic evaluation of channel link use. SMA aims to reduce congestion by increasing connection utilization through high-frequency, bi-directional vertical channels via TSVs. The suggested system is modeled in MATLAB Simulink. Compared to 3D stacking, TSV stacking of vertical interconnects with the SMA method ensures low parasitic (latency and power) and higher bandwidth with higher vertical wire densities. Experimental results show that the proposed architecture decreases area overhead by 5%-7%, network latency by 12%-15%, and NoC power consumption by 15%-20% compared to the present multi-NoC design.

An Optimal DPM Based Energy-Aware Task Scheduling for Performance Enhancement in Embedded MPSoC

Minimizing the energy consumption to increase the life span and performance of multiprocessor system on chip (MPSoC) has become an integral chip design issue for multiprocessor systems. The performance measurement of computational systems is changing with the advancement in technology. Due to shrinking and smaller chip size power densities on-chip are increasing rapidly that increasing chip temperature in multi-core embedded technologies. The operating speed of the device decreases when power consumption reaches a threshold that causes a delay in complementary metal oxide semiconductor (CMOS) circuits because high on-chip temperature adversely affects the life span of the chip. In this paper an energy-aware dynamic power management technique based on energy aware earliest deadline first (EA-EDF) scheduling is proposed for improving the performance and reliability by reducing energy and power consumption in the system on chip (SOC). Dynamic power management (DPM) enables MPSOC to reduce power and energy consumption by adopting a suitable core configuration for task migration. Task migration avoids peak temperature values in the multi-core system. High utilization factor ( on central processing unit (CPU) core consumes more energy and increases the temperature on-chip. Our technique switches the core by migrating such task to a core that has less temperature and is in a low power state. The proposed EA-EDF scheduling technique migrates load on different cores to attain stability in temperature among multiple cores of the CPU and optimized the duration of the idle and sleep periods to enable the low-temperature core. The effectiveness of the EA-EDF approach reduces the utilization and energy consumption compared to other existing methods and works. The simulation results show the improvement in performance by optimizing 4.8% on 9%, 16%, 23% and 25% at 520 MHz operating frequency as compared to other energy-aware techniques for MPSoCs when the least number of tasks is in running state and can schedule more tasks to make an energy-efficient processor by controlling and managing the energy consumption of MPSoC.

Energy aware fixed priority scheduling in mixed-criticality systems

Most of studies about energy management for MC systems are based on dynamic priority scheme. The disadvantages of dynamic priority scheme are high system overhead and poor predictability. Unlike previous studies, we focus on the problem of scheduling mixed-criticality (MC) periodic tasks with minimizing energy consumption in MC systems based on fixed priority scheme. Firstly, we explain a criticality rate monotonic scheduling (CRMS) and propose the sufficient schedulability condition of CRMS. Secondly, we compute the energy minimization uniform scaled speed and present an optimal static solution algorithm based on CRMS. The extra workload of the high criticality level (HI) task executes with the maximum processor speed in the high criticality mode (HI-mode). But this algorithm does not exploit the slack time generated from the HI task in the low criticality mode (LO-mode). For energy efficiency, we propose a dynamic fixed priority energy minimization algorithm which exploits the slack time generated from the HI task in LO-mode to save energy. In addition, it combines a dynamic voltage and frequency scaling technique and a dynamic power management technique to reduce energy consumption. Finally, the experiments are applied to evaluate the performance of the proposed algorithm and the experimental results show that the proposed algorithm can save up 23.89% energy compared with other existing algorithms.

Survey on energy efficient scheduling techniques on cloud computing

With ever-growing technical advances, performance of complex scientific and engineering applications has arrived at petaflops and exaflops range. However, massive power drawn from the large scale computing infrastructure has caused commensurate rise in electricity consumption, escalating data center ownership costs besides leaving carbon footprints. Judicious scheduling of complex applications with an objective to reduce overall makespan and reduced energy consumption has become one of the biggest confront in the realm of computing architectures. This paper presents a survey on energy efficient scheduling algorithms based on dynamic voltage and frequency scaling (DVFS) and dynamic power management (DPM) techniques. The parameters considered are mainly the makespan, processor energy (dynamic and static) consumption, and network energy (communication) consumption, wherever appropriate during task scheduling.

Analytical Energy Model Parametrized by Workload, Clock Frequency and Number of Active Cores for Share-Memory High-Performance Computing Applications

Energy consumption is crucial in high-performance computing (HPC), especially to enable the next exascale generation. Hence, modern systems implement various hardware and software features for power management. Nonetheless, due to numerous different implementations, we can always push the limits of software to achieve the most efficient use of our hardware. To be energy efficient, the software relies on dynamic voltage and frequency scaling (DVFS), as well as dynamic power management (DPM). Yet, none have privileged information on the hardware architecture and application behavior, which may lead to energy-inefficient software operation. This study proposes analytical modeling for architecture and application behavior that can be used to estimate energy-optimal software configurations and provide knowledgeable hints to improve DVFS and DPM techniques for single-node HPC applications. Additionally, model parameters, such as the level of parallelism and dynamic power, provide insights into how the modeled application consumes energy, which can be helpful for energy-efficient software development and operation. This novel analytical model takes the number of active cores, the operating frequencies, and the input size as inputs to provide energy consumption estimation. We present the modeling of 13 parallel applications employed to determine energy-optimal configurations for several different input sizes. The results show that up to 70% of energy could be saved in the best scenario compared to the default Linux choice and 14% on average. We also compare the proposed model with standard machine-learning modeling concerning training overhead and accuracy. The results show that our approach generates about 10 times less energy overhead for the same level of accuracy.

Energy-cognizant scheduling for preference-oriented fixed-priority real-time tasks

Abstract Energy management is one of the crucial design issues when executing real-time applications with stringent timing requirements. Dynamic slowdown of processor voltage if accompanied with processor shutdown method, helps in better saving energy. Traditionally, energy management has been applied to real-time scheduling algorithms that prioritize tasks based on timing parameters only, however, recently applications having tasks with different execution-preferences on the same computing unit found significant importance in various areas. In this paper, dynamic voltage scaling (DVS) and dynamic power management (DPM) techniques are used for energy management while scheduling preference-oriented fixed-priority periodic real-time tasks. Preference-oriented energy-aware rate-monotonic scheduling (PER) and preference-oriented extended energy-aware rate-monotonic scheduling (PEER) algorithms are proposed that maximize energy savings while fulfilling preference-value of tasks. Extensive simulations show that PER and PEER outperforms in terms of energy savings when compared to several related studies.

HiLITE: Hierarchical and Lightweight Imitation Learning for Power Management of Embedded SoCs

Modern systems-on-chip (SoCs) use dynamic power management (DPM) techniques to improve energy efficiency. However, existing techniques are unable to efficiently adapt the runtime decisions considering multiple objectives (e.g., energy and real-time requirements) simultaneously on heterogeneous platforms. To address this need, we propose HiLITE, a hierarchical imitation learning framework that maximizes the energy efficiency while satisfying soft real-time constraints on embedded SoCs. Our approach first trains DPM policies using imitation learning; then, it applies a regression policy at runtime to minimize deadline misses. HiLITE improves the energy-delay product by 40 percent on average, and reduces deadline misses by up to 76 percent, compared to state-of-the-art approaches. In addition, we show that the trained policies not only achieve high accuracy, but also have negligible prediction time overhead and small memory footprint.

Adaptive Predictive Power Management for Mobile LTE Devices

Reducing the energy consumption of mobile phones is a crucial design goal for cellular modem solutions for LTE and 5G NR standards. Most dynamic power management techniques targeting mobile devices proposed so far, however, are purely reactive in powering down and up system components. Promising approaches extend this, by predicting information from the cell and the communication protocol to take decisions proactively. In this paper, we present a complete proactive power management approach for the modem based on on-line grant prediction. In this context, we define proactive policies that allow a mobile device to go to sleep states more often compared to reactive power management systems, e.g., in time slots of predicted transmission inactivity in a cell. Furthermore, we propose and compare two algorithmic solutions to this proactive grant prediction problem, one a feed-forward neural network and one a SARSA-λ reinforcement agent. As the implementation of these machine learning techniques also creates additional energy and resource costs, both approaches are carefully designed, optimized, and evaluated not only in terms of prediction accuracy, but also in terms of overall energy savings. Notably, our predictor implementations are able to achieve up to 17 percent in overall energy savings on real-world traces.

Energy aware mixed tasks scheduling in real-time systems

We address the problem of scheduling mixed tasks which consist of n hard real time periodic tasks with shared resources and soft aperiodic tasks and consider two conflicting goals: reducing energy consumption and decreasing response time of aperiodic tasks. Firstly, we compute the optimal speed of periodic tasks and present a novel static mixed task scheduling (SMTS) algorithm. It schedules periodic tasks with the optimal speed and aperiodic tasks with maximum processor speed. Secondly, a dynamic mixed task scheduling (DMTS) algorithm which can reclaim dynamic slack time generated from periodic tasks and the constant bandwidth server to reduce energy consumption is proposed. In addition, it combines dynamic voltage scaling and dynamic power management techniques. Finally, we prove that the DMTS algorithm is feasible. The experimental results show that the DMTS algorithm reduces average 7.18% and 53.66% energy consumption × response time compared with SMTS algorithm and baseline algorithm, respectively.

Toward energy-efficient cloud computing: a survey of dynamic power management and heuristics-based optimization techniques

Cloud computing is the most prominent computing paradigm in the present era of information technology. However, data centers needed for hosting cloud services demand huge amount of electrical energy and release harmful gases to the atmosphere. To ensure a sustainable future, there is a need to focus on energy efficiency in cloud computing. Early literature pertaining to energy consumption in cloud computing is primarily focused on individual sub-domains like scheduling techniques, optimization, and green computing metrics. Research literature on cloud resource optimization is found to be the most discussed but less structured. This paper intends to provide a complete picture of energy efficiency in cloud computing. It also classifies heuristics-based optimization methods and the dynamic power management techniques. The survey shows the research trends based on regions, journals, conferences, etc., in the domain of energy efficiency in cloud computing. The study concludes with research issues and future research directions.

System level fixed priority energy management algorithm for embedded real time application

Dynamic power management (DPM) and dynamic voltage scaling (DVS) are crucial techniques to reduce the energy consumption in embedded real-time systems. Many previous studies have focused on the energy consumption of the processor or I/O devices. In this paper, we focus on the problem of energy management integrating DVS and DPM techniques for periodic embedded real-time applications with rate monotonic (RM) policy and present a system level fixed priority energy-efficient scheduling (SLFPEES) algorithm. The SLFPEES algorithm consists of I/O device scheduling and job scheduling. I/O device scheduling is based on the dynamic power management with rate monotonic (DPM-RM) policy which puts devices into the sleep state when the idle interval is larger than devices break even time. Job scheduling is based on the RM policy and uses stack resource protocol (SRP) to guarantee exclusive access to the shared resources. For energy efficiency, the SLFPEES algorithm schedules the task with a lower speed and a higher speed. The experimental result shows that the SLFPEES algorithm can yield significantly energy savings with respect to the existing techniques.

A SURVEY OF RECENT TECHNIQUES FOR ENERGY COMPUTATION IN DISTRIBUTED COMPUTING NETWORKS

In recent years many techniques have been computed for energy consumption. The Energy Consumption is a very big challenging area for research in networks. There are various techniques for computing energy consumption in distributed computing as described in this paper. There is a different device attached to the distribution system for different electrical operation. They are Dynamic Power Management Techniques (DPMT) like as Dynamic Voltage Scaling (DVS), Dynamic Frequency Scaling (DFC), and Routing algorithm. In these techniques, Clock Gating technique is also a methodology but it is very expensive and effective. They consume very highly electricity working in operations. There are two major metrics for reducing energy consumption in networks as, power and time. So any reliable networks the performance must be less energy during throughput packet and transmission delivery. Energy Consumption is a valuable cost of any networks over the lifetime. In this paper the recent techniques used for energy optimization in distributed computing.

Energy aware fixed priority scheduling for real time sporadic task with task synchronization

Abstract Energy management is one of the key issues in the real-time embedded systems. The slowdown method based on the dynamic voltage scaling (DVS) and the shutdown method based on the dynamic power management (DPM) can effectively reduce energy consumption. The previous algorithm which uses the static speed to deal with the blocking situation is too conservative. We present a static task synchronization for sporadic tasks scheduling (STSST) algorithm. The dynamic speed is computed to minimize energy consumption while satisfying the time constraints in the STSST algorithm. But, the STSST algorithm assumes that each task executes with its worst case execution time. As the actual execution time of the task is often lower than its worst case execution time. A dynamic task synchronization for sporadic task (DTSST) algorithm which can reclaim the slack time generated from the early completion task is proposed. It combines the DVS technique and the DPM technique to reduce energy consumption. Furthermore, the feasibility conditions are given and proved. The experimental results show that the DTSST algorithm can reduce energy consumption up to 20.57%∼67.66% over the STSST algorithm and it consumes 43.79%∼67.66% less energy than that of the DS algorithm.

TEI-power

FinFETs have emerged as a promising replacement for planar CMOS devices in sub-20nm technology nodes. However, based on the temperature effect inversion (TEI) phenomenon observed in FinFET devices, the delay characteristics of FinFET circuits in sub-, near-, and superthreshold voltage regimes may be fundamentally different from those of CMOS circuits with nominal voltage operation. For example, FinFET circuits may run faster in higher temperatures. Therefore, the existing CMOS-based and TEI-unaware dynamic power and thermal management techniques would not be applicable. In this article, we present TEI-power, a dynamic voltage and frequency scaling--based dynamic thermal management technique that considers the TEI phenomenon and also the superlinear dependencies of power consumption components on the temperature and outlines a real-time trade-off between delay and power consumption as a function of the chip temperature to provide significant energy savings, with no performance penalty—namely, up to 42% energy savings for small circuits where the logic cell delay is dominant and up to 36% energy savings for larger circuits where the interconnect delay is considerable.

Duplication‐controlled static energy‐efficient scheduling on multiprocessor computing system

SummaryEnergy‐efficient scheduling is a step towards meeting green computing requirements. The work in this direction mainly aims at reducing dynamic energy consumption that includes clock gating, cache subbanking, and dynamic voltage and frequency scaling of underlying processors. However, the emergence of fast and compact transistor sizes has exponentially added onto the processor static power consumption, which has not been paid much attention. This article proposes a duplication‐controlled static energy‐efficient scheduling (C‐SEED) algorithm for scheduling precedence constrained applications on parallel computing systems. The C‐SEED algorithm couples adaptive threshold‐based duplication with system level dynamic power management technique to achieve its objectives. Dynamic power management works by selectively putting the energy‐consuming resources to efficient low‐power states for idle times to reduce energy consumption. Efficacy of the proposed algorithm is analyzed and compared against other relevant works on the basis of makespan and total energy (dynamic + static + communication) consumption. The extensive simulation results carried over large set of random and regular task graphs show that the proposed C‐SEED algorithm has potential to reduce energy consumption as well as makespan.

Energy-Aware Disk Storage Management : Online Approach with Application in DBMS

Energy consumption has become a first-class optimization goal in design and implementation of data-intensive computing systems. This is particularly true in the design of database management systems (DBMS), which was found to be the major consumer of energy in the software stack of modern data centers. Among all database components, the storage system is one of the most power-hungry elements. In previous work, dynamic power management (DPM) techniques that make real-time decisions to transition the disks to low-power modes are normally used to save energy in storage systems. In this paper, we tackle the limitations of DPM proposals in previous contributions. We introduced a DPM optimization model integrated with model predictive control (MPC) strategy to minimize power consumption of the disk-based storage system while satisfying given performance requirements. It dynamically determines the state of disks and plans for inter-disk data fragment migration to achieve desirable balance between power consumption and query response time. Via analyzing our optimization model to identify structural properties of optimal solutions, we propose a fast-solution heuristic DPM algorithm that can be integrated in large-scale disk storage systems for efficient state configuration and data migration. We evaluate our proposed ideas by running simulations using extensive set of synthetic workloads based on popular TPC benchmarks. Our results show that our solution significantly outperforms the best existing algorithm in both energy savings and response time.

Reliability-Aware Runtime Power Management for Many-Core Systems in the Dark Silicon Era

Power management of networked many-core systems with runtime application mapping becomes more challenging in the dark silicon era. It necessitates considering network characteristics at runtime to achieve better performance while honoring the peak power upper bound. On the other hand, power management has a direct effect on chip temperature, which is the main driver of the aging effects. Therefore, alongside performance fulfillment, the controlling mechanism must also consider the current cores' reliability in its actuator manipulation to enhance the overall system lifetime in the long term. In this paper, we propose a multiobjective dynamic power management technique that uses current power consumption and other network characteristics including the reliability of the cores as the feedback while utilizing fine-grained voltage and frequency scaling and per-core power gating as the actuators. In addition, disturbance rejecter and reliability balancer are designed to help the controller to better smooth power consumption in the short term and reliability in the long term, respectively. Simulations of dynamic workloads and mixed criticality application profiles show that our method not only is effective in honoring the power budget while considerably boosting the system throughput, but also increases the overall system lifetime by minimizing aging effects by means of power consumption balancing.

Model-Free Reinforcement Learning and Bayesian Classification in System-Level Power Management

To cope with uncertainties and variations that emanate from hardware and/or application characteristics, dynamic power management (DPM) frameworks must be able to learn about the system inputs and environmental variations, and adjust the power management policy on the fly. In this paper, an online adaptive DPM technique is presented based on the model-free reinforcement learning (RL) method, which requires no prior knowledge of the state transition probability function and the reward function. In particular, this paper employs the temporal difference (TD) learning method for semi-Markov decision process (SMDP) as the model-free RL technique since the TD method can accelerate convergence and alleviate the reliance on the Markovian property of the power-managed system. In addition, a novel workload predictor based on an online Bayesian classifier is presented to provide effective estimation of the workload characteristics for the RL algorithm. Several improvements are proposed to manage the size of the action space for the learning algorithm, enhance its convergence speed, and dynamically change the action set associated with each system state. In the proposed DPM framework, power-latency tradeoffs of the power-managed system can be precisely controlled based on a user-defined parameter. Extensive experiments on hard disk drives and wireless network cards show that the maximum power saving without sacrificing any latency is 18.6 percent compared to a reference expert-based approach. Alternatively, the maximum latency saving without any power dissipation increase is 73.0 percent compared to the existing best-of-breed DPM techniques.

Performance analysis of an improved dynamic power management model in wireless sensor node

The energy consumption in the wireless sensor networks is a very critical issue which attracts immediate attention for the sake of the growing demand of the billion dollar market in future. The Dynamic Power Management (DPM) technique is a way of controlling and saving the energy usage in a sensor node. Previously, researchers have proposed lifetime improving stochastic models for wireless sensor networks and limited work has been done focusing on the wireless sensor node. This paper proposes an analyser based Semi-Markov model for DPM in the event-driven sensor node. The power consumption comparison with previously proposed models without this analyser shows the analyser significant contributes to lifetime improvement. The improved model is more power efficient, presents how the DPM model observes the input event arrival and power states of the sensor node components, and then dynamically manages the power consumption of the overall system. Further, to observe the effect of event arrival, missed events, waiting time, processor utilization on the power consumption and lifetime, the proposed DPM system with the single server queuing model is developed.