Dual-port Array Research Articles

Mutual coupling reduction of dual port antenna using zero index metasurface structure

The design and prototyping of a dual port planar printed quad band/Ultra wide band (UWB) patch antenna, with octagonal ring shaped metasurface structure (MSS) assimilated at the back to reduce mutual coupling between antenna elements, is presented. The proposed MSS incorporated UWB antenna has been designed and fabricated on a high permittivity (r15) ceramic filled biopolymer based sandwich structured dielectric substrate. Substantial reductions of mutual coupling (S21) between the dual port array elements of the proposed antenna has been achieved by assimilating a 6 × 9 octagonal ring shaped metasurface structure with near zero refractive index (NZRI) in the ground plane. Measurement results show that the proposed antenna with MSS loading has achieved the reflection co-efficient (S11 <-10 dB) bandwidths of 1.25 (2.25-3.5) GHz, 1 (4-5) GHz, 0.7 (5.9-6.6) GHz and 1.75 (7.7-9.45) GHz. Stable radiation patterns, with gains of 3.18 dBi, 2.96 dBi, 3.34 dBi and 9.61 dBi, have been measured at resonant frequencies of 2.85 GHz, 4.4 GHz, 6.2 GHz and 8.75 GHz.

Isolation improvement of dual feed patch antenna by assimilating metasurface ground

A new octagonal ring shape metasurface structure (MSS) has been design and implemented at the back of a dual feed planar printed Ultrawideband array antenna. The proposed MSS incorporated antenna has been design and fabricated on a high permittivity (epsilon(r)=15) ceramic filled biopolymer-based sandwich structured dielectric substrate. A significant improvement of isolation (S-21) between dual port array elements of the proposed antenna has been achieved by assimilating 6 x 9 octagonal ring shape MSS with near zero refractive index in the ground plane. Measurement result shows that the proposed antenna with MSS loading has been achieved the reflection coefficient (S-11<-10 dB) bandwidths of 1.3, 1.02, 0.75, and 1.8 GHz. Stable radiation patterns with the gains of 3.42, 4.14, 5.46, and 8.28 dBi have been measured at the resonant frequencies 3.1, 4.41, 6.2, and 8.75 GHz. (c) 2015 Wiley Periodicals, Inc. Microwave Opt Technol Lett 57:1406-1409, 2015

An Intelligent Multi-Port Memory

It has become clear that on-chip storage is critical in large FPGAs. Scholars have done some research es on implementing user logic memory models with single-port and dual-port physical arrays. T heir work is based on the assumption that user memory models are either single-port or dual-port. However, their works may not be helpful to multi-processor applications since single or dual-port arrays may not satisfy the simultaneous accesses from different processors. This paper proposes a novel multi-port memory design . In our design, d istributed memory resources of LUT are mapped as 1-port m emory b anks. Data in different m emory b anks can be accessed simultaneously. With the help of port-priority and r/w-priority, our multi-port memory can resolve both write-write conflict and read-write conflict. When write-write conflict occurs, the port with the highest priority can execute its write operation . W hen read-write conflict occurs, either read-then-write or write-then-read type is selected according to r/w-priority. Besides, data-switch paths between ports are implemented by utilizing the read-write conflict. Extend Port Importance Hierarchy (EPIH) algorithm is proposed for basic conflict handling, while Block Access Control (BAC) algorithm is proposed for reducing conflict when processors carry block read/write. Experiment results on Xilinx Virtex-II show that: compared to implementation of N ports in each cell, our design saves 88% LUT resources. Experiment results on Xilinx Virtex-II also show that, as port number N increases, the cell cost increases significantly which restricts the reasonable port number to rather small values in practice . Experiment results on simulation show that BAC algorithm performs more efficiently according to increasing block read/write length.